Re: [RFC PATCH 1/3] hw/intc/s390_flic: Migrate pending state

On 26/05/2024 22.33, David Hildenbrand wrote: Am 26.05.24 um 21:44 schrieb Richard Henderson: On 5/26/24 08:53, David Hildenbrand wrote: Am 25.05.24 um 15:12 schrieb Nicholas Piggin: The flic pending state is not migrated, so if the machine is migrated while an interrupt is pending, it can be

Re: [RFC PATCH 2/3] tests/qtest/migration-test: enable on s390x

Hi, On Sat, 25 May 2024 at 18:44, Nicholas Piggin wrote: > s390x is more stable now. Enable it. > > Signed-off-by: Nicholas Piggin > --- > tests/qtest/migration-test.c | 12 > 1 file changed, 12 deletions(-) > > diff --git a/tests/qtest/migration-test.c

Re: [PATCH] fuzz: specify audiodev for usb-audio

On 27/05/2024 06.07, Alexander Bulekov wrote: Fixes test-failure on Fedora 40 CI. Reported-by: Thomas Huth Signed-off-by: Alexander Bulekov --- tests/qtest/fuzz/generic_fuzz_configs.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git

Re: [PATCH] dias/riscv: Decode all of the pmpcfg and pmpaddr CSRs

On Tue, May 14, 2024 at 3:16 PM Alistair Francis wrote: > > Previously we only listed a single pmpcfg CSR and the first 16 pmpaddr > CSRs. This patch fixes this to list all 16 pmpcfg and all 64 pmpaddr > CSRs are part of the dissassembly. > > Reported-by: Eric DeVolder > Signed-off-by: Alistair

Re: [PATCH V2 1/3] vl: Allow multiple -overcommit commands

On 24/05/2024 22.00, Zide Chen wrote: Both cpu-pm and mem-lock are related to system resource overcommit, but they are separate from each other, in terms of how they are realized, and of course, they are applied to different system resources. It's tempting to use separate command lines to

Re: [PATCH v2 0/1] riscv, gdbstub.c: fix reg_width in ricsv_gen_dynamic_vector_feature()

On Sat, May 18, 2024 at 6:32 AM Daniel Henrique Barboza wrote: > > Hi, > > In this v2 'reg_width' was renamed to 'bitsize' to provide a bit more > clarity about what's the value type of the variable. It is the same name > used by riscv_gen_dynamic_csr_feature() for a variable that has the same >

Re: [PATCH v2 1/1] riscv, gdbstub.c: fix reg_width in ricsv_gen_dynamic_vector_feature()

On Sat, May 18, 2024 at 6:32 AM Daniel Henrique Barboza wrote: > > Commit 33a24910ae changed 'reg_width' to use 'vlenb', i.e. vector length > in bytes, when in this context we want 'reg_width' as the length in > bits. > > Fix 'reg_width' back to the value in bits like 7cb59921c05a >

Re: [PATCH] target/riscv: zvbb implies zvkb

On Thu, May 16, 2024 at 10:35 PM Jerry Zhang Jian wrote: > > - According to RISC-V crypto spec, Zvkb extension is a proper subset of the > Zvbb extension. > > - Reference: >

Re: [PATCH rfcv2 15/17] intel_iommu: Set default aw_bits to 48 in scalable modren mode

On 27/05/2024 05:16, Duan, Zhenzhong wrote: > Caution: External email. Do not open attachments or click links, unless this > email comes from a known sender and you know the content is safe. > > > Hi Clement, > >> -Original Message- >> From: CLEMENT MATHIEU--DRIF >> Sent: Friday, May

Re: [PATCH] target/riscv: zvbb implies zvkb

On Thu, May 16, 2024 at 10:35 PM Jerry Zhang Jian wrote: > > - According to RISC-V crypto spec, Zvkb extension is a proper subset of the > Zvbb extension. > > - Reference: >

Re: [PATCH v2 1/1] target/riscv/kvm.c: Fix the hart bit setting of AIA

On Wed, May 15, 2024 at 7:12 PM Yong-Xuan Wang wrote: > > In AIA spec, each hart (or each hart within a group) has a unique hart > number to locate the memory pages of interrupt files in the address > space. The number of bits required to represent any hart number is equal > to ceil(log2(hmax +

[PATCH] fuzz: specify audiodev for usb-audio

Fixes test-failure on Fedora 40 CI. Reported-by: Thomas Huth Signed-off-by: Alexander Bulekov --- tests/qtest/fuzz/generic_fuzz_configs.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/qtest/fuzz/generic_fuzz_configs.h b/tests/qtest/fuzz/generic_fuzz_configs.h

Re: [PATCH] virtio-pci: Fix the use of an uninitialized irqfd.

On Wed, May 22, 2024 at 1:10 PM Cindy Lu wrote: > > The crash was reported in MAC OS and NixOS, here is the link for this bug > https://gitlab.com/qemu-project/qemu/-/issues/2334 > https://gitlab.com/qemu-project/qemu/-/issues/2321 > > The root cause is that the function

Re: [PATCH] intel_iommu: Use the latest fault reasons defined by spec

On Fri, May 24, 2024 at 4:41 PM Duan, Zhenzhong wrote: > > > > >-Original Message- > >From: Jason Wang > >Subject: Re: [PATCH] intel_iommu: Use the latest fault reasons defined by > >spec > > > >On Tue, May 21, 2024 at 6:25 PM Duan, Zhenzhong > > wrote: > >> > >> > >> > >> >-Original

RE: [PATCH 04/16] vfio/helpers: Make vfio_set_irq_signaling() return bool

>-Original Message- >From: Anthony Krowiak >Subject: Re: [PATCH 04/16] vfio/helpers: Make vfio_set_irq_signaling() >return bool > > >On 5/15/24 4:20 AM, Zhenzhong Duan wrote: >> This is to follow the coding standand in qapi/error.h to return bool >> for bool-valued functions. >> >>

RE: [PATCH rfcv2 09/17] intel_iommu: Flush stage-1 cache in iotlb invalidation

>-Original Message- >From: CLEMENT MATHIEU--DRIF >Subject: Re: [PATCH rfcv2 09/17] intel_iommu: Flush stage-1 cache in iotlb >invalidation > >Hi Zhenzhong > >On 22/05/2024 08:23, Zhenzhong Duan wrote: >> Caution: External email. Do not open attachments or click links, unless this >email

RE: [PATCH rfcv2 06/17] intel_iommu: Implement stage-1 translation

>-Original Message- >From: CLEMENT MATHIEU--DRIF >Subject: Re: [PATCH rfcv2 06/17] intel_iommu: Implement stage-1 >translation > >Hi Zhenzhong, > >I already sent you my comments about this patch earlier (question about >checking pgtt) but here is a style review > >On 22/05/2024 08:23,

RE: [PATCH rfcv2 15/17] intel_iommu: Set default aw_bits to 48 in scalable modren mode

Hi Clement, >-Original Message- >From: CLEMENT MATHIEU--DRIF >Sent: Friday, May 24, 2024 9:57 PM >To: Duan, Zhenzhong ; qemu- >de...@nongnu.org >Cc: alex.william...@redhat.com; c...@redhat.com; eric.au...@redhat.com; >m...@redhat.com; pet...@redhat.com; jasow...@redhat.com;

[PATCH] x86: cpu: fixup number of addressable IDs for processor cores in the physical package

When QEMU is started with: -cpu host,host-cache-info=on,l3-cache=off \ -smp 2,sockets=1,dies=1,cores=1,threads=2 Guest can't acquire maximum number of addressable IDs for processor cores in the physical package from CPUID[04H]. This bug was introduced in commit

[PATCH v13 11/13] virtio-gpu: Handle resource blob commands

From: Antonio Caggiano Support BLOB resources creation, mapping and unmapping by calling the new stable virglrenderer 0.10 interface. Only enabled when available and via the blob config. E.g. -device virtio-vga-gl,blob=true Signed-off-by: Antonio Caggiano Signed-off-by: Xenia Ragiadakou

[PATCH v13 02/13] virtio-gpu: Move print_stats timer to VirtIOGPUGL

Move print_stats timer to VirtIOGPUGL for consistency with cmdq_resume_bh and fence_poll that are used only by GL device. Signed-off-by: Dmitry Osipenko --- hw/display/virtio-gpu-virgl.c | 10 ++ include/hw/virtio/virtio-gpu.h | 2 +- 2 files changed, 7 insertions(+), 5 deletions(-)

[PATCH v13 07/13] virtio-gpu: Don't require udmabuf when blobs and virgl are enabled

The udmabuf usage is mandatory when virgl is disabled and blobs feature enabled in the Qemu machine configuration. If virgl and blobs are enabled, then udmabuf requirement is optional. Since udmabuf isn't widely supported by a popular Linux distros today, let's relax the udmabuf requirement for

[PATCH v13 12/13] virtio-gpu: Register capsets dynamically

From: Pierre-Eric Pelloux-Prayer virtio_gpu_virgl_get_num_capsets will return "num_capsets", but we can't assume that capset_index 1 is always VIRGL2 once we'll support more capsets, like Venus and DRM capsets. Register capsets dynamically to avoid that problem. Reviewed-by: Manos Pitsidianakis

[PATCH v13 13/13] virtio-gpu: Support Venus context

From: Antonio Caggiano Request Venus when initializing VirGL and if venus=true flag is set for virtio-gpu-gl device. Signed-off-by: Antonio Caggiano Signed-off-by: Huang Rui Signed-off-by: Dmitry Osipenko --- hw/display/virtio-gpu-gl.c | 2 ++ hw/display/virtio-gpu-virgl.c | 22

[PATCH v13 10/13] virtio-gpu: Support suspension of commands processing

Check whether command processing has been finished; otherwise, stop processing commands and retry the command again next time. This allows us to support asynchronous execution of non-fenced commands needed for unmapping host blobs safely. Suggested-by: Akihiko Odaki Signed-off-by: Dmitry

[PATCH v13 06/13] virtio-gpu: Support context-init feature with virglrenderer

From: Huang Rui Patch "virtio-gpu: CONTEXT_INIT feature" has added the context_init feature flags. Expose this feature and support creating virglrenderer context with flags using context_id if libvirglrenderer is new enough. Originally-by: Antonio Caggiano Signed-off-by: Huang Rui

[PATCH v13 03/13] virtio-gpu: Handle virtio_gpu_virgl_init() failure

virtio_gpu_virgl_init() may fail, leading to a further Qemu crash because Qemu assumes it never fails. Check virtio_gpu_virgl_init() return code and don't execute virtio commands on error. Failed virtio_gpu_virgl_init() will result in a timed out virtio commands for a guest OS. Signed-off-by:

[PATCH v13 09/13] virtio-gpu: Support blob scanout using dmabuf fd

From: Robert Beckett Support displaying blob resources by handling SET_SCANOUT_BLOB command. Signed-by: Antonio Caggiano Signed-off-by: Robert Beckett Signed-off-by: Huang Rui Reviewed-by: Antonio Caggiano Signed-off-by: Dmitry Osipenko --- hw/display/virtio-gpu-virgl.c | 109

[PATCH v13 00/13] Support blob memory and venus on qemu

Hello, This series enables Vulkan Venus context support on virtio-gpu. All virglrender and almost all Linux kernel prerequisite changes needed by Venus are already in upstream. For kernel there is a pending KVM patchset that fixes mapping of compound pages needed for DRM drivers using TTM [1],

[PATCH v13 05/13] virtio-gpu: Use pkgconfig version to decide which virgl features are available

New virglrerenderer features were stabilized with release of v1.0.0. Presence of symbols in virglrenderer.h doesn't guarantee ABI compatibility with pre-release development versions of libvirglerender. Use virglrenderer version to decide reliably which virgl features are available. Reviewed-by:

[PATCH v13 04/13] virtio-gpu: Unrealize GL device

Even though GL GPU doesn't support hotplugging today, free virgl resources when GL device is unrealized. For consistency. Signed-off-by: Dmitry Osipenko --- hw/display/virtio-gpu-gl.c | 13 + hw/display/virtio-gpu-virgl.c | 11 +++ include/hw/virtio/virtio-gpu.h | 1 +

[PATCH v13 08/13] virtio-gpu: Add virgl resource management

From: Huang Rui In a preparation to adding host blobs support to virtio-gpu, add virgl resource management that allows to retrieve resource based on its ID and virgl resource wrapper on top of simple resource that will be contain fields specific to virgl. Signed-off-by: Huang Rui Reviewed-by:

[PATCH v13 01/13] virtio-gpu: Move fence_poll timer to VirtIOGPUGL

Move fence_poll timer to VirtIOGPUGL for consistency with cmdq_resume_bh that are used only by GL device. Signed-off-by: Dmitry Osipenko --- hw/display/virtio-gpu-virgl.c | 8 +--- include/hw/virtio/virtio-gpu.h | 3 ++- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git

Re: [PULL 17/20] target/arm: Do memory type alignment check when translation disabled

On 5/25/24 13:50, Bernhard Beschow wrote: Am 25. Mai 2024 13:41:54 UTC schrieb Bernhard Beschow : Am 5. März 2024 13:52:34 UTC schrieb Peter Maydell : From: Richard Henderson If translation is disabled, the default memory type is Device, which requires alignment checking. This is more

Re: [PULL 00/28] linux-user patch queue

/rth7680/qemu.git tags/pull-lu-20240526 for you to fetch changes up to 701890bdd09b289fd9cb852e714e91373088b0f3: target/i386: Pass host pointer and size to cpu_x86_{xsave,xrstor} (2024-05-26 15:49:58 -0700) target/i386: Introduce

[PATCH v1 0/4] target/riscv/kvm: QEMU support for KVM Guest Debug on RISC-V

This series implements QEMU KVM Guest Debug on RISC-V, with which we could debug RISC-V KVM guest from the host side, using software breakpoints. This series is based on riscv-to-apply.next branch (v9.0.0) and is also available at:

[PATCH v1 3/4] target/riscv/kvm: handle the exit with debug reason

If the breakpoint belongs to the userspace then set the ret value. Signed-off-by: Chao Du --- target/riscv/kvm/kvm-cpu.c | 20 1 file changed, 20 insertions(+) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 0bc3348b91..0c45e520b2 100644 ---

[PATCH v1 2/4] target/riscv/kvm: implement kvm_arch_update_guest_debug()

Set the control flag when there are active breakpoints. This will help KVM to know the status in the userspace. Signed-off-by: Chao Du --- target/riscv/kvm/kvm-cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c

[PATCH v1 4/4] target/riscv/kvm: define TARGET_KVM_HAVE_GUEST_DEBUG

To enable the KVM GUEST DEBUG for RISC-V at QEMU side. Signed-off-by: Chao Du --- configs/targets/riscv64-softmmu.mak | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/targets/riscv64-softmmu.mak b/configs/targets/riscv64-softmmu.mak index 7c0e7eeb42..f938cc1ee6 100644 ---

[PATCH v1 1/4] target/riscv/kvm: add software breakpoints support

This patch implements insert/remove software breakpoint process: Add an input parameter for kvm_arch_insert_sw_breakpoint() and kvm_arch_remove_sw_breakpoint() to pass the length information, which helps us to know whether it is a RVC instruction. For some remove cases, we do not have the length

Re: [RFC PATCH 1/4] target/riscv/kvm: add software breakpoints support

On 2024-05-25 00:11, Paolo Bonzini wrote: > > On Tue, Apr 16, 2024 at 11:23 AM Daniel Henrique Barboza > wrote: > > > +int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint > > > *bp, > > > + vaddr len) > > > +{ > > > +if (len != 4 && len

Re: [PULL 01/10] target/loongarch/kvm: Fix VM recovery from disk failures

在 2024/5/24 下午6:00, Michael Tokarev 写道: 23.05.2024 04:46, Song Gao wrote: vmstate does not save kvm_state_conter, which can cause VM recovery from disk to fail. Cc: qemu-sta...@nongnu.org Signed-off-by: Song Gao Acked-by: Peter Xu Message-Id: <20240508024732.3127792-1-gaos...@loongson.cn>

Re: [PATCH 0/6] target/riscv: Support Zabha extension

On 2024/5/27 1:16, Daniel Henrique Barboza wrote: On 5/25/24 21:37, LIU Zhiwei wrote: On 2024/5/24 19:44, Daniel Henrique Barboza wrote: Hi Zhiwei! On 5/23/24 09:40, LIU Zhiwei wrote: Zabha adds support AMO operations for byte and half word. If zacas has been implemented, zabha also

Re: [PATCH] target/arm: Disable SVE extensions when SVE is disabled

On 5/26/24 14:06, Marcin Juszkiewicz wrote: W dniu 26.05.2024 o 22:45, Richard Henderson pisze: From: Marcin Juszkiewicz Cc: qemu-sta...@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2304 Reported-by: Marcin Juszkiewicz Signed-off-by: Richard Henderson Signed-off-by:

[PULL 15/28] linux-user/i386: Drop xfeatures_size from sigcontext arithmetic

This is subtracting sizeof(target_fpstate_fxsave) in TARGET_FXSAVE_SIZE, then adding it again via >xfeatures. Perform the same computation using xstate_size alone. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- linux-user/i386/signal.c | 7 +++ 1 file changed, 3

[PULL 10/28] target/i386: Convert do_xsave_* to X86Access

The body of do_xsave is now fully converted. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 47 1 file changed, 26 insertions(+), 21 deletions(-) diff --git a/target/i386/tcg/fpu_helper.c

[PULL 26/28] target/i386: Pass host pointer and size to cpu_x86_{fsave, frstor}

We have already validated the memory region in the course of validating the signal frame. No need to do it again within the helper function. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/cpu.h| 10 ++ linux-user/i386/signal.c | 4 ++--

[PULL 07/28] target/i386: Convert do_xsave_{fpu, mxcr, sse} to X86Access

Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 52 +--- 1 file changed, 31 insertions(+), 21 deletions(-) diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index df12eac71e..8fbe6e00ce 100644

[PULL 05/28] target/i386: Convert do_fstenv to X86Access

Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 45 +++- 1 file changed, 24 insertions(+), 21 deletions(-) diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index 5ad6e04639..01e9a1fbbf 100644

[PULL 08/28] target/i386: Convert do_xrstor_{fpu, mxcr, sse} to X86Access

Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 46 ++-- 1 file changed, 28 insertions(+), 18 deletions(-) diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index 8fbe6e00ce..f21cdb45ea 100644

Re: [PATCH v12 00/13] Support blob memory and venus on qemu

On 5/27/24 02:46, Dmitry Osipenko wrote: > On 5/22/24 12:00, Alex Bennée wrote: >> Dmitry Osipenko writes: >> >>> On 5/21/24 17:57, Alex Bennée wrote: Alex Bennée writes: > Dmitry Osipenko writes: > >> Hello, >> >> This series enables Vulkan Venus context support

[PULL 14/28] target/i386: Add {hw,sw}_reserved to X86LegacyXSaveArea

This completes the 512 byte structure, allowing the union to be removed. Assert that the structure layout is as expected. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/cpu.h | 39 +-- 1 file changed, 25 insertions(+), 14

[PULL 00/28] linux-user patch queue

The following changes since commit 70581940cabcc51b329652becddfbc6a261b1b83: Merge tag 'pull-tcg-20240523' of https://gitlab.com/rth7680/qemu into staging (2024-05-23 09:47:40 -0700) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-lu-20240526 for you

[PULL 19/28] linux-user/i386: Fix -mregparm=3 for signal delivery

Since v2.6.19, the kernel has supported -mregparm=3. Signed-off-by: Richard Henderson --- linux-user/i386/signal.c | 24 +++- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/linux-user/i386/signal.c b/linux-user/i386/signal.c index 3271ebd333..6763b4bda8

[PULL 16/28] linux-user/i386: Remove xfeatures from target_fpstate_fxsave

This is easily computed by advancing past the structure. At the same time, replace the magic number "64". Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- linux-user/i386/signal.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/linux-user/i386/signal.c

[PULL 01/28] target/i386: Add tcg/access.[ch]

Provide a method to amortize page lookup across large blocks. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/tcg/access.h| 40 + target/i386/tcg/access.c| 169 target/i386/tcg/meson.build | 1 + 3 files

[PULL 12/28] target/i386: Split out do_xsave_chk

This path is not required by user-only, and can in fact be shared between xsave and xrstor. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 51 +++- 1 file changed, 27 insertions(+), 24 deletions(-) diff --git

[PULL 18/28] linux-user/i386: Split out struct target_fregs_state

Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- linux-user/i386/signal.c | 43 +++- 1 file changed, 25 insertions(+), 18 deletions(-) diff --git a/linux-user/i386/signal.c b/linux-user/i386/signal.c index 5b1c570bff..3271ebd333 100644 ---

[PULL 03/28] target/i386: Convert helper_{fbld, fbst}_ST0 to X86Access

Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 25 +++-- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index 1662643a8f..6237cd8383 100644 ---

[PULL 13/28] target/i386: Add rbfm argument to cpu_x86_{xsave, xrstor}

For now, continue to pass all 1's from signal.c. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/cpu.h| 4 ++-- linux-user/i386/signal.c | 4 ++-- target/i386/tcg/fpu_helper.c | 8 3 files changed, 8 insertions(+), 8 deletions(-) diff --git

[PULL 11/28] target/i386: Convert do_xrstor_* to X86Access

The body of do_xrstor is now fully converted. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 51 ++-- 1 file changed, 31 insertions(+), 20 deletions(-) diff --git a/target/i386/tcg/fpu_helper.c

[PULL 02/28] target/i386: Convert do_fldt, do_fstt to X86Access

Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 44 +--- 1 file changed, 31 insertions(+), 13 deletions(-) diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index ece22a3553..1662643a8f 100644 ---

[PULL 20/28] linux-user/i386: Return boolean success from restore_sigcontext

Invert the sense of the return value and use bool. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- linux-user/i386/signal.c | 51 1 file changed, 25 insertions(+), 26 deletions(-) diff --git a/linux-user/i386/signal.c

[PULL 24/28] target/i386: Convert do_xsave to X86Access

Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- linux-user/i386/signal.c | 2 +- target/i386/tcg/fpu_helper.c | 72 +--- 2 files changed, 43 insertions(+), 31 deletions(-) diff --git a/linux-user/i386/signal.c b/linux-user/i386/signal.c

[PULL 21/28] linux-user/i386: Return boolean success from xrstor_sigcontext

Invert the sense of the return value and use bool. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- linux-user/i386/signal.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/linux-user/i386/signal.c b/linux-user/i386/signal.c index

[PULL 22/28] linux-user/i386: Fix allocation and alignment of fp state

For modern cpus, the kernel uses xsave to store all extra cpu state across the signal handler. For xsave/xrstor to work, the pointer must be 64 byte aligned. Moreover, the regular part of the signal frame must be 16 byte aligned. Attempt to mirror the kernel code as much as possible. Use enum

[PULL 27/28] target/i386: Pass host pointer and size to cpu_x86_{fxsave, fxrstor}

We have already validated the memory region in the course of validating the signal frame. No need to do it again within the helper function. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/cpu.h| 4 ++-- linux-user/i386/signal.c | 13 +

[PULL 09/28] tagret/i386: Convert do_fxsave, do_fxrstor to X86Access

Move the alignment fault from do_* to helper_*, as it need not apply to usage from within user-only signal handling. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 84 1 file changed, 48 insertions(+), 36

[PULL 23/28] linux-user/i386: Honor xfeatures in xrstor_sigcontext

Signed-off-by: Richard Henderson --- linux-user/i386/signal.c | 19 ++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/linux-user/i386/signal.c b/linux-user/i386/signal.c index 47e6c0ff0d..e716ec8989 100644 --- a/linux-user/i386/signal.c +++

[PULL 28/28] target/i386: Pass host pointer and size to cpu_x86_{xsave, xrstor}

We have already validated the memory region in the course of validating the signal frame. No need to do it again within the helper function. In addition, return failure when the header contains invalid xstate_bv. The kernel handles this via exception handling within XSTATE_OP within

[PULL 04/28] target/i386: Convert do_fldenv to X86Access

Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 30 ++ 1 file changed, 14 insertions(+), 16 deletions(-) diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index 6237cd8383..5ad6e04639 100644 ---

[PULL 25/28] target/i386: Convert do_xrstor to X86Access

Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 106 +-- 1 file changed, 64 insertions(+), 42 deletions(-) diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index f5748b72b8..1ac61c5d7d 100644

[PULL 17/28] linux-user/i386: Replace target_fpstate_fxsave with X86LegacyXSaveArea

Use the structure definition from target/i386/cpu.h. The only minor quirk is re-casting the sw_reserved area to the OS specific struct target_fpx_sw_bytes. Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- linux-user/i386/signal.c | 71 +++- 1

[PULL 06/28] target/i386: Convert do_fsave, do_frstor to X86Access

Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 60 1 file changed, 33 insertions(+), 27 deletions(-) diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index 01e9a1fbbf..df12eac71e 100644

Re: [PATCH v12 00/13] Support blob memory and venus on qemu

On 5/22/24 12:00, Alex Bennée wrote: > I get a boot up with a lot of: > (qemu:1545322): Gdk-WARNING **: 09:26:09.470: eglMakeCurrent failed > (qemu:1545322): Gdk-WARNING **: 09:26:09.470: eglMakeCurrent failed > (qemu:1545322): Gdk-WARNING **: 09:26:09.470: eglMakeCurrent failed >

Re: [PATCH v12 03/13] virtio-gpu: Use pkgconfig version to decide which virgl features are available

On 5/22/24 15:48, Alex Bennée wrote: >> New virglrerenderer features were stabilized with release of v1.0.0. >> Presence of symbols in virglrenderer.h doesn't guarantee ABI compatibility >> with pre-release development versions of libvirglerender. Use virglrenderer >> version to decide reliably

Re: [PATCH v12 00/13] Support blob memory and venus on qemu

On 5/22/24 12:00, Alex Bennée wrote: > Dmitry Osipenko writes: > >> On 5/21/24 17:57, Alex Bennée wrote: >>> Alex Bennée writes: >>> Dmitry Osipenko writes: > Hello, > > This series enables Vulkan Venus context support on virtio-gpu. > > All virglrender and almost

[PATCH 29/43] target/ppc/mmu-hash32.c: Move get_pteg_offset32() to the header

This function is a simple shared function, move it to other similar static inline functions in the header. Signed-off-by: BALATON Zoltan --- target/ppc/mmu-hash32.c | 7 --- target/ppc/mmu-hash32.h | 6 +- 2 files changed, 5 insertions(+), 8 deletions(-) diff --git

[PATCH 31/43] target/ppc/mmu-radix64: Remove externally unused parts from header

Move the parts not needed outside of mmu-radix64.c from the header to the C file to leave only parts in the header that need to be exported. Also drop unneded include of this header. Signed-off-by: BALATON Zoltan --- target/ppc/mmu-book3s-v3.c | 1 - target/ppc/mmu-radix64.c | 49

[PATCH 41/43] target/ppc: Change MMU xlate functions to take CPUState

The callers of xlate functions get CPUState which is then cast to PowerPCCPU that is then cast back to CPUState by most xlate functions. Avoid this back and forth casting by passing the existing CPUState to xlate functions and let them convert it as needed. Signed-off-by: BALATON Zoltan ---

[PATCH 15/43] target/ppc/mmu_common.c: Simplify a switch statement

In mmu6xx_get_physical_address() the switch handles all cases so the default is never reached and can be dropped. Also group together cases which just return -4. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 19 --- 1 file changed, 4 insertions(+), 15 deletions(-)

[PATCH 34/43] target/ppc/internal.h: Consolidate ifndef CONFIG_USER_ONLY blocks

A few pte related definitions are between two ifndef CONFIG_USER_ONLY blocks but these are not needed for user only and should also be within these blocks. Consolidate the ifndef blocks so all user only and not user only definitions are in one #ifdef #else at the end of the file. Signed-off-by:

[PATCH 43/43] target/ppc/mmu-hash32.c: Change parameter type of ppc_hash32_direct_store

This function needs CPUState and env but takes PowerPCCPU and cast that. We already have the right types in the caller so pass them to this function to avoid casting. Signed-off-by: BALATON Zoltan --- target/ppc/mmu-hash32.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff

[PATCH 10/43] target/ppc/mmu_common.c: Remove hash field from mmu_ctx_t

Return hash value via a parameter and remove it from mmu_ctx.t. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 19 --- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index 0a07023f48..e3537c63c0

[PATCH 16/43] target/ppc/mmu_common.c: Inline and remove ppc6xx_tlb_pte_check()

This function is only called once and we can make the caller simpler by inlining it. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 71 + 1 file changed, 22 insertions(+), 49 deletions(-) diff --git a/target/ppc/mmu_common.c

[PATCH 11/43] target/ppc/mmu_common.c: Remove pte_update_flags()

This function is used only once, its return value is ignored and one of its parameter is a return value from a previous call. It is better to inline it in the caller and remove it. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 41 + 1 file

[PATCH 37/43] target/ppc/mmu-hash32.c: Return and use pte address instead of base + offset

Change ppc_hash32_pteg_search() to return pte address instead of an offset to avoid needing to get the base and add offset to it when we already have the address we need. Signed-off-by: BALATON Zoltan --- target/ppc/mmu-hash32.c | 51 - 1 file changed, 20

[PATCH 36/43] target/ppc/mmu-hash32: Remove some static inlines from header

Two of these are not used anywhere and the other two are used only once and can be inlined and removed from the header. Signed-off-by: BALATON Zoltan --- target/ppc/mmu-hash32.c | 5 +++-- target/ppc/mmu-hash32.h | 32 2 files changed, 3 insertions(+), 34

[PATCH 27/43] target/ppc/mmu_common.c: Remove mmu_ctx_t

Completely get rid of mmu_ctx_t after converting the remaining functions to pass raddr and prot without the context struct. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 25 +++-- 1 file changed, 7 insertions(+), 18 deletions(-) diff --git

[PATCH 33/43] target/ppc: Remove single use static inline function

The ger_pack_masks() function is only used once and the inverse of this operation is already inlined so it can be inlined too in the only caller and removed from the header. Signed-off-by: BALATON Zoltan --- target/ppc/internal.h | 9 - target/ppc/translate/vsx-impl.c.inc

[PATCH 32/43] target/ppc: Remove includes from mmu-book3s-v3.h

Drop includes from header that is not needed by the header itself and only include them from C files that really need it. Signed-off-by: BALATON Zoltan --- target/ppc/mmu-book3s-v3.h | 3 --- target/ppc/mmu-hash64.c| 1 + target/ppc/mmu-radix64.c | 1 + 3 files changed, 2 insertions(+), 3

[PATCH 04/43] target/ppc/mmu_common.c: Remove single use local variable

The ptev variable in ppc6xx_tlb_pte_check() is used only once and just obfuscates an otherwise clear value. Get rid of it. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/target/ppc/mmu_common.c

[PATCH 38/43] target/ppc/mmu-hash32.c: Use pte address as parameter instead of offset

Instead of getting base and adding an offset to it pass pte address to ppc_hash32_pteg_search() that the only caller of this function already has and can easily pass it. Also add a local variable in the caller to avoid getting base multiple times. Signed-off-by: BALATON Zoltan ---

[PATCH 17/43] target/ppc/mmu_common.c: Remove ptem field from mmu_ctx_t

Instead of passing around ptem in context use it once in the same function so it can be removed from mmu_ctx_t. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 23 ++- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/target/ppc/mmu_common.c

[PATCH 12/43] target/ppc/mmu_common.c: Remove nx field from mmu_ctx_t

Pass it as a parameter instead. Also use named constants instead of hex values when extracting bits from SR. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 24 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/target/ppc/mmu_common.c

[PATCH 30/43] target/ppc: Unexport some functions from mmu-book3s-v3.h

The ppc_hash64_hpt_base() and ppc_hash64_hpt_mask() functions are mostly used by mmu-hash64.c only but there is one call to ppc_hash64_hpt_mask() in hw/ppc/spapr_vhyp_mmu.c.in a helper function that can be moved to mmu-hash64.c which allows these functions to be removed from the header.

[PATCH 25/43] target/ppc: Remove bat_size_prot()

There is already a hash32_bat_prot() function that does most if this and the rest can be inlined. Export hash32_bat_prot() and rename it to ppc_hash32_bat_prot() to match other functions and use it in get_bat_6xx_tlb(). Signed-off-by: BALATON Zoltan --- target/ppc/mmu-hash32.c | 18

[PATCH 02/43] target/ppc/mmu_common.c: Remove local name for a constant

The mmask local variable is a less descriptive local name for a constant. Drop it and use the constant directly in the two places it is needed. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git

[PATCH 42/43] target/ppc/mmu-hash32.c: Change parameter type of ppc_hash32_set_[rc]

These functions need AddressSpace from CPUState but take PowerPCCPU instead and cast that. We have the right type in the caller so change the parameter type and pass the needed value to avoid casting. Signed-off-by: BALATON Zoltan --- target/ppc/mmu-hash32.c | 14 -- 1 file changed,

[PATCH 22/43] target/ppc/mmu_common.c: Stop using ctx in ppc6xx_tlb_check()

Pass raddr and prot in function parameters instead. Signed-off-by: BALATON Zoltan --- target/ppc/mmu_common.c | 26 +- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index be09c3b1a3..ede409eb99 100644

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