On 6/27/24 7:10 PM, Philippe Mathieu-Daudé wrote:
Trying to land what Vincent Palatin started 13 years ago!
https://lore.kernel.org/qemu-devel/1311635951-11047-5-git-send-email-vpala...@chromium.org/
with fixes from Sai, Joel and Cédric.
I reviewed Cédric patches but still plan to review the EXT
ping?
On 19/6/24 14:49, Philippe Mathieu-Daudé wrote:
Merge gdbstub64.c in gdbstub.c and remove uses of
target specific TARGET_AARCH64 definition.
Small step toward single ARM/Aarch64 binary.
Philippe Mathieu-Daudé (2):
target/arm: Merge gdbstub64.c within gdbstub.c
target/arm: Always bui
If we simply move the set_node_memory_tier() from memory_tier_init()
to late_initcall(), it will result in HMAT not registering
the mt_adistance_algorithm callback function, because
set_node_memory_tier() is not performed during the memory tiering
initialization phase, leading to a lack of correct
The current memory tier initialization process is distributed across
two different functions, memory_tier_init() and memory_tier_late_init().
This design is hard to maintain. Thus, this patch is proposed to reduce
the possible code paths by consolidating different
initialization patches into one.
We already know where colon is, so no reason to search for it. Also,
avoid a code, which looks like we forget to check return value of
strchr() to NULL.
Suggested-by: Kevin Wolf
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
This replaces my patch
[PATCH] block/curl: explicitly assert that s
On 27.06.24 21:05, Kevin Wolf wrote:
Am 27.06.2024 um 17:30 hat Vladimir Sementsov-Ogievskiy geschrieben:
strchr may return NULL if colon is not found. It seems clearer to
assert explicitly that we don't expect it here, than dereference 1 in
the next line.
Signed-off-by: Vladimir Sementsov-Ogie
Make gdb_hextomem non-internal so it's not confined to use only in
gdbstub.c.
Signed-off-by: Gustavo Romero
Reviewed-by: Richard Henderson
---
gdbstub/internals.h| 1 -
include/gdbstub/commands.h | 6 ++
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/gdbstub/internals
Add tests to exercise the MTE stubs. The tests will only run if a
version of GDB that supports MTE is available in the test environment.
Signed-off-by: Gustavo Romero
---
configure | 4 ++
tests/tcg/aarch64/Makefile.target | 14 +++-
tests/tcg/aarch64/gdbstub/tes
Allow passing the current CPU context to command handlers via user_ctx
when the handler requires it.
Signed-off-by: Alex Bennée
Signed-off-by: Gustavo Romero
---
gdbstub/gdbstub.c | 7 ++-
include/gdbstub/commands.h | 3 +++
2 files changed, 9 insertions(+), 1 deletion(-)
diff --g
If page in 'ptr_access' is inaccessible and probe is 'true'
allocation_tag_mem_probe should not throw an exception, but currently it
does, so fix it.
Signed-off-by: Gustavo Romero
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
target/arm/tcg/mte_helper.c | 3 +++
1 file changed, 3
cmd_startswith is a boolean so use 'true' to set it instead of 1.
Signed-off-by: Gustavo Romero
---
gdbstub/gdbstub.c | 80 +++
1 file changed, 40 insertions(+), 40 deletions(-)
diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c
index 5c1612ed2a..b9ad
Factor out the code used for setting the MTE TCF0 field from the prctl
code into a convenient function. Other subsystems, like gdbstub, need to
set this field as well, so keep it as a separate function to avoid
duplication and ensure consistency in how this field is set across the
board.
Signed-of
Currently, it's not possible to have stubs specific to a given target,
even though there are GDB features which are target-specific, like, for
instance, memory tagging.
This commit introduces gdb_extend_qsupported_features,
gdb_extend_query_table, and gdb_extend_set_table functions as interfaces
t
Make the MTE helpers allocation_tag_mem_probe, load_tag1, and store_tag1
available to other subsystems.
Signed-off-by: Gustavo Romero
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
target/arm/tcg/mte_helper.c | 45 -
target/arm/tcg/mte_helper.h |
This commit implements the stubs to handle the qIsAddressTagged,
qMemTag, and QMemTag GDB packets, allowing all GDB 'memory-tag'
subcommands to work with QEMU gdbstub on aarch64 user mode. It also
implements the get/set functions for the special GDB MTE register
'tag_ctl', used to control the MTE f
Move GdbCmdParseEntry and its associated types into a separate header
file to allow the use of GdbCmdParseEntry and other gdbstub command
functions outside of gdbstub.c.
Since GdbCmdParseEntry and get_param are now public, kdoc
GdbCmdParseEntry and rename get_param to gdb_get_cmd_param.
This comm
Hi Phil,
On 6/27/24 3:05 AM, Philippe Mathieu-Daudé wrote:
On 27/6/24 06:13, Gustavo Romero wrote:
Factor out the code used for setting the MTE TCF0 field from the prctl
code into a convenient function. Other subsystems, like gdbstub, need to
set this field as well, so keep it as a separate fun
Change 'process_string_cmd' to return true on success and false on
failure, instead of 0 and -1.
Signed-off-by: Gustavo Romero
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
gdbstub/gdbstub.c | 40
1 file changed, 20 insertions(+), 20 delet
This patchset adds the stubs necessary to support GDB memory tagging
commands on QEMU aarch64 user mode.
These new stubs handle the qIsAddressTagged, qMemTag, and QMemTag
packets, which allow GDB memory tagging subcommands 'check',
'print-allocation-tag', and 'set-allocation-tag' to work. The rema
Hi Phil, Alex,
On 6/27/24 9:26 AM, Philippe Mathieu-Daudé wrote:
On 27/6/24 13:05, Alex Bennée wrote:
Philippe Mathieu-Daudé writes:
On 27/6/24 06:13, Gustavo Romero wrote:
Make the gdb_first_attached_cpu and gdb_hextomem non-internal so they
are not confined to use only in gdbstub.c.
Signe
Hi Phil,
On 6/27/24 3:02 AM, Philippe Mathieu-Daudé wrote:
On 27/6/24 06:13, Gustavo Romero wrote:
Move GdbCmdParseEntry and its associated types into a separate header
file to allow the use of GdbCmdParseEntry and other gdbstub command
functions outside of gdbstub.c.
Since GdbCmdParseEntry an
On 28/6/24 06:05, Akihiko Odaki wrote:
dump_guest_core is exposed as dump-guest-core with QOM.
Signed-off-by: Akihiko Odaki
---
system/physmem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé
These ACMD names weren't really useful, "UNKNOWN_ACMD" is simpler.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 7f93d363c7..19322c558f 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@
These CMD names weren't really useful, "UNKNOWN_CMD" is simpler.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 19322c558f..0a7b422b2c 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -241,12 +241,7 @@ static
Some commands expect less than BLOCK_LENGTH.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 4 ++--
hw/sd/trace-events | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 64621d4340..a0da06e017 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/s
All handlers using the 'sd_none' enum got converted,
remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/sd/sd.h | 1 -
hw/sd/sd.c | 7 +--
2 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h
index 29c76935a0..c1a35ab420 1
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 19 ---
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index a27a7e0f24..6a9d611429 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -263,7 +263,6 @@ static const char *sd_acmd_name(SDState *
All read/write on DAT lines are explicitly handled.
Reaching this point would be a programming error:
replace by an assertion.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 0a7b422b2
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 25 +
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 167e1c517a..a27a7e0f24 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -263,7 +263,6 @@ static const char *sd_acmd_name(SD
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 82 ++
1 file changed, 45 insertions(+), 37 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index cd207a3090..167e1c517a 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1704,6 +1704,50 @@ st
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 9d66c3715a..cd207a3090 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -263,7 +263,6 @@ static const char *sd_acmd_name(SDSta
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 5323a42df2..9d66c3715a 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -263,7 +263,7 @@ static const char *sd_acmd_name(SDSt
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 0310a5a3a1..5323a42df2 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -260,7 +260,6 @@ static const char *sd_cmd_name(SDState
dump_guest_core is exposed as dump-guest-core with QOM.
Signed-off-by: Akihiko Odaki
---
system/physmem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/system/physmem.c b/system/physmem.c
index b7847db1a2c5..effa97184f25 100644
--- a/system/physmem.c
+++ b/system/physmem.c
Since srai.w is a valid instruction on la32, remove the avail_64 check
and simplify trans_srai_w().
Fixes: c0c0461e3a06 ("target/loongarch: Add avail_64 to check la64-only
instructions")
Reviewed-by: Richard Henderson
Signed-off-by: Feiyang Chen
---
target/loongarch/tcg/insn_trans/trans_shift.
> > > that OS cannot get control of SHPC hotplug and hotplug device to
> > > the PCI bridge will fail when we use SHPC Native type:
> > >
> > > [3.336059] shpchp :00:03.0: Requesting control of SHPC hotplug via
> > > OSHP (\_SB_.PCI0.S28_)
> > > [3.337408] shpchp :00:03.0: Requesting c
> > that OS cannot get control of SHPC hotplug and hotplug device to
> > the PCI bridge will fail when we use SHPC Native type:
> >
> > [3.336059] shpchp :00:03.0: Requesting control of SHPC hotplug via
> >OSHP (\_SB_.PCI0.S28_)
> > [3.337408] shpchp :00:03.0: Requesting control of SHP
> -Original Message-
> From: Gregor Haas
> Sent: Friday, June 28, 2024 9:51 AM
> To: qemu-devel@nongnu.org
> Cc: Yao, Xingtao/姚 幸涛 ; Gregor Haas
>
> Subject: [PATCH v3] hw/core/loader: allow loading larger ROMs
>
> The read() syscall is not guaranteed to return all data from a file. T
util/cpuinfo-ppc: Add FreeBSD support
Signed-off-by: Brad Smith
---
With corrected sign-off.
Also this was based on the tcg-next branch.
util/cpuinfo-ppc.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/util/cpuinfo-ppc.c b/util/cpuinfo-ppc.c
index 47af55aa0c..0ad634
util/cpuinfo-ppc: Add FreeBSD support
Signed-off-by: default avatarBrad Smith
---
util/cpuinfo-ppc.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/util/cpuinfo-ppc.c b/util/cpuinfo-ppc.c
index 47af55aa0c..0ad634b46f 100644
--- a/util/cpuinfo-ppc.c
+++ b/util/cpuinfo-p
The read() syscall is not guaranteed to return all data from a file. The
default ROM loader implementation currently does not take this into account,
instead failing if all bytes are not read at once. This change loads the ROM
using load_image_size() instead, which correctly reads all data using
mu
> -Original Message-
> From: Gregor Haas
> Sent: Friday, June 28, 2024 8:58 AM
> To: qemu-devel@nongnu.org
> Cc: Yao, Xingtao/姚 幸涛 ; Gregor Haas
>
> Subject: [PATCH v2] hw/core/loader: allow loading larger ROMs
>
> The read() syscall is not guaranteed to return all data from a file. T
The read() syscall is not guaranteed to return all data from a file. The
default ROM loader implementation currently does not take this into account,
instead failing if all bytes are not read at once. This change loads the ROM
using load_image_size() instead, which correctly reads all data using
mu
Hi Xingtao,
Thank you for reproducing this -- I agree with your conclusion and will
send a v2 patchset momentarily.
Thank you,
Gregor
On Thu, Jun 27, 2024 at 5:44 PM Xingtao Yao (Fujitsu) <
yaoxt.f...@fujitsu.com> wrote:
> Hi, Gregor
>
>
>
> >rom: file fw_payload.bin: read error: rc=2147479552
Hi, Gregor
>rom: file fw_payload.bin: read error: rc=2147479552 (expected 2303760392)
>qemu-system-riscv64: could not load firmware 'fw_payload.bin'
Thanks, I was able to reproduce the problem when the images size is larger than
2147479552.
I found that in my test environment, the maximum value
On 6/25/24 11:08, Manos Pitsidianakis wrote:
On Tue, 25 Jun 2024 19:00, Zhao Liu wrote:
[snip]
This is for future-proofing the Rust integration in general. I
haven't been
able to compile under macos yet because bindgen cannot find the system clang
header. I also don't have a windows pc to test
From: Bryan Zhang
Adds an integration test for 'qatzip'.
Signed-off-by: Bryan Zhang
Signed-off-by: Hao Xiang
Signed-off-by: Yichen Wang
Reviewed-by: Fabiano Rosas
---
tests/qtest/migration-test.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/tests/
v3:
- Rebase changes on top of master
- Merge two patches per Fabiano Rosas's comment
- Add versions into comments and documentations
v2:
- Rebase changes on top of recent multifd code changes.
- Use QATzip API 'qzMalloc' and 'qzFree' to allocate QAT buffers.
- Remove parameter tuning and use QATz
From: Bryan Zhang
Adds support for 'qatzip' as an option for the multifd compression
method parameter, and implements using QAT for 'qatzip' compression and
decompression.
Signed-off-by: Bryan Zhang
Signed-off-by: Hao Xiang
Signed-off-by: Yichen Wang
---
hw/core/qdev-properties-system.c |
From: Bryan Zhang
Add a 'qatzip' feature, which is automatically disabled, and which
depends on the QATzip library if enabled.
Signed-off-by: Bryan Zhang
Signed-off-by: Hao Xiang
Signed-off-by: Yichen Wang
---
meson.build | 10 ++
meson_options.txt | 2
From: Bryan Zhang
Adds support for migration parameters to control QATzip compression
level and to enable/disable software fallback when QAT hardware is
unavailable. This is a preparatory commit for a subsequent commit that
will actually use QATzip compression.
Signed-off-by: Bryan Zhang
Signed
On Sat, Jun 22, 2024 at 1:43 AM Markus Armbruster wrote:
> Patrick Leis writes:
>
> > Corey and Peter,
> >
> > My team builds lots of configurations for Qemu boards, and one pain point
> > has been that the qom path for a device depends on the device insertion
> > order, child[0], child[1] and t
On 6/27/24 12:25, Pierrick Bouvier wrote:
On 6/27/24 12:10, Richard Henderson wrote:
On 6/26/24 16:37, Pierrick Bouvier wrote:
Different code paths handle memory accesses:
- tcg generated code
- load/store helpers
- atomic helpers
This value is saved in cpu->plugin_state.
Atomic operations ar
On 6/27/24 12:10, Richard Henderson wrote:
On 6/26/24 16:37, Pierrick Bouvier wrote:
Different code paths handle memory accesses:
- tcg generated code
- load/store helpers
- atomic helpers
This value is saved in cpu->plugin_state.
Atomic operations are doing read/write at the same time, so we
On 6/26/24 16:37, Pierrick Bouvier wrote:
Different code paths handle memory accesses:
- tcg generated code
- load/store helpers
- atomic helpers
This value is saved in cpu->plugin_state.
Atomic operations are doing read/write at the same time, so we generate
two memory callbacks instead of one
On 6/26/24 23:04, Xingtao Yao (Fujitsu) wrote:
-Original Message-
From: Pierrick Bouvier
Sent: Thursday, June 27, 2024 1:29 PM
To: Yao, Xingtao/姚 幸涛 ; qemu-devel@nongnu.org
Cc: Alexandre Iooss ; Philippe Mathieu-Daudé
; Mahmoud Mandour ; Paolo
Bonzini ; Eduardo Habkost ;
Richard Hende
Upstream clang 18 (and backports to clang 17 in Fedora and RHEL)
implemented support for __attribute__((cleanup())) in its Thread Safety
Analysis, so we can now actually have a proper implementation of
WITH_GRAPH_RDLOCK_GUARD() that understands when we acquire and when we
release the lock.
-Wthrea
The graph lock needs to be held when calling bdrv_co_pdiscard(). Fix
block_copy_task_entry() to take it for the call.
WITH_GRAPH_RDLOCK_GUARD() was implemented in a weak way because of
limitations in clang's Thread Safety Analysis at the time, so that it
only asserts that the lock is held (which a
Newer clang versions allow us to check scoped guards more thoroughly.
Surprisingly, we only seem to have missed one instance with the old
incomplete checks.
Kevin Wolf (2):
block-copy: Fix missing graph lock
block/graph-lock: Make WITH_GRAPH_RDLOCK_GUARD() fully checked
include/block/graph-l
Am 27.06.2024 um 17:30 hat Vladimir Sementsov-Ogievskiy geschrieben:
> strchr may return NULL if colon is not found. It seems clearer to
> assert explicitly that we don't expect it here, than dereference 1 in
> the next line.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> block/curl.c |
Move detection code out of tcg, similar to other hosts.
Signed-off-by: Richard Henderson
---
host/include/riscv/host/cpuinfo.h | 23 +
tcg/riscv/tcg-target.h| 46 -
util/cpuinfo-riscv.c | 85 +++
tcg/riscv/tcg-target.c.
With recent linux kernels, there is a syscall to probe for various
ISA extensions. These bits were phased in over several kernel
releases, so we still require checks for symbol availability.
Signed-off-by: Richard Henderson
---
meson.build | 6 ++
util/cpuinfo-riscv.c | 26 +++
Reported-by: Brad Smith
Signed-off-by: Richard Henderson
---
util/cpuinfo-riscv.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/util/cpuinfo-riscv.c b/util/cpuinfo-riscv.c
index 6b97100620..abf799794f 100644
--- a/util/cpuinfo-riscv.c
+++ b/util/cpuinfo-riscv.c
@@ -13,7 +13,14 @@ st
Do cpu feature detection in util, like other hosts.
Support the OpenBSD ucontext_t.
Support the Linux __riscv_hwprobe syscall.
r~
Richard Henderson (3):
util/cpuinfo-riscv: Support host/cpuinfo.h for riscv
util/cpuinfo-riscv: Support OpenBSD signal frame
util/cpuinfo-riscv: Use linux __risc
Paolo, thank you for your comments.
On Thu, Jun 27, 2024 at 10:16 AM Paolo Bonzini wrote:
> I think the easiest options would be:
>
> 1) if possible, allocate the timer and the callbackState statically in
> the device.
I think this assumption is not good for both QEMU and us.
> 2) use "aio_wait
github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20240627-1
for you to fetch changes up to 2f5a2315b84a9b1f089ecfc3f31b29813609a7b7:
target/riscv: Apply modularized matching conditions for icount trigger
(2024-06-27 13:0
Hi Xingtao,
> Can you reproduce this issue?
Absolutely! I encountered this when trying to load an OpenSBI payload
firmware using the bios option for the QEMU RISC-V virt board. These
payload firmwares bundle the entire next boot stage, which in my case is a
build of the Linux kernel (which is a st
On 6/26/24 21:27, Brad Smith wrote:
tcg/riscv: Fix building on OpenBSD/riscv64
Use ucontext_t/struct sigcontext member name from machine/signal.h
instead of Linux specific name.
Signed-off-by: Brad Smith
---
tcg/riscv/tcg-target.c.inc | 5 +
1 file changed, 5 insertions(+)
Thanks. I'
On 27/6/24 18:47, Thomas Huth wrote:
On 27/06/2024 18.22, Philippe Mathieu-Daudé wrote:
Disable tests using 0x4567 hardcoded RCA otherwise when
using random RCA we get:
ERROR:../../tests/qtest/npcm7xx_sdhci-test.c:69:write_sdread:
assertion failed: (ret == len)
not ok /arm/npcm7xx_sdhci/
On 6/26/24 19:22, Brad Smith wrote:
util: fix building on OpenBSD/powerpc
Signed-off-by: Brad Smith
---
v2: Keep headers in the same order as they originally were.
util/cpuinfo-ppc.c | 20
1 file changed, 12 insertions(+), 8 deletions(-)
Queued, replacing v1.
r~
On Thu, Jun 27, 2024 at 6:12 PM Roman Kiryanov wrote:
>
> On Thu, Jun 27, 2024 at 6:27 AM Paolo Bonzini wrote:
> >
> > On Thu, Jun 27, 2024 at 2:32 AM Roman Kiryanov wrote:
> > > +if (qatomic_read(&ts->cb_running)) {
> > > +qemu_event_wait(&timer_list->timers_done_ev);
> > >
From: Joel Stanley
Introduced "boot-config" property to set CSD 179, the boot config
register.
With this correctly set we can use the enable bit to detect if
partition support is enabled.
Signed-off-by: Joel Stanley
Signed-off-by: Cédric Le Goater
Signed-off-by: Philippe Mathieu-Daudé
---
h
From: Joel Stanley
This assumes a specially constructed image:
dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M
dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc
dd if=u-boot.bin of=mmc-bootarea.img conv=notrunc count=64 bs=1K
cat mmc-bootarea.img obmc-phosphor-image.wic > mmc.img
From: Joel Stanley
The userdata size is derived from the file the user passes on the
command line, but we must take into account the boot areas.
Signed-off-by: Joel Stanley
Signed-off-by: Cédric Le Goater
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 4
1 file changed, 4 insert
From: Sai Pavan Boddu
switch operation in mmc cards, updated the ext_csd register to
request changes in card operations. Here we implement similar
sequence but requests are mostly dummy and make no change.
Implement SWITCH_ERROR if the write operation offset goes beyond
length of ext_csd.
Signe
From: Sai Pavan Boddu
MMC cards support different tuning sequence for entering HS200 mode.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Cédric Le Goater
Signed-off-by: Cédric Le Goater
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sdmmc-internal.h | 3 +
From: Vincent Palatin
The parameters mimick a real 4GB eMMC, but it can be set to various
sizes. Initially from Vincent Palatin
eMMC CSD is similar to SD with an option to refer EXT_CSD for larger
devices.
Signed-off-by: Vincent Palatin
Signed-off-by: Cédric Le Goater
Signed-off-by: Sai Pava
From: Cédric Le Goater
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
[PMD: Use aspeed_emmc_kludge]
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index dc692fe1fa..f875fcd741 100644
-
From: Cédric Le Goater
Signed-off-by: Cédric Le Goater
[PMD: Use aspeed_emmc_kludge]
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index f875fcd741..82e0b5838f 100644
--- a/hw/sd/sd.c
+++ b/h
From: Luc Michel
The JEDEC standards specifies a sleep state where the eMMC won't answer
any command appart from RESET and WAKEUP and go to low power state.
Implement this state and the corresponding command number 5.
Signed-off-by: Luc Michel
Signed-off-by: Francisco Iglesias
Signed-off-by: P
When booting U-boot/Linux on Aspeed boards via eMMC,
some commands don't behave as expected from the spec.
Add the 'x-aspeed-emmc-kludge' property to allow non
standard uses until we figure out the reasons.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 3 +++
1 file changed, 3 insertio
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 7c6f5ccc72..0f9bab105e 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1520,6 +1520,12 @@ static sd_rsp_type_t sd_cmd_WRITE_SINGLE_BLOCK(S
Per the spec v4.5 these commands are mandatory,
but we don't implement them.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index ebcd8c1e43..9a2bfeaab6 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -2385,24 +2
From: Cédric Le Goater
Signed-off-by: Cédric Le Goater
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/sd/sd.h | 3 +++
hw/sd/sd.c | 34 ++
2 files changed, 37 insertions(+)
diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h
index 0d6d9e452b..d3
From: Cédric Le Goater
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 9a2bfeaab6..c6e5c93acb 100644
--- a/hw/sd/sd.c
+++
From: Cédric Le Goater
The number of blocks is defined in the lower bits [15:0].
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 249fad0468..ebcd8c1e43 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -2383,6 +2383,28 @@ static const SDProto sd_proto_emmc = {
/* Only
From: Sai Pavan Boddu
Add support to Power up the card and send response r3 in case of MMC.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Cédric Le Goater
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 7 +++
1 file changed, 7 insertions(+)
diff
So far eMMC will only use sd_sleep_state, but
all all states specified for completeness.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index b0ef252001..92ac57a648 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/
Trying to land what Vincent Palatin started 13 years ago!
https://lore.kernel.org/qemu-devel/1311635951-11047-5-git-send-email-vpala...@chromium.org/
with fixes from Sai, Joel and Cédric.
I reviewed Cédric patches but still plan to review the EXT_CSD
layout and Joel "boot config" patches.
In orde
In preparation of introducing eMMC support which have
different CSD/CID structures, introduce a pair of handlers
in SDCardClass.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/sd/sd.h | 2 ++
hw/sd/sd.c | 7 +--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/inc
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 36 +---
1 file changed, 17 insertions(+), 19 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 5461e56e17..50cee5ac40 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -245,7 +245,6 @@ static const char *sd_c
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 28 +++-
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 2f853a89d1..0310a5a3a1 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -260,7 +260,6 @@ static const char *sd_cmd_name(
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index b3b4cd5a3a..2f853a89d1 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1666,6 +1666,12 @@ static sd_rsp_type_t spi_cmd_READ_OCR(SDState *
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 53 -
1 file changed, 28 insertions(+), 25 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 4d78ac5b59..5461e56e17 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -245,7 +245,6 @@ static
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 41 -
1 file changed, 20 insertions(+), 21 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 4e31dfe18f..17fec612eb 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -244,7 +244,6 @@ static const char
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 50cee5ac40..b3b4cd5a3a 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1660,6 +1660,12 @@ static sd_rsp_type_t sd_cmd_GEN_CMD(SDState *sd,
On 27/06/2024 18.22, Philippe Mathieu-Daudé wrote:
Disable tests using 0x4567 hardcoded RCA otherwise when
using random RCA we get:
ERROR:../../tests/qtest/npcm7xx_sdhci-test.c:69:write_sdread: assertion
failed: (ret == len)
not ok /arm/npcm7xx_sdhci/read_sd -
ERROR:../../tests/qtest/npc
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 17fec612eb..4d78ac5b59 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -245,7 +245,6 @@ static const char *sd_cmd_name(SDState *sd, uint
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 47 +--
1 file changed, 25 insertions(+), 22 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index a63213613b..bf9975e9b1 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -244,7 +244,6 @@ static const
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