Re: [PATCH RESEND] hw/openrisc/openrisc_sim: keep serial@90000000 as default

On Fri, Aug 23, 2024 at 09:23:23AM +0200, Ahmad Fatoum wrote: > Hello Stafford, > > On 23.08.24 08:28, Stafford Horne wrote: > > Note the distribution list you use here: openr...@lists.librecores.org > > Is old and we should use linux-openr...@vger.kernel.org. I will get the > > qemu > > maintai

[PATCH v9 06/12] acpi/generic_event_device: add an APEI error device

Adds a generic error device to handle generic hardware error events as specified at ACPI 6.5 specification at 18.3.2.7.2: https://uefi.org/specs/ACPI/6.5/18_Platform_Error_Interfaces.html#event-notification-for-generic-error-sources using HID PNP0C33. The PNP0C33 device is used to report hardware

[PATCH v9 12/12] scripts/arm_processor_error.py: retrieve mpidr if not filled

Add support to retrieve mpidr value via qom-get. Signed-off-by: Mauro Carvalho Chehab --- scripts/arm_processor_error.py | 27 +++ 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/scripts/arm_processor_error.py b/scripts/arm_processor_error.py index 62e0c566

[PATCH v9 01/12] acpi/ghes: add a firmware file with HEST address

Store HEST table address at GPA, placing its content at hest_addr_le variable. Signed-off-by: Mauro Carvalho Chehab --- Change from v8: - hest_addr_lr is now pointing to the error source size and data. Signed-off-by: Mauro Carvalho Chehab --- hw/acpi/ghes.c | 15 +++ incl

Re: [PATCH v8 13/13] acpi/ghes: check if the BIOS pointers for HEST are correct

Em Sat, 24 Aug 2024 02:15:10 +0200 Mauro Carvalho Chehab escreveu: > Ok, we could still do something like this pseudo-code to get the > error source offset: > > #define ACPI_HEST_TYPE_GHESV2 11 > > err_struct_offset = 0; > for (i = 0; i < source_id_count; i++) { >

[PATCH v9 04/12] acpi/ghes: better name GHES memory error function

The current function used to generate GHES data is specific for memory errors. Give a better name for it, as we now have a generic function as well. Signed-off-by: Mauro Carvalho Chehab --- hw/acpi/ghes-stub.c| 2 +- hw/acpi/ghes.c | 2 +- include/hw/acpi/ghes.h | 4 ++-- target/arm/

[PATCH v9 02/12] acpi/ghes: rework the logic to handle HEST source ID

The current logic is based on a lot of duct tape, with offsets calculated based on one define with the number of source IDs and an enum. Rewrite the logic in a way that it would be more resilient of code changes, by moving the source ID count to an enum and make the offset calculus more explicit.

[PATCH v9 09/12] docs: acpi_hest_ghes: fix documentation for CPER size

While the spec defines a CPER size of 4KiB for each record, currently it is set to 1KiB. Fix the documentation and add a pointer to the macro name there, as this may help to keep it updated. Signed-off-by: Mauro Carvalho Chehab Acked-by: Igor Mammedov --- docs/specs/acpi_hest_ghes.rst | 6 -

[PATCH v9 08/12] qapi/acpi-hest: add an interface to do generic CPER error injection

Creates a QMP command to be used for generic ACPI APEI hardware error injection (HEST) via GHESv2, and add support for it for ARM guests. Error injection uses ACPI_HEST_SRC_ID_QMP source ID to be platform independent. This is mapped at arch virt bindings, depending on the types supported by QEMU a

[PATCH v9 00/12] Add ACPI CPER firmware first error injection on ARM emulation

This series add support for injecting generic CPER records. Such records are generated outside QEMU via a provided script. On this version, patches were reorganized to follow this pattern: 1. Addition of hest_add_le, mapping to the beginning of the HEST error source structure size. This is t

[PATCH v9 03/12] acpi/ghes: rename etc/hardware_error file macros

Now that we have also have a file to store HEST data location, which is part of GHES, better name the file where CPER records are stored. No functional changes. Signed-off-by: Mauro Carvalho Chehab --- hw/acpi/ghes.c | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-)

[PATCH v9 05/12] acpi/ghes: add a notifier to notify when error data is ready

Some error injection notify methods are async, like GPIO notify. Add a notifier to be used when the error record is ready to be sent to the guest OS. Signed-off-by: Mauro Carvalho Chehab --- hw/acpi/ghes.c | 5 + include/hw/acpi/ghes.h | 3 +++ 2 files changed, 8 insertions(+) diff

[PATCH v9 10/12] scripts/ghes_inject: add a script to generate GHES error inject

Using the QMP GHESv2 API requires preparing a raw data array containing a CPER record. Add a helper script with subcommands to prepare such data. Currently, only ARM Processor error CPER record is supported. Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS| 3 + scrip

[PATCH v9 07/12] arm/virt: Wire up a GED error device for ACPI / GHES

Adds support to ARM virtualization to allow handling generic error ACPI Event via GED & error source device. It is aligned with Linux Kernel patch: https://lore.kernel.org/lkml/1272350481-27951-8-git-send-email-ying.hu...@intel.com/ Co-authored-by: Mauro Carvalho Chehab Co-authored-by: Jonathan

[PATCH v9 11/12] target/arm: add an experimental mpidr arm cpu property object

Accurately injecting an ARM Processor error ACPI/APEI GHES error record requires the value of the ARM Multiprocessor Affinity Register (mpidr). While ARM implements it, this is currently not visible. Add a field at CPU storing it, and place it at arm_cpu_properties as experimental, thus allowing

Re: [PATCH v8 06/13] acpi/ghes: add support for generic error injection via QAPI

Em Mon, 19 Aug 2024 14:51:36 +0200 Igor Mammedov escreveu: > > +read_ack = 1; > > +cpu_physical_memory_write(read_ack_start_addr, > > + &read_ack, (uint64_t)); > we don't do this for SEV so, why are you setting it to 1 here? According with: http

Re: [PATCH v8 05/13] acpi/ghes: rework the logic to handle HEST source ID

Em Mon, 19 Aug 2024 14:10:37 +0200 Igor Mammedov escreveu: > On Fri, 16 Aug 2024 09:37:37 +0200 > Mauro Carvalho Chehab wrote: > > > The current logic is based on a lot of duct tape, with > > offsets calculated based on one define with the number of > > source IDs and an enum. > > > > Rewrite

Re: [PULL for-9.1 0/3] Trivial patches for 2024-08-23

On 8/24/24 00:15, Michael Tokarev wrote: The following changes since commit 407f9a4b121eb65166375c410e14d7b704bc1106: Update version for v9.1.0-rc3 release (2024-08-22 15:07:32 +1000) are available in the Git repository at: https://gitlab.com/mjt0k/qemu.git tags/pull-trivial-patches for

Re: [PATCH 1/1] allow using a higher icount

Just wanted to ping the patch On Fri, Aug 16, 2024, 19:21 Elisha Hollander wrote: > Signed-off-by: Elisha Hollander > --- > accel/tcg/cpu-exec.c | 4 +--- > accel/tcg/icount-common.c | 4 ++-- > 2 files c

[PATCH] target/riscv/tcg/tcg-cpu.c: consider MISA bit choice in implied rule

Gitlab issue [1] reports a misleading error when trying to run a 'rv64' cpu with 'zfinx' and without 'f': $ ./build/qemu-system-riscv64 -nographic -M virt -cpu rv64,zfinx=true,f=false qemu-system-riscv64: Zfinx cannot be supported together with F extension The user explicitly disabled F and the e

[PATCH v3 7/7] tests/functional: Convert mips32eb 4Kc Malta avocado tests

Straight forward conversion. Update the SHA1 hashes to SHA256 hashes since SHA1 should not be used anymore nowadays. Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 1 + tests/avocado/boot_linux_console.py | 63 -- tests/functional/meson.build

[PATCH v3 1/7] tests/functional: Convert mips64el Fuloong2e avocado test (1/2)

Straight forward conversion. Update the SHA1 hashes to SHA256 hashes since SHA1 should not be used anymore nowadays. Since the asset is expected locally and the test is guarded with QEMU_TEST_ALLOW_UNTRUSTED_CODE, keep it under the 'quick' category. $ RESCUE_YL_PATH=/path/to/rescue-yl QEMU_TEST

[PATCH v3 4/7] tests/functional: Convert mips64el 5KEc Malta avocado tests

Straight forward conversion. Update the SHA1 hashes to SHA256 hashes since SHA1 should not be used anymore nowadays. Signed-off-by: Philippe Mathieu-Daudé --- tests/avocado/boot_linux_console.py | 74 --- tests/functional/test_mips64el_malta.py | 79 ++

[PATCH v3 3/7] tests/functional: Convert mips64el I6400 Malta avocado tests

Straight forward conversion. Update the SHA1 hashes to SHA256 hashes since SHA1 should not be used anymore nowadays. Reviewed-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 1 + tests/avocado/machine_mips_malta.py | 108

[PATCH v3 2/7] tests/functional: Convert mips64el Fuloong2e avocado test (2/2)

Straight forward conversion. Update the SHA1 hashes to SHA256 hashes since SHA1 should not be used anymore nowadays. Add extract_from_deb() method in qemu_test.utils package. Signed-off-by: Philippe Mathieu-Daudé --- tests/avocado/boot_linux_console.py | 21 -- tests/fun

[PATCH v3 5/7] tests/functional: Convert mips32el Malta YAMON avocado test

Straight forward conversion using the Python standard zipfile module instead of avocado.utils package. Update the SHA1 hashes to SHA256 hashes since SHA1 should not be used anymore nowadays. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- MAINTAINERS

[PATCH v3 6/7] tests/functional: Convert nanomips Malta avocado tests

Straight forward conversion. Update the SHA1 hashes to SHA256 hashes since SHA1 should not be used anymore nowadays. $ QEMU_TEST_ALLOW_UNTRUSTED_CODE=1 \ make check-functional-mipsel ... ▶ 4/4 test_mipsel_malta.MaltaMachineConsole.test_mips_malta32el_nanomips_16k_up OK ▶ 4/4 tes

[PATCH v3 0/7] tests/functional: Convert few MIPS avocado tests

$ RESCUE_YL_PATH=/path/to/fuloong2e/rescue-yl \ QEMU_TEST_ALLOW_UNTRUSTED_CODE=1 \ QEMU_TEST_FLAKY_TESTS=1 \ QEMU_TEST_TIMEOUT_EXPECTED=1 \ make check-functional V=1 ▶ 2/17 test_empty_cpu_model.EmptyCPUModel.test OK 2/17 qemu:func-qu

Re: [PATCH for-9.2] docs/devel: Remove nested-papr.txt

On 8/16/24 10:33 AM, Peter Maydell wrote: docs/devel/nested-papr.txt is entirely (apart from the initial paragraph) a partial copy of the kernel documentation https://docs.kernel.org/arch/powerpc/kvm-nested.html There's no benefit to the QEMU docs to converting this to rST, so instead delete

Re: [PATCH RFC V3 17/29] arm/virt: Release objects for *disabled* possible vCPUs after init

Hi Salil, On 8/23/24 11:17 PM, Salil Mehta wrote: On 8/22/24 8:58 PM, Salil Mehta wrote: >> On 8/21/24 8:23 PM, Salil Mehta wrote: >> >> >> >> On 8/21/24 2:40 AM, Salil Mehta wrote: >> >> > >> >> > I don’t understand this clearly. Are you suggesting to reuse only >

[PATCH] hmp: allow filtering `info tlb` entries by address on i386

This change adds an optional virtual address parameter to the `info tlb` monitor command on i386 targets, only printing a specific entry if found. Signed-off-by: Josh Junon --- hmp-commands-info.hx | 5 + target/i386/monitor.c | 45 +++ 2 files chang