On 19/09/2024 15.11, Peter Maydell wrote:
From: Marcin Juszkiewicz
FreeBSD has longer support cycle for stable release (14.x EoL in 2028)
than OpenBSD (7.3 we use is already EoL). Also bugfixes are backported
so we can stay on 14.x for longer.
Signed-off-by: Marcin Juszkiewicz
Message-id: 202
Hi Klaus,
LGTM.
On 24/09/24 08:35AM, Klaus Jensen wrote:
From: Klaus Jensen
Add a boolean prop (ctratt.mem) for setting CTRATT.MEM and default it to
unset (false) to keep existing behavior of the device intact.
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 7 ++-
hw/nvme/nvme.h | 4 ++
add support for i/o command set independent namespace data
structure(cns=8h and cns=1fh)
Signed-off-by: Klaus Jensen
Signed-off-by: Arun Kumar
---
hw/nvme/ctrl.c | 31 +++
hw/nvme/ns.c | 6 +-
hw/nvme/nvme.h | 1 +
hw/nvme/trace-events | 1
Hi Andres,
> Subject: Re: [PATCH v2 4/6] hw/gpio/aspeed: Fix clear incorrect interrupt
> status
> for GPIO index mode
>
> Hi Jamin,
>
> On Wed, 2024-09-25 at 11:34 +0800, Jamin Lin wrote:
> > The interrupt status field is W1C, where a set bit on read indicates
> > an interrupt is pending. If th
Hi Andrew,
> Subject: Re: [PATCH v2 5/6] hw/gpio/aspeed: Add AST2700 support
>
> On Wed, 2024-09-25 at 11:34 +0800, Jamin Lin wrote:
> >
> > +/* interrupt status */
> > +if (SHARED_FIELD_EX32(data, GPIO_CONTROL_INT_STATUS)) {
> > +pending = extract32(set->int_status, pin_idx, 1);
On Tue, 24 Sep 2024 16:05, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
../hw/ide/ahci.c:989:58: error: ‘tbl_entry_size’ may be used uninitialized
[-Werror=maybe-uninitialized]
Signed-off-by: Marc-André Lureau
---
hw/ide/ahci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletio
On Tue, 24 Sep 2024 16:05, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
../block/stream.c:193:19: error: ‘unfiltered_bs’ may be used uninitialized
[-Werror=maybe-uninitialized]
../block/stream.c:176:5: error: ‘len’ may be used uninitialized
[-Werror=maybe-uninitialized]
trace/tr
On Tue, 24 Sep 2024 16:05, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
../block/mirror.c:404:5: error: ‘ret’ may be used uninitialized
[-Werror=maybe-uninitialized]
../block/mirror.c:895:12: error: ‘ret’ may be used uninitialized
[-Werror=maybe-uninitialized]
../block/mirror.c:
On Tue, 24 Sep 2024 16:05, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
../hw/display/qxl.c:1352:5: error: ‘pci_region’ may be used uninitialized
[-Werror=maybe-uninitialized]
../hw/display/qxl.c:1365:22: error: ‘pci_start’ may be used uninitialized
[-Werror=maybe-uninitialized]
On Tue, 24 Sep 2024 16:05, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
../util/qemu-timer.c:198:24: error: ‘expire_time’ may be used uninitialized
[-Werror=maybe-uninitialized]
../util/qemu-timer.c:476:8: error: ‘rearm’ may be used uninitialized
[-Werror=maybe-uninitialized]
S
On 24-09-24 08:35:40, Klaus Jensen wrote:
> From: Klaus Jensen
>
> Add a boolean prop (ctratt.mem) for setting CTRATT.MEM and default it to
> unset (false) to keep existing behavior of the device intact.
>
> Signed-off-by: Klaus Jensen
Reviewed-by: Minwoo Im
KVM commit 191c8137a939 ("x86/kvm: Implement HWCR support")
introduced support for emulating HWCR MSR.
Add support for QEMU to save/load this MSR for migration purposes.
Signed-off-by: Gao Shiyuan
---
target/i386/cpu.c | 1 +
target/i386/cpu.h | 5 +
target/i386/kvm/kvm.c | 12 +++
On Wed, 2024-09-25 at 11:34 +0800, Jamin Lin wrote:
>
> +/* interrupt status */
> +if (SHARED_FIELD_EX32(data, GPIO_CONTROL_INT_STATUS)) {
> +pending = extract32(set->int_status, pin_idx, 1);
> +if (pending) {
> +if (s->pending) {
> +assert(s->pe
Hi Jamin,
On Wed, 2024-09-25 at 11:34 +0800, Jamin Lin wrote:
> The interrupt status field is W1C, where a set bit on read indicates an
> interrupt is pending. If the bit extracted from data is set it should
> clear the corresponding bit in group_value. However, if the extracted
> bit is clear the
On Wed, 25 Sep 2024, Cédric Le Goater wrote:
On 9/23/24 11:29, Bernhard Beschow wrote:
The struct is allocated once with g_new0() but never free()'d. Fix the
leakage
by adding an attribute to struct PPCE500MachineState which avoids the
allocation.
Signed-off-by: Bernhard Beschow
---
hw/ppc/
Tried to unify this meson.build with tests/tcg/plugins/meson.build but
the resulting modules are not output in the right directory.
Originally proposed by Anton Kochkov, thank you!
Solves: https://gitlab.com/qemu-project/qemu/-/issues/1710
Signed-off-by: Pierrick Bouvier
---
meson.build
Now replaced by meson build.
Signed-off-by: Pierrick Bouvier
---
configure| 18 -
Makefile | 10 -
contrib/plugins/Makefile | 87
3 files changed, 115 deletions(-)
delete mode 100644 contrib/plugins/Makefile
d
Contrib plugins have been built out of tree so far, thanks to a Makefile.
However, it is quite inconvenient for maintenance, as we may break them,
especially for specific architectures.
First patches are fixing warnings for existing plugins, then we add meson
support, and finally, we remove Makefi
Hey,
I just wanted to check on the status of this patch since it's been sitting for
a bit now and I noticed it hasn't gone into any branches. Is this waiting on
something from me?
Thanks,
Kinsey
-Original Message-
From: Francisco Iglesias
Sent: Monday, July 10, 2023 09:10
To: peter.ma
Am 25. September 2024 15:37:22 UTC schrieb "Cédric Le Goater" :
>On 9/23/24 11:29, Bernhard Beschow wrote:
>> The env pointer isn't used outside the for loop, so move it inside. After
>> that,
>> the firstenv pointer is never read, so remove it.
>
>Just wondering, have you considered introducin
Am 23. September 2024 10:04:48 UTC schrieb BALATON Zoltan :
>On Mon, 23 Sep 2024, Bernhard Beschow wrote:
>> The env pointer isn't used outside the for loop, so move it inside. After
>> that,
>> the firstenv pointer is never read, so remove it.
>
>It's probably the other way arouns, you remove
Am 25. September 2024 15:35:15 UTC schrieb "Cédric Le Goater" :
>On 9/23/24 11:29, Bernhard Beschow wrote:
>> The struct is allocated once with g_new0() but never free()'d. Fix the
>> leakage
>> by adding an attribute to struct PPCE500MachineState which avoids the
>> allocation.
>>
>> Signed-o
Am 23. September 2024 10:02:10 UTC schrieb BALATON Zoltan :
>On Mon, 23 Sep 2024, Bernhard Beschow wrote:
>> The struct is allocated once with g_new0() but never free()'d. Fix the
>> leakage
>> by adding an attribute to struct PPCE500MachineState which avoids the
>> allocation.
>>
>> Signed-of
On Fri, Sep 20, 2024 at 10:43:31AM +0800, Yong Huang wrote:
> Yes, invoke migration_bitmap_sync_precopy more frequently is also my
> first idea but it involves bitmap updating and interfere with the behavior
> of page sending, it also affects the migration information stats and
> interfere other mi
This patch adds support for SMBIOS type 7 (Cache Information) to qemu.
level: cache level (1-8)
size: cache size in bytes
Example usage:
-smbios type=7,level=1,size=0x8000
Signed-off-by: Hal Martin
---
hw/smbios/smbios.c | 65
include/hw/firmware/
On Wed, Sep 25, 2024 at 05:36:22PM +0200, Julia Suvorova wrote:
> This is necessary to provide discernible error messages to the caller.
>
> Signed-off-by: Julia Suvorova
Reviewed-by: Peter Xu
One nitpick below:
> ---
> accel/kvm/kvm-all.c| 41 +-
>
On Wed, Sep 25, 2024 at 05:36:23PM +0200, Julia Suvorova wrote:
> To help debug and triage future failure reports (akin to [1,2]) that
> may occur during kvm_arch_put/get_registers, the error path of each
> action is accompanied by unique error message.
>
> [1] https://issues.redhat.com/browse/RHE
From: Frederic Barrat
These XIVE tests include:
- General interrupt IRQ tests that:
- enable and trigger an interrupt
- acknowledge the interrupt
- end of interrupt processing
- Test the Pull Thread Context to Odd Thread Reporting Line
- Test the different cache flush inject and queue sync
On 9/25/24 1:39 PM, Andrew Jones wrote:
commit 6df664f87c73 ("Revert "hw/riscv/virt.c: imsics DT: add
'#msi-cells'"") removed #msi-cells. Now that we have a Linux
commit to reference add a comment explaining why it was removed
to avoid it getting added back due to DT validation failures.
Sign
From: Pierrick Bouvier
Mention it's now possible to build with gcc, instead of clang, and
explain how to build a sanitized glib version.
Signed-off-by: Pierrick Bouvier
Reviewed-by: Thomas Huth
Message-Id: <20240910174013.141-4-pierrick.bouv...@linaro.org>
Signed-off-by: Alex Bennée
---
Hi Gustavo,
On 25-09-2024 09:17 pm, Gustavo Romero wrote:
Hi Ganapatrao,
Sorry for the delay on replying it. I was attending KVM Forum and
commuting.
On 9/20/24 09:37, Ganapatrao Kulkarni wrote:
Extend the 'mte' property for the virt machine to cover KVM as
well. For KVM, we don't allocat
On 9/25/24 04:09, Thomas Huth wrote:
The following changes since commit 01dc65a3bc262ab1bec8fe89775e9bbfa627becb:
Merge tag 'pull-target-arm-20240919' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-09-19
14:15:15 +0100)
are available in the Git repository at:
htt
On 9/24/24 05:08, Daniel P. Berrangé wrote:
On Tue, Sep 24, 2024 at 01:02:26PM +0100, Alex Bennée wrote:
Manos Pitsidianakis writes:
Hello Daniel,
On Tue, 24 Sept 2024 at 11:45, Daniel P. Berrangé wrote:
On Mon, Sep 23, 2024 at 10:09:32PM +0300, Manos Pitsidianakis wrote:
Hello Daniel,
The mips64el cross setup is very broken for bullseye which has now
entered LTS support so is unlikely to be fixed. While we still can't
build the container for bookworm due to a single missing dependency
that will hopefully get fixed in due course. For the sake of keeping
the CI green we mark it as
We didn't notice breakage of aarch64_be because we don't have any TCG
tests for it. However while the existing aarch64 compiler can target
big-endian builds no one packages a BE libc. Instead we bang some
rocks together to do the most basic of hello world with a nostdlib
syscall test.
Signed-off-b
On 9/25/24 10:11, Alex Bennée wrote:
Welcome to the first post KVM forum series. We have:
- fix from Ilya for microblaze atomics
- Pierrick's tsan updates
- I've added my testing and gdbstub trees to MAINTAINERS
- enabled a very basic aarch64_be-linux-user test
- fixed the missing
I put it under my name as there may be other maintainer testing trees
as well.
Signed-off-by: Alex Bennée
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ffacd60f40..7ac2252303 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4114,6 +4114,7 @@ Bu
From: Pierrick Bouvier
When building with gcc-12 -fsanitize=thread, gcc reports some
constructions not supported with tsan.
Found on debian stable.
qemu/include/qemu/atomic.h:36:52: error: ‘atomic_thread_fence’ is not supported
with ‘-fsanitize=thread’ [-Werror=tsan]
36 | #define smp_mb()
Attempting to run the binary asserts when it can't find the XML entry.
We can fix it so we don't although I suspect other stuff is broken.
Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2580
Signed-off-by: Alex Bennée
---
configs/targets/aarch64_be-linux-user.mak | 2 +-
1 file changed, 1
Testing non-auto built docker containers (i.e. custom built compilers)
is a bit fiddly as you couldn't continue a build with a previously
locally built container. While you can play games with REGISTRY its
simpler to allow a NOFETCH that will go through the cached build
process when you run the tes
From: Ilya Leoshkevich
GCC produces invalid code for microblaze atomics.
The fix is unfortunately not upstream, so fetch it from an external
location and apply it locally.
Suggested-by: Peter Maydell
Signed-off-by: Ilya Leoshkevich
Message-Id: <20240919152308.10440-1-...@linux.ibm.com>
Signed
Welcome to the first post KVM forum series. We have:
- fix from Ilya for microblaze atomics
- Pierrick's tsan updates
- I've added my testing and gdbstub trees to MAINTAINERS
- enabled a very basic aarch64_be-linux-user test
- fixed the missing gdb XML fails that cause aarch64_be-linux-u
From: Pierrick Bouvier
Found on debian stable.
../target/i386/kvm/kvm.c: In function ‘kvm_handle_rdmsr’:
../target/i386/kvm/kvm.c:5345:1: error: control reaches end of non-void
function [-Werror=return-type]
5345 | }
| ^
../target/i386/kvm/kvm.c: In function ‘kvm_handle_wrmsr’:
../target
Make it easy for people to see what is already queued.
Signed-off-by: Alex Bennée
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7ac2252303..f34b8843e4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3028,6 +3028,7 @@ F: gdb-xml/
F: tests/tcg/
commit 6df664f87c73 ("Revert "hw/riscv/virt.c: imsics DT: add
'#msi-cells'"") removed #msi-cells. Now that we have a Linux
commit to reference add a comment explaining why it was removed
to avoid it getting added back due to DT validation failures.
Signed-off-by: Andrew Jones
---
hw/riscv/virt.c
Hi Ganapatrao,
Sorry for the delay on replying it. I was attending KVM Forum and commuting.
On 9/20/24 09:37, Ganapatrao Kulkarni wrote:
Extend the 'mte' property for the virt machine to cover KVM as
well. For KVM, we don't allocate tag memory, but instead enable
the capability.
If MTE has bee
On 9/23/24 11:30, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/usb/hcd-ehci-sysbus.c | 118 +--
1 file changed, 50 insertions(+), 68 deletions(-)
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw
Sob is missing.
Thanks,
C.
On 9/23/24 11:30, Bernhard Beschow wrote:
---
hw/rtc/ds1338.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/hw/rtc/ds1338.c b/hw/rtc/ds1338.c
index a5fe221418..6de13caf99 100644
--- a/hw/rtc/ds1338.c
+++ b/hw/rtc/ds1338
On 9/23/24 11:30, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/i2c/smbus_eeprom.c | 19 ---
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c
index 9e
On 9/23/24 11:30, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/block/pflash_cfi01.c | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
On 9/23/24 11:30, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/sd/sdhci.c | 62 +--
1 file changed, 26 insertions(+), 36 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
On 9/23/24 11:30, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/net/fsl_etsec/etsec.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/hw/net/fsl_etsec/etsec.c b/hw/net/fsl_etsec/etse
On 9/23/24 11:30, Bernhard Beschow wrote:
Allows to clearly mark code sections relying on this device type.
Signed-off-by: Bernhard Beschow
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/ppc/e500.c | 2 +-
hw/intc/Kconfig | 4
hw/intc/meson.build | 3 +--
3 files
On 9/23/24 11:30, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/gpio/mpc8xxx.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/hw/gpio/mpc8xxx.c b/hw/gpio/mpc8xxx.c
index 63b7a5c881.
On 9/23/24 11:30, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/ppc/mpc8544_guts.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c
index 6
On 9/23/24 11:30, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/pci-host/ppce500.c | 42 ++
1 file changed, 18 insertions(+), 24 deletions(-)
diff --git a/hw/pci-host/ppce500.c b/hw/pci
On 9/23/24 11:30, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/i2c/mpc_i2c.c| 9 +
hw/i2c/trace-events | 5 +
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/i2c/mpc_i2c.c b/hw/i2c/mpc_i2c
On 9/23/24 11:30, Bernhard Beschow wrote:
Signed-off-by: Bernhard Beschow
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/i2c/mpc_i2c.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/hw/i2c/mpc_i2c.c b/hw/i2c/mpc_i2c.c
index 3d79c15653..16f4
To help debug and triage future failure reports (akin to [1,2]) that
may occur during kvm_arch_put/get_registers, the error path of each
action is accompanied by unique error message.
[1] https://issues.redhat.com/browse/RHEL-7558
[2] https://issues.redhat.com/browse/RHEL-21761
Signed-off-by: Jul
There were a few bugs with silent cpu failures during migrations [1].
The failures are no longer silent thanks to [2], but still
indistinguishable, making diagnostics difficult.
This patchset reworks kvm_arch_get/put_registers to handle Error** and
return a correct message, with x86_64 as a start.
This is necessary to provide discernible error messages to the caller.
Signed-off-by: Julia Suvorova
---
accel/kvm/kvm-all.c| 41 +-
include/sysemu/kvm.h | 4 ++--
target/arm/kvm.c | 4 ++--
target/i386/kvm/kvm.c | 4 ++--
targe
On 9/23/24 11:29, Bernhard Beschow wrote:
When compiling a decompiled device tree blob created with dumpdtb, dtc complains
with:
/soc@e000/i2c@3000: incorrect #address-cells for I2C bus
/soc@e000/i2c@3000: incorrect #size-cells for I2C bus
Fix this by adding the missing device tre
On 9/23/24 11:29, Bernhard Beschow wrote:
The env pointer isn't used outside the for loop, so move it inside. After that,
the firstenv pointer is never read, so remove it.
Just wondering, have you considered introducing an PowerPCCPU array
under the machine state ?
This would be an intermediat
On 9/23/24 11:29, Bernhard Beschow wrote:
The struct is allocated once with g_new0() but never free()'d. Fix the leakage
by adding an attribute to struct PPCE500MachineState which avoids the
allocation.
Signed-off-by: Bernhard Beschow
---
hw/ppc/e500.h | 8
hw/ppc/e500.c | 17 -
On Tue, Sep 24, 2024 at 08:25:22AM +, Yuchen wrote:
>
>
> > -邮件原件-
> > 发件人: Daniel P. Berrangé
> > 发送时间: 2024年9月24日 0:59
> > 收件人: yuchen (CCSPL)
> > 抄送: Peter Xu ; faro...@suse.de;
> > qemu-devel@nongnu.org
> > 主题: Re: 回复: [PATCH] migration/multifd: receive channel socket needs to
>
The simplified emulation of vector loads and stores that bypasses the memory
probing in the vext_ldst_us helper function seem to benefit only the user mode.
We therefore limit this approach to the user mode configuration.
Signed-off-by: Paolo Savini
---
target/riscv/vector_helper.c | 3 ++-
1 fi
This patch addresses the suggestion given by Richard Handerson here:
https://patchew.org/QEMU/20240717153040.11073-1-paolo.sav...@embecosm.com/20240717153040.11073-2-paolo.sav...@embecosm.com/#aff5f930-d291-4ff5-8f24-53291059d...@linaro.org
about the ineffectiveness of the optimization of the loa
On Mon, Sep 23, 2024 at 01:04:17AM +, Gonglei (Arei) wrote:
> Hi,
>
> > -Original Message-
> > From: Michael Galaxy [mailto:mgal...@akamai.com]
> > Sent: Monday, September 23, 2024 3:29 AM
> > To: Michael S. Tsirkin ; Peter Xu
> > Cc: Gonglei (Arei) ; qemu-devel@nongnu.org;
> > yu.zh.
On 9/11/2024 3:45 AM, Eugenio Perez Martin wrote:
On Wed, Sep 11, 2024 at 11:06 AM Si-Wei Liu wrote:
On 9/9/2024 11:22 PM, Eugenio Perez Martin wrote:
On Tue, Sep 10, 2024 at 7:30 AM Si-Wei Liu wrote:
Sorry for the delayed response, it seems I missed the email reply for
some reason duri
On Mon, 2024-09-02 at 16:40 +0200, Stefano Garzarella wrote:
> On Tue, Aug 13, 2024 at 04:01:02PM GMT, Roy Hopkins wrote:
> > Here is v5 of the set of patches to add support for IGVM files to QEMU. This
> > is
> > based on commit 0f397dcfec of qemu.
> >
> > This version addresses the review commen
On Wed, 25 Sep 2024 06:04:13 +0200
Mauro Carvalho Chehab wrote:
> The current code is actually dependent on having just one
> error structure with a single source.
>
> As the number of sources should be arch-dependent, as it
> will depend on what kind of synchronous/assynchronous
> notifications
Thank you very much. Adding kaslr successfully solved the problem.
Ilya Leoshkevich 于2024年9月24日周二 00:34写道：
> On Mon, 2024-09-23 at 22:36 +0800, jie ren wrote:
> > Hi, I have a question for help
> > I recently Using ubuntu24.4 system qemu-system-aarch64 +gdb-
> > multiarch to debug the kerne
On Wed, 25 Sep 2024 06:04:12 +0200
Mauro Carvalho Chehab wrote:
> HEST source ID is actually a 16-bit value
Indeed.
Reviewed-by: Jonathan Cameron
>
> Signed-off-by: Mauro Carvalho Chehab
> ---
> hw/acpi/ghes-stub.c| 2 +-
> hw/acpi/ghes.c | 2 +-
> include/hw/acpi/ghes.h | 2 +-
>
On Wed, 25 Sep 2024 06:04:11 +0200
Mauro Carvalho Chehab wrote:
> acpi_ghes_record_errors() has an assert() at the beginning
> to ensure that source_id will be lower than
> ACPI_GHES_ERROR_SOURCE_COUNT. Remove a duplicated check.
>
> Signed-off-by: Mauro Carvalho Chehab
> Reviewed-by: Igor Mamm
On Wed, 25 Sep 2024 06:04:10 +0200
Mauro Carvalho Chehab wrote:
> The first argument is source ID and not notification type.
Maybe call out that the header already differs from the two
implementations in naming this parameter. This just corrects
that.
>
> Signed-off-by: Mauro Carvalho Chehab
R
On Wed, 25 Sep 2024 06:04:09 +0200
Mauro Carvalho Chehab wrote:
> GHES has two fields that are stored on HEST error source
> blocks:
>
> - notification type, which is a number defined at the ACPI spec
> containing several arch-specific synchronous and assynchronous
> types;
> - source id, wh
On Wed, 25 Sep 2024 06:04:08 +0200
Mauro Carvalho Chehab wrote:
> The GHES driver requires not only a HEST table, but also a
> separate firmware file to store Error Structure records.
> It can't do one without the other.
>
> Simplify the caller logic for it to require one function.
>
> This pre
On Wed, 25 Sep 2024 06:04:07 +0200
Mauro Carvalho Chehab wrote:
> Reduce the ident of the function and prepares it for
> the next changes.
>
> No functional changes.
>
> Signed-off-by: Mauro Carvalho Chehab
> Reviewed-by: Igor Mammedov
Some of the alignment doesn't seem to match local style w
On Wed, 25 Sep 2024 06:04:06 +0200
Mauro Carvalho Chehab wrote:
> This is just duplicating ACPI_GHES_ERROR_SOURCE_COUNT, which
> has a better name. So, drop the duplication.
>
> Signed-off-by: Mauro Carvalho Chehab
> Reviewed-by: Igor Mammedov
FWIW
Reviewed-by: Jonathan Cameron
On 09/24/2024 09:28 AM, maobibo wrote:
Hi Tiezhu,
Does mainline gdb support to dump LBT register now?
Yes, here are the related gdb commit and kernel code:
https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=e4d74c01e773
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux
On 9/19/24 9:22 AM, Daniel P. Berrangé wrote:
On Thu, Sep 19, 2024 at 08:20:56AM -0300, Daniel Henrique Barboza wrote:
Add a QMP command that shows all specific properties of the current
accelerator in use.
Why do we need to expose /everything/ ?
I wouldn't mind pick and choose advertised
Gao Shiyuan via writes:
> As shown below, if a virtio PCI device is attached under a pci-bridge, the MR
> of VirtIOPCIRegion does not belong to any address space. So memory_region_find
> cannot be used to search for this MR.
>
> Introduce the virtio-pci and pci_bridge_pci address spaces to solv
"Gao,Shiyuan" via writes:
>> >
>> > Introduce the virtio-pci and pci_bridge_pci address spaces to solve this
>> > problem.
>> >
>> > Before:
>> > memory-region: pci_bridge_pci
>> > - (prio 0, i/o): pci_bridge_pci
>> > fe20-fe200fff (pr
On Fri, Sep 20 2024, Ganapatrao Kulkarni
wrote:
Mostly nit-picking below, otherwise LGTM.
> Extend the 'mte' property for the virt machine to cover KVM as
> well. For KVM, we don't allocate tag memory, but instead enable
> the capability.
>
> If MTE has been enabled, we need to disable migratio
Indicate that these boards can be supported, so a new 'TPL' board can be
added.
Signed-off-by: Simon Glass
---
arch/arm/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 656f588a97c..dfc735237aa 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/K
This series includes a way to deal with multiple XPL phases being
built to run from the same region of SRAM. This is useful because it may
not be possible to fit all the different phases in different parts of
the SRAM. Also it is a pain to have to build them with different values
for CONFIG_TEXT_
On Thu, 19 Sept 2024 at 18:37, Alex Bennée wrote:
>
> The following changes since commit 14556211bc6d7125a44d5b5df90caba019b0ec0e:
>
> Merge tag 'qemu-macppc-20240918' of https://github.com/mcayland/qemu into
> staging (2024-09-18 20:59:10 +0100)
>
> are available in the Git repository at:
>
>
Add ext_ssdbltrp in RISCVCPUConfig and implement MSTATUS.SDT,
{H|M}ENVCFG.DTE and modify the availability of MTVAL2 based on the
presence of the Ssdbltrp ISA extension.
Signed-off-by: Clément Léger
---
target/riscv/cpu.h| 1 +
target/riscv/cpu_bits.h | 6 ++
target/riscv/cpu_cfg.
When the Ssdbltrp extension is enabled, SSTATUS.MDT field is cleared
when executing sret if executed in M-mode. When executing mret/mnret,
SSTATUS.MDT is cleared.
Signed-off-by: Clément Léger
---
target/riscv/op_helper.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/ri
Add `ext_smdbltrp`in RISCVCPUConfig and implement MSTATUS.MDT behavior.
Signed-off-by: Clément Léger
---
target/riscv/cpu_bits.h | 1 +
target/riscv/cpu_cfg.h | 1 +
target/riscv/csr.c | 15 +++
3 files changed, 17 insertions(+)
diff --git a/target/riscv/cpu_bits.h b/target/
When the Ssdbltrp ISA extension is enabled, if a trap happens in S-mode
while SSTATUS.SDT isn't cleared, generate a double trap exception to
M-mode.
Signed-off-by: Clément Léger
---
target/riscv/cpu.c| 2 +-
target/riscv/cpu_bits.h | 1 +
target/riscv/cpu_helper.c | 47 ++
When the Smsdbltrp ISA extension is enabled, MSTATUS.MDT bit is enabled
at reset and set upon trap. If a trap happens while MSTATUS.MDT is
already set, it will trigger an abort or an NMI is the Smrnmi extension
is available.
Signed-off-by: Clément Léger
---
target/riscv/cpu.c| 3 +++
ta
A double trap typically arises during a sensitive phase in trap handling
operations — when an exception or interrupt occurs while the trap
handler (the component responsible for managing these events) is in a
non-reentrant state. This non-reentrancy usually occurs in the early
phase of trap handlin
Add the switch to enable the Smdbltrp ISA extension.
Signed-off-by: Clément Léger
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index dd3351832a..44da17bc9a 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -183,6 +
Add the switch to enable the Ssdbltrp ISA extension.
Signed-off-by: Clément Léger
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 65347ccd5a..4f52cf7ac0 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -190,6 +
When the Ssdbltrp extension is enabled, SSTATUS.SDT field is cleared
when executing sret. When executing mret/mnret, SSTATUS.SDT is cleared
when returning to U, VS or VU and VSSTATUS.SDT is cleared when returning
to VU from HS.
Signed-off-by: Clément Léger
---
target/riscv/op_helper.c | 35 +
On 23/09/2024 10.15, Alex Bennée wrote:
The mips64el cross setup is very broken for bullseye which has now
entered LTS support so is unlikely to be fixed. While we still can't
build the container for bookworm due to a single missing dependency
that will hopefully get fixed in due course. For the
From: Pierrick Bouvier
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-ID: <20240919044641.386068-2-pierrick.bouv...@
From: Pierrick Bouvier
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-ID: <20240919044641.386068-4-pierrick.bouv...@
From: Pierrick Bouvier
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
Message-ID: <20240919044641.386068-34-pierrick.bouv...
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