[PATCH v2] pcie_sriov: Fix configuration and state synchronization

2025-07-26 Thread Akihiko Odaki
Fix issues in PCIe SR-IOV configuration register handling that caused inconsistent internal state due to improper write mask handling and incorrect migration behavior. Two main problems were identified: 1. VF Enable bit write mask handling: pcie_sriov_config_write() incorrectly assumed that it

[PATCH v3] virtio-net: Fix VLAN filter table reset timing

2025-07-26 Thread Akihiko Odaki
Problem --- The expected initial state of the table depends on feature negotiation: With VIRTIO_NET_F_CTRL_VLAN: The table must be empty in accordance with the specification. Without VIRTIO_NET_F_CTRL_VLAN: The table must be filled to permit all VLAN traffic. Prior to commit 06b636a1e2ad

Re: [PATCH] hw/i386/pc: Avoid overlap between CXL window and PCI 64bit BARs in QEMU

2025-07-26 Thread Fan Ni
On Fri, Jul 25, 2025 at 02:53:37PM +0100, Jonathan Cameron wrote: > On Fri, 18 Jul 2025 21:35:45 +0800 > peng guo wrote: > > > When using a CXL Type 3 device together with a virtio 9p device in QEMU, the > > 9p device fails to initialize properly. The kernel reports the following: > > > > vi

How to fully hide QEMU VM from detection (BIOSVersion still exposes “BOCHS” and “EDK II”)

2025-07-26 Thread Саман
Dear QEMU developers, I hope this message finds you well. My goal is to run a Windows virtual machine in such a way that software like Safe Exam Browser (SEB) cannot detect that it’s running inside a virtual machine. Currently, I’m using QEMU with virt-manager on Arch Linux to run a Windows 10 g

Re: [PATCH v7 23/24] migration: Add error-parameterized function variants in VMSD struct

2025-07-26 Thread Akihiko Odaki
On 2025/07/25 21:19, Arun Menon wrote: - We need to have good error reporting in the callbacks in VMStateDescription struct. Specifically pre_save, post_save, pre_load and post_load callbacks. - It is not possible to change these functions everywhere in one patch, therefore, we introduce

Re: [PATCH] hw/i386/pc: Avoid overlap between CXL window and PCI 64bit BARs in QEMU

2025-07-26 Thread peng guo via
On Fri, Jul 25, 2025 at 02:53:37PM +0100, Jonathan Cameron wrote: > On Fri, 18 Jul 2025 21:35:45 +0800 > peng guo wrote: > > > When using a CXL Type 3 device together with a virtio 9p device in QEMU, the > > 9p device fails to initialize properly. The kernel reports the following: > > > > vi

Re: [RFC PATCH v4 07/14] virtio-pci: implement support for extended features

2025-07-26 Thread Akihiko Odaki
On 2025/07/24 4:31, Paolo Abeni wrote: Extend the features configuration space to 128 bits. If the virtio device supports any extended features, allow the common read/write operation to access all of it, otherwise keep exposing only the lower 64 bits. On migration, save the 128 bit version of th