Re: [PATCH v3 2/5] vfio/pci: Add an error handler callback

2025-09-26 Thread Markus Armbruster
Farhan Ali writes: > On 9/25/2025 9:57 PM, Markus Armbruster wrote: >> Farhan Ali writes: >> >>> Provide a vfio error handling callback, that can be used by devices to >>> handle PCI errors for passthrough devices. >>> >>> Signed-off-by: Farhan Ali >>> --- >>> hw/vfio/pci.c | 8 >>>

[QEMU PATCH 0/1] CXL: Enable FMAPI Add for MHSLDs

2025-09-26 Thread anisa . su887
From: Anisa Su This patch adds support for FMAPI Initiate Add command (5604h) for MHSLDs. It is based on the following branch: https://gitlab.com/jic23/qemu/-/tree/cxl-2025-07-03 This code was tested by starting 2 VMs, host_1, which initializes the MHSLD, and host_2, with the following topologie

[QEMU PATCH 1/1] hw/cxl/cxl-mailbox-utils: Enable FMAPI Initiate Add for MHSLD

2025-09-26 Thread anisa . su887
From: Anisa Su Call mhd_reserve_extents in FMAPI Init Add (5604h)to enable sending FMAPI Add command to MHSLD. Signed-off-by: Anisa Su --- hw/cxl/cxl-mailbox-utils.c | 25 + 1 file changed, 25 insertions(+) diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-u

Re: [PATCH] docs/code-provenance: add an exception for non-creative AI changes

2025-09-26 Thread Paolo Bonzini
On Fri, Sep 26, 2025, 16:39 Peter Maydell wrote: > I figure I'll state my personal opinion on this one. This isn't > intended to be any kind of 'veto' on the question: I don't > feel that strongly about it (and I don't think I ought to > have a personal veto in any case). > > I'm not enthusiastic

[PATCH v2 00/28] vfio: improve naming conventions

2025-09-26 Thread Mark Cave-Ayland
This series aims to further improve the naming conventions for some QOM-related parts of VFIO so that it is easier to understand the object model. The first part of the series renames VFIOContainer to VFIOLegacyContainer as the existing name is misleading, particularly in the context of classes th

[Stable-10.0.5 29/38] target/sparc: Loosen decode of RDWIM for v7

2025-09-26 Thread Michael Tokarev
From: Richard Henderson For v7, bits [18:0] are ignored. For v8, bits [18:14] are reserved and bits [13:0] are ignored. Fixes: 5d617bfba07 ("target/sparc: Move RDWIM, RDPR to decodetree") Reviewed-by: Mark Cave-Ayland Signed-off-by: Richard Henderson (cherry picked from commit dc9678cc9725d6c3

[PATCH] qga: Support guest shutdown of BusyBox-based systems

2025-09-26 Thread Rodrigo Dias Correa
On POSIX systems, the QEMU Guest Agent uses /sbin/shutdown to implement the command guest-shutdown. Systems based on BusyBox, such as Alpine Linux, don't have /sbin/shutdown. They have instead three separate commands: poweroff, reboot, and halt. Change the QEMU Guest Agent to, depending on the mod

[PATCH v2 14/32] hw: mark x86, s390, ppc, arm versioned machine types as secure

2025-09-26 Thread Daniel P . Berrangé
The versioned machine types are typically present for use in virtualization use cases and can be expected to provide a security barrier. The only exceptions are the m68k versioned machine types which are only used with TCG. Signed-off-by: Daniel P. Berrangé --- hw/arm/virt.c | 1 +

Re: [PATCH v1 3/5] hw/arm/npcm8xx.c: Add all IRQ ENUMs

2025-09-26 Thread Coco Li
Hi Phil, Thanks for the review! It looks like IRQ mapping enums on other boards also generally do not have line breaks, is it ok if I keep it like this for consistency sake? Best, Coco On Wed, Sep 24, 2025 at 6:08 PM Philippe Mathieu-Daudé wrote: > Hi, > > On 25/9/25 02:58, Coco Li wrote: > >

Re: [PATCH v2 1/2] hw/i386/isapc.c: remove support for -cpu host and -cpu max

2025-09-26 Thread Daniel P . Berrangé
On Fri, Sep 26, 2025 at 04:01:23PM +0100, Mark Cave-Ayland wrote: > On 26/09/2025 14:55, Daniel P. Berrangé wrote: > > > On Fri, Sep 26, 2025 at 02:49:00PM +0100, Mark Cave-Ayland wrote: > > > On 26/09/2025 13:39, Daniel P. Berrangé wrote: > > > > > > > On Fri, Sep 26, 2025 at 01:36:25PM +0200, M

Re: [PATCH 8/8] target/i386: SEV: Add support for setting TSC frequency for Secure TSC

2025-09-26 Thread Naveen N Rao
On Tue, Sep 23, 2025 at 09:48:07AM +0530, Nikunj A. Dadhania wrote: > > > On 9/20/2025 3:36 AM, Tom Lendacky wrote: > > On 9/18/25 05:27, Naveen N Rao (AMD) wrote: > > > > And does KVM_SET_TSC_KHZ have to be called if "tsc-frequency" wasn't set? > No, this is not required. This patch has chan

[PULL 08/44] target/arm/hvf: Remove hvf_sreg_match.key

2025-09-26 Thread Peter Maydell
From: Richard Henderson Use conversion functions instead of table lookup. Reviewed-by: Manos Pitsidianakis Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/hvf/hvf.c | 35 +++ 1 file changed, 19 in

Re: [PATCH v2 3/3] memory: Stop piggybacking on memory region owners

2025-09-26 Thread Peter Maydell
On Fri, 26 Sept 2025 at 16:59, Peter Maydell wrote: > I'm trying to repro the setup I had last year, but I can't > figure out a setup where I can get hot-unplug to work: > the "device-del" command documented in system/cpu-hotplug.html > always fails with: > > "desc": "acpi: device unplug request f

Re: [PULL 03/11] hw/loongarch: add misc register support dmsi

2025-09-26 Thread Richard Henderson
On 9/24/25 23:09, Song Gao wrote: Add feature register and misc register for dmsi feature checking and setting Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-ID: <20250916122109.749813-4-gaos...@loongson.cn> --- hw/loongarch/virt.c | 11 +++ 1 file changed, 11 insertions(+)

Re: [PATCH] migration/multifd/tls: Cleanup BYE message processing on sender side

2025-09-26 Thread Fabiano Rosas
Peter Xu writes: > This patch is a trivial cleanup to the BYE messages on the multifd sender > side. It could also be a fix, but since we do not have a solid clue, > taking this as a cleanup only. > > One trivial concern is, migration_tls_channel_end() might be unsafe to be > invoked in the migr

[Stable-10.0.5 25/38] target/sparc: Allow TRANS macro with no extra arguments

2025-09-26 Thread Michael Tokarev
From: Richard Henderson Use ## to drop the preceding comma if __VA_ARGS__ is empty. Reviewed-by: Mark Cave-Ayland Signed-off-by: Richard Henderson (cherry picked from commit b7cd0a1821adf9906c5edb248394bb2a95482656) Signed-off-by: Michael Tokarev diff --git a/target/sparc/translate.c b/targe

[PULL 15/24] contrib/plugins/execlog: Explicitly check for qemu_plugin_read_register() failure

2025-09-26 Thread Alex Bennée
From: Peter Maydell In insn_check_regs() we don't explicitly check whether qemu_plugin_read_register() failed, which confuses Coverity into thinking that sz can be -1 in the memcmp(). In fact the assertion that sz == reg->last->len means this can't happen, but it's clearer to both humans and Cov

Re: [PATCH v3 2/5] vfio/pci: Add an error handler callback

2025-09-26 Thread Farhan Ali
On 9/26/2025 12:40 AM, Cédric Le Goater wrote: On 9/26/25 06:57, Markus Armbruster wrote: Farhan Ali writes: Provide a vfio error handling callback, that can be used by devices to handle PCI errors for passthrough devices. Signed-off-by: Farhan Ali ---   hw/vfio/pci.c | 8   hw/vf

Re: [PATCH v4 3/9] tests/functional: Provide GDB to the functional tests

2025-09-26 Thread Gustavo Romero
Hi Thomas, On 9/26/25 15:08, Gustavo Romero wrote: Hi Thomas, On 9/26/25 07:03, Thomas Huth wrote: On 26/09/2025 07.15, Gustavo Romero wrote: The probe of GDB is done in 'configure' and the full path is passed to meson.build via the -Dgdb=option. Because a single functional test can cover di

[PULL 14/24] semihosting/arm-compat-semi: compile once in system and per target for user mode

2025-09-26 Thread Alex Bennée
From: Pierrick Bouvier We don't have any target dependency left in system mode, so we can compile once. User mode depends on qemu.h, which is duplicated between linux and bsd, so we can't easily compile it once. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-ID: <20250

Re: [PATCH v4 3/9] tests/functional: Provide GDB to the functional tests

2025-09-26 Thread Gustavo Romero
Hi Thomas, On 9/26/25 07:03, Thomas Huth wrote: On 26/09/2025 07.15, Gustavo Romero wrote: The probe of GDB is done in 'configure' and the full path is passed to meson.build via the -Dgdb=option. Because a single functional test can cover different arches, such as aarch64, ppc64, and x86_64, o

Re: [PATCH v2 16/27] tests/lcitool: update to debian13

2025-09-26 Thread Alex Bennée
marcandre.lur...@redhat.com writes: > From: Marc-André Lureau > > Signed-off-by: Marc-André Lureau > Reviewed-by: Daniel P. Berrangé > --- > .../dockerfiles/debian-amd64-cross.docker | 9 + > .../dockerfiles/debian-arm64-cross.docker | 9 + > .../dockerfiles/debian-ar

Re: [PATCH v3 2/5] vfio/pci: Add an error handler callback

2025-09-26 Thread Farhan Ali
On 9/25/2025 9:57 PM, Markus Armbruster wrote: Farhan Ali writes: Provide a vfio error handling callback, that can be used by devices to handle PCI errors for passthrough devices. Signed-off-by: Farhan Ali --- hw/vfio/pci.c | 8 hw/vfio/pci.h | 1 + 2 files changed, 9 insertio

Re: [PULL 54/61] i386/cpu: Enable SMM cpu address space under KVM

2025-09-26 Thread Peter Maydell
On Sat, 13 Sept 2025 at 09:25, Paolo Bonzini wrote: > > From: Xiaoyao Li > > Kirill Martynov reported assertation in cpu_asidx_from_attrs() being hit > when x86_cpu_dump_state() is called to dump the CPU state[*]. It happens > when the CPU is in SMM and KVM emulation failure due to misbehaving >

Re: [PATCH v4 1/9] tests/functional: Re-activate the check-venv target

2025-09-26 Thread Gustavo Romero
Hi Daniel, On 9/26/25 12:47, Daniel P. Berrangé wrote: On Fri, Sep 26, 2025 at 12:44:58PM -0300, Gustavo Romero wrote: Hi Daniel, On 9/26/25 05:50, Daniel P. Berrangé wrote: On Fri, Sep 26, 2025 at 10:42:22AM +0200, Thomas Huth wrote: On 26/09/2025 10.37, Daniel P. Berrangé wrote: On Fri, S

[PULL 05/24] semihosting/guestfd: compile once for system/user

2025-09-26 Thread Alex Bennée
From: Pierrick Bouvier We move relevant code to semihosting/arm-compat-semi.c, and add functions to query CONFIG_ARM_COMPATIBLE_SEMIHOSTING at runtime. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-ID: <20250822150058.18692-4-pierrick.bouv...@linaro.org> Signed-off-by:

Re: [PATCH v4 8/9] tests/functional: Adapt reverse_debugging to run w/o Avocado

2025-09-26 Thread Gustavo Romero
Hi Thomas, On 9/26/25 05:44, Thomas Huth wrote: On 26/09/2025 07.15, Gustavo Romero wrote: This commit removes Avocado as a dependency for running the reverse_debugging test. The main benefit, beyond eliminating an extra dependency, is that there is no longer any need to handle GDB packets man

[Stable-10.0.5 06/38] python: backport 'Use @asynciocontextmanager'

2025-09-26 Thread Michael Tokarev
From: John Snow This removes a non-idiomatic use of a "coroutine callback" in favor of something a bit more standardized. Signed-off-by: John Snow cherry picked from commit python-qemu-qmp@commit 97f7ffa3be17a50544b52767d14b6fd478c07b9e Signed-off-by: John Snow Reviewed-by: Daniel P. Berrangé

[PULL 10/24] semihosting/arm-compat-semi: eradicate sizeof(target_ulong)

2025-09-26 Thread Alex Bennée
From: Pierrick Bouvier No semantic change. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-ID: <20250822150058.18692-9-pierrick.bouv...@linaro.org> Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Alex Bennée Message-ID: <20250922093711.2768983-12-alex.ben...@linaro.

Re: [PATCH v2 00/14] hw/arm/smmuv3: Add initial support for Secure State

2025-09-26 Thread Eric Auger
On 9/26/25 4:54 PM, Tao Tang wrote: > > On 2025/9/26 20:24, Eric Auger wrote: >> Hi, >> >> On 9/25/25 6:26 PM, Tao Tang wrote: >>> Hi all, >>> >>> This is the second version of the patch series to introduce initial >>> support for Secure SMMUv3 emulation in QEMU. >>> >>> This version has been si

Re: [PATCH v6 2/9] target/ppc: Add IBM PPE42 family of processors

2025-09-26 Thread Chinmay Rath
On 9/26/25 01:47, Glenn Miles wrote: Adds the IBM PPE42 family of 32-bit processors supporting the PPE42, PPE42X and PPE42XM processor versions. These processors are used as embedded processors in the IBM Power9, Power10 and Power12 processors for various tasks. It is basically a stripped dow

Re: [PATCH v2 3/3] memory: Stop piggybacking on memory region owners

2025-09-26 Thread Peter Maydell
On Fri, 26 Sept 2025 at 16:16, Peter Xu wrote: > > On Fri, Sep 26, 2025 at 10:09:29AM +0100, Peter Maydell wrote: > > On Thu, 25 Sept 2025 at 21:06, Peter Xu wrote: > > > > > > On Thu, Sep 25, 2025 at 10:03:45AM +0100, Peter Maydell wrote: > > > > On Wed, 24 Sept 2025 at 22:14, Peter Xu wrote: >

[PATCH v6 01/47] hw/arm/xlnx-versal: split the xlnx-versal type

2025-09-26 Thread Luc Michel
Split the xlnx-versal device into two classes, a base, abstract class and the existing concrete one. Introduce a VersalVersion type that will be used across several device models when versal2 implementation is added. This is in preparation for versal2 implementation. Signed-off-by: Luc Michel Re

Re: [PATCH v4 16/23] util: fix interleaving of error & trace output

2025-09-26 Thread Daniel P . Berrangé
On Thu, Sep 25, 2025 at 12:54:13PM -0700, Richard Henderson wrote: > On 9/25/25 02:44, Daniel P. Berrangé wrote: > > +if (monitor_cur_is_hmp()) { > > +cur = monitor_cur(); > > +} > > Didn't your last patch set return Montor* from monitor_cur_is_hmp? > Because this takes the locks i

Re: [PATCH v2 05/27] scripts/archive-source: use a bash array

2025-09-26 Thread Alex Bennée
marcandre.lur...@redhat.com writes: > From: Marc-André Lureau > > Signed-off-by: Marc-André Lureau Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH v4 1/9] tests/functional: Re-activate the check-venv target

2025-09-26 Thread Daniel P . Berrangé
On Fri, Sep 26, 2025 at 12:44:58PM -0300, Gustavo Romero wrote: > Hi Daniel, > > On 9/26/25 05:50, Daniel P. Berrangé wrote: > > On Fri, Sep 26, 2025 at 10:42:22AM +0200, Thomas Huth wrote: > > > On 26/09/2025 10.37, Daniel P. Berrangé wrote: > > > > On Fri, Sep 26, 2025 at 10:34:01AM +0200, Thoma

Re: [PATCH 5/5] accel/kvm: Fix SIGSEGV when execute "query-balloon" after CPR transfer

2025-09-26 Thread Steven Sistare
On 9/25/2025 10:25 PM, Zhenzhong Duan wrote: After CPR transfer, source QEMU close kvm fd and free kvm_state, "query-balloon" will check kvm_state->sync_mmu and trigger NULL pointer reference. Signed-off-by: Zhenzhong Duan Reviewed-by: Steve Sistare --- accel/kvm/kvm-all.c | 2 +- 1 fil

Re: [PATCH] vfio: Remove workaround for kernel DMA unmap overflow bug

2025-09-26 Thread Alex Williamson
On Fri, 26 Sep 2025 10:54:23 +0200 Cédric Le Goater wrote: > A kernel bug was introduced in Linux v4.15 via commit 71a7d3d78e3c > ("vfio/type1: Check for address space wrap-around on unmap"), which > added a test for address space wrap-around in the vfio DMA unmap path. > Unfortunately, due to an

Re: [PATCH v2 22/27] RFC: tests/docker: add rust to debian-legacy-test-cross

2025-09-26 Thread Alex Bennée
marcandre.lur...@redhat.com writes: > From: Marc-André Lureau > > Unfortunately, debian 11 has bindgen version 0.55... > Should we install it with cargo install bindgen-cli? I wouldn't bother. This only exists for older targets that are either linux-user or unlikely to get a rust version of any

Re: [PATCH v4 1/9] tests/functional: Re-activate the check-venv target

2025-09-26 Thread Gustavo Romero
Hi Daniel, On 9/26/25 05:50, Daniel P. Berrangé wrote: On Fri, Sep 26, 2025 at 10:42:22AM +0200, Thomas Huth wrote: On 26/09/2025 10.37, Daniel P. Berrangé wrote: On Fri, Sep 26, 2025 at 10:34:01AM +0200, Thomas Huth wrote: On 26/09/2025 07.15, Gustavo Romero wrote: Add check-venv target as

Re: [PATCH v2 04/27] scripts/archive-source: silence subprojects downloads

2025-09-26 Thread Alex Bennée
marcandre.lur...@redhat.com writes: > From: Marc-André Lureau > > It's too verbose. > > Signed-off-by: Marc-André Lureau Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

[PULL 20/44] target/arm: Remove cp argument to ENCODE_AA64_CP_REG

2025-09-26 Thread Peter Maydell
From: Richard Henderson All invocations were required to pass the same value, CP_REG_ARM64_SYSREG_CP. Bake that in to the result directly. Remove CP_REG_ARM64_SYSREG_CP as unused. Reviewed-by: Manos Pitsidianakis Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by:

[PULL 21/44] target/arm: Reorder ENCODE_AA64_CP_REG arguments

2025-09-26 Thread Peter Maydell
From: Richard Henderson The order of the parameters in the Arm ARM is op0, op1, crn, crm, op2 Reorder the arguments of ENCODE_AA64_CP_REG to match. Reviewed-by: Manos Pitsidianakis Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Sign

Re: [PATCH v2 03/27] scripts/archive-source: speed up downloading subprojects

2025-09-26 Thread Alex Bennée
marcandre.lur...@redhat.com writes: > From: Marc-André Lureau > > Running meson on each subproject is quite slow. > > According to Paolo, meson will run download tasks in parallel. > > Signed-off-by: Marc-André Lureau Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH v2 3/3] memory: Stop piggybacking on memory region owners

2025-09-26 Thread Peter Xu
On Fri, Sep 26, 2025 at 10:09:29AM +0100, Peter Maydell wrote: > On Thu, 25 Sept 2025 at 21:06, Peter Xu wrote: > > > > On Thu, Sep 25, 2025 at 10:03:45AM +0100, Peter Maydell wrote: > > > On Wed, 24 Sept 2025 at 22:14, Peter Xu wrote: > > > > Side note: when I was trying to test hotplugs with i3

Re: [PATCH v2 01/27] build-sys: require -lrt when no shm_open() in std libs

2025-09-26 Thread Alex Bennée
marcandre.lur...@redhat.com writes: > From: Marc-André Lureau > > Fail during configure time if the shm functions are missing, as required > by oslib-posix.c. Note, we could further check the presence of the > function in librt. > > This is a minor cleanup/improvement. > > Signed-off-by: Marc-And

Re: [PATCH v2 00/14] hw/arm/smmuv3: Add initial support for Secure State

2025-09-26 Thread Tao Tang
On 2025/9/26 20:24, Eric Auger wrote: Hi, On 9/25/25 6:26 PM, Tao Tang wrote: Hi all, This is the second version of the patch series to introduce initial support for Secure SMMUv3 emulation in QEMU. This version has been significantly restructured based on the excellent feedback received on

Re: [PATCH v2 1/2] hw/i386/isapc.c: remove support for -cpu host and -cpu max

2025-09-26 Thread Mark Cave-Ayland
On 26/09/2025 14:55, Daniel P. Berrangé wrote: On Fri, Sep 26, 2025 at 02:49:00PM +0100, Mark Cave-Ayland wrote: On 26/09/2025 13:39, Daniel P. Berrangé wrote: On Fri, Sep 26, 2025 at 01:36:25PM +0200, Markus Armbruster wrote: Mark Cave-Ayland writes: Following recent discussions on the m

[PULL 01/44] hw/usb/hcd-uhci: don't assert for SETUP to non-0 endpoint

2025-09-26 Thread Peter Maydell
If the guest feeds invalid data to the UHCI controller, we can assert: qemu-system-x86_64: ../../hw/usb/core.c:744: usb_ep_get: Assertion `pid == USB_TOKEN_IN || pid == USB_TOKEN_OUT' failed. (see issue 2548 for the repro case). This happens because the guest attempts USB_TOKEN_SETUP to an endpo

Re: [PATCH v2 2/2] docs/about/deprecated.rst: document new restrictions for isapc CPU models

2025-09-26 Thread Peter Maydell
On Fri, 26 Sept 2025 at 13:28, Mark Cave-Ayland wrote: > > On 26/09/2025 13:05, Peter Maydell wrote: > > > On Thu, 25 Sept 2025 at 17:07, Mark Cave-Ayland > > wrote: > >> > >> Add a new paragraph in the "Backwards compatibility" section documenting > >> that > >> the isapc machine is now restric

Re: [PATCH] KVM: x86: Restrict writeback of SMI VCPU state

2025-09-26 Thread Fei Li
Dear maintainers, Could you please help to review the patch [PATCH] KVM: x86: Restrict writeback of SMI VCPU state? This fixes a race condition causing VM hang when frequently running `info registers -a` via HMP during VM startup. The issue occurs because unrestricted SMI state writeback con

[PULL 34/44] target/arm: Split out redirect_cpreg

2025-09-26 Thread Peter Maydell
From: Richard Henderson Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/tcg/translate-a64.c | 17 ++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/target/arm/tcg

Re: [PATCH v2 2/2] docs/about/deprecated.rst: document new restrictions for isapc CPU models

2025-09-26 Thread Mark Cave-Ayland
On 26/09/2025 13:05, Peter Maydell wrote: On Thu, 25 Sept 2025 at 17:07, Mark Cave-Ayland wrote: Add a new paragraph in the "Backwards compatibility" section documenting that the isapc machine is now restricted to 32-bit x86 CPUs, and -cpu host and -cpu max are no longer supported. Signed-of

Re: [PATCH v2 02/14] hw/arm/smmuv3: Correct SMMUEN field name in CR0

2025-09-26 Thread Eric Auger
Hi Tao, On 9/25/25 6:26 PM, Tao Tang wrote: > The FIELD macro for the SMMU enable bit in the CR0 register was > incorrectly named SMMU_ENABLE. > > The ARM SMMUv3 Architecture Specification (both older IHI 0070.E.a and > newer IHI 0070.G.b) consistently refers to the SMMU enable bit as SMMUEN. > >

[PULL 02/44] net/passt: Fix build failure due to missing GIO dependency

2025-09-26 Thread Peter Maydell
From: Laurent Vivier The passt networking backend uses functions from the GIO library, such as g_subprocess_launcher_new(), to manage its daemon process. So, building with passt enabled requires GIO to be available. If we enable passt and disable gio the build fails during linkage with undefined

[PATCH v2 28/32] hw/ide: mark ICH9 and ide-hd/ide-cd as secure

2025-09-26 Thread Daniel P . Berrangé
These have a long history of usage in virtualization scenarios on x86, for OS which lack modern virtio drivers for storage, and thus must be considered secure. Signed-off-by: Daniel P. Berrangé --- hw/ide/ich.c | 1 + hw/ide/ide-dev.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/h

[PULL 30/44] target/arm: Move alias setting for wildcards

2025-09-26 Thread Peter Maydell
From: Richard Henderson Move this test from add_cpreg_to_hashtable to define_one_arm_cp_reg_with_opaque, where we can also simplify it based on the loop variables. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé [PMM: adjusted placement o

[PATCH v2 13/32] machine: add helpers for declaring secure/insecure machine types

2025-09-26 Thread Daniel P . Berrangé
The current DEFINE_MACHINE macro will declare machine type without any explicit statement about the security status. As such the machine type will be treated as implicitly insecure at runtime. Introduce new DEFINE_SECURE_MACHINE and DEFINE_INSECURE_MACHINE macros that allow code to make an explici

Re: [PATCH] docs/code-provenance: add an exception for non-creative AI changes

2025-09-26 Thread Peter Maydell
On Thu, 25 Sept 2025 at 08:56, Paolo Bonzini wrote: > > AI tools can be used as a natural language refactoring engine for simple > tasks such as modifying all callers of a given function or all accesses > to a variable. These tasks are interesting for an exception because: > > * it is credible fo

[PULL 35/44] target/arm: Redirect VHE FOO_EL1 -> FOO_EL2 during translation

2025-09-26 Thread Peter Maydell
From: Richard Henderson Reviewed-by: Manos Pitsidianakis Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/cpregs.h| 6 target/arm/gdbstub.c | 5 target/arm/helper.c

[PULL 12/44] target/arm: Use raw_write in cp_reg_reset

2025-09-26 Thread Peter Maydell
From: Richard Henderson Reduce the places that know about field types by 1. Reviewed-by: Manos Pitsidianakis Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/cpu.c | 10 ++ 1 file chan

[PULL 44/44] target/arm: Implement ID_AA64PFR2_EL1

2025-09-26 Thread Peter Maydell
Currently we define the ID_AA64PFR2_EL1 encoding as reserved (with the required RAZ behaviour for unassigned system registers in the ID register encoding space). Newer architecture versions start to define fields in this ID register, so define the appropriate constants and implement it as an ID re

[PULL 27/44] target/arm: Split out alloc_cpreg

2025-09-26 Thread Peter Maydell
From: Richard Henderson Include provision for a name suffix. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/helper.c | 29 +++-- 1 file changed, 23 insertions(+), 6 de

[PULL 32/44] target/arm: Move endianness fixup for 32-bit registers

2025-09-26 Thread Peter Maydell
From: Richard Henderson Move the test outside of the banked register block, and repeat the AA32 test. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/helper.c | 17 - 1 file ch

[PULL 06/44] target/arm/hvf: Reorder DEF_SYSREG arguments

2025-09-26 Thread Peter Maydell
From: Richard Henderson The order of the parameters in the Arm ARM is op0, op1, crn, crm, op2 Reorder the arguments of DEF_SYSREG to match. Mechanical change to sysreg.c.inc using sed 's/\([^,]*\),\([^,]*\),\([^,]*\),\([^,]*\),\([^,]*\)/\1,\4,\5,\2,\3/' Reviewed-by: Manos Pitsidianakis S

Re: [PATCH v6 09/28] s390x/diag: Implement DIAG 320 subcode 2

2025-09-26 Thread Zhuoying Cai
On 9/24/25 5:53 PM, Farhan Ali wrote: > > On 9/17/2025 4:21 PM, Zhuoying Cai wrote: >> DIAG 320 subcode 2 provides verification-certificates (VCs) that are in the >> certificate store. Only X509 certificates in DER format and SHA-256 hash >> type are recognized. >> >> The subcode value is denoted

Re: [PATCH v4 09/23] util: introduce some API docs for logging APIs

2025-09-26 Thread Daniel P . Berrangé
On Thu, Sep 25, 2025 at 05:02:37PM -0700, Richard Henderson wrote: > On 9/25/25 02:44, Daniel P. Berrangé wrote: > > This addresses two key gotchas with the logging APIs: > > > > * Safely outputting a single line of text using > > multiple qemu_log() calls requires use of the > > qemu_lo

[PULL 19/44] target/arm: Convert init_cpreg_list to g_hash_table_foreach

2025-09-26 Thread Peter Maydell
From: Richard Henderson Adjust count_cpreg and add_cpreg_to_list to be used with g_hash_table_foreach instead of g_list_foreach. In this way we have the ARMCPRegInfo pointer directly rather than having to look it up from the key. Delay the sorting of the cpreg_indexes until after add_cpreg_to_l

[PULL 28/44] target/arm: Hoist the allocation of ARMCPRegInfo

2025-09-26 Thread Peter Maydell
From: Richard Henderson Pass in a newly allocated structure, rather than having to dance around allocation of the name and the structure. Since we no longer have two copies of the structure handy within add_cpreg_to_hashtable, delay the writeback of concrete values over wildcards until we're don

[PULL 17/44] target/arm: Add CP_REG_AA32_64BIT_{SHIFT,MASK}

2025-09-26 Thread Peter Maydell
From: Richard Henderson Give a name to the bit we're already using. Reviewed-by: Manos Pitsidianakis Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/cpregs.h | 15 ++- 1 file chan

[PATCH v2 10/32] hw/core: report security status in query-machines

2025-09-26 Thread Daniel P . Berrangé
Signed-off-by: Daniel P. Berrangé --- hw/core/machine-qmp-cmds.c | 1 + qapi/machine.json | 8 +++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c index 6aca1a626e..4d9906f64a 100644 --- a/hw/core/machine-qmp-cmds

[PATCH v2 07/32] system: report machine security status in help output

2025-09-26 Thread Daniel P . Berrangé
When '-machine help' is given, report the security status of each machine. Signed-off-by: Daniel P. Berrangé --- system/vl.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/system/vl.c b/system/vl.c index 716bf6d490..fec3a195f6 100644 --- a/system/vl.c +++ b/system/vl.c

[PATCH v6 09/47] hw/arm/xlnx-versal: usb: refactor creation

2025-09-26 Thread Luc Michel
Refactor the USB controller creation using the VersalMap structure. Note that the connection to the CRL is removed for now and will be re-added by next commits. Signed-off-by: Luc Michel Reviewed-by: Francisco Iglesias Reviewed-by: Edgar E. Iglesias --- include/hw/arm/xlnx-versal.h | 5 ---

[PATCH v2 12/32] docs: expand security docs with info about security status

2025-09-26 Thread Daniel P . Berrangé
The description of virtualization vs non-virtualization use cases is a crude approximation of the security characteristics of QEMU devices. Document how QEMU can be probed to obtain information on the security status of type classes, and how policies can be set to inform or control their usage. S

[PULL 31/44] target/arm: Move writeback of CP_ANY fields

2025-09-26 Thread Peter Maydell
From: Richard Henderson Move the writeback of cp, crm, opc1, opc2 to define_one_arm_cp_reg, which means we don't have to pass all those parameters down to subroutines. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter M

[PULL 13/44] target/arm: Rename all ARMCPRegInfo from opaque to ri

2025-09-26 Thread Peter Maydell
From: Richard Henderson These pointers are no opaque, they have a specific type. Reviewed-by: Manos Pitsidianakis Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/cpregs.h | 10 +- tar

[PULL 04/44] target/arm: Move compare_u64 to helper.c

2025-09-26 Thread Peter Maydell
From: Richard Henderson We will use this function beyond kvm.c. Reviewed-by: Manos Pitsidianakis Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/internals.h | 3 +++ target/arm/helper.c|

[PATCH v2 16/32] hw/core: declare 'none' machine to be insecure

2025-09-26 Thread Daniel P . Berrangé
This machine is currently intended for probing capabilities and thus is not expected to run guest workloads. In the future it might be possible to use it as a generic base from which to dynamically construct new machines, but today it has no need to be declared to be a secure machine. Signed-off-b

Re: [PATCH 4/5] vfio/iommufd: Restore vbasedev's reference to hwpt after CPR transfer

2025-09-26 Thread Steven Sistare
On 9/25/2025 10:23 PM, Zhenzhong Duan wrote: After CPR transfer, if there are more than one VFIO devices, the second device's reference to hwpt isn't restored on destination. More specifically, the device is not added to hwpt->device_list. We still need to call iommufd_cdev_attach_container(

[PULL 25/44] target/arm: Move cpreg elimination to define_one_arm_cp_reg

2025-09-26 Thread Peter Maydell
From: Richard Henderson Eliminate unused registers earlier, so that by the time we arrive in add_cpreg_to_hashtable we never skip. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/helper.c | 123 +++

[PATCH v2 23/32] hw/xen: mark all Xen related object types as being secure

2025-09-26 Thread Daniel P . Berrangé
All Xen paravirtualized devices are intended to provide a host / guest security barrier, so mark all Xen object types as scure. Signed-off-by: Daniel P. Berrangé --- hw/block/xen-block.c| 3 +++ hw/char/xen_console.c | 1 + hw/i386/xen/xen_platform.c | 1 + hw/net/xen_nic.c

[PULL 29/44] target/arm: Remove name argument to alloc_cpreg

2025-09-26 Thread Peter Maydell
From: Richard Henderson All callers now pass in->name, so take the value from there. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/helper.c | 12 ++-- 1 file changed, 6 insertions(+)

[PULL 39/44] target/arm: Replace magic GIC values by proper definitions

2025-09-26 Thread Peter Maydell
From: Philippe Mathieu-Daudé Prefer the FIELD_DP64() macro and self-describing GIC definitions over magic values. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-

Re: [PATCH 2/2] intel_iommu: Simplify caching mode check with VFIO device

2025-09-26 Thread CLEMENT MATHIEU--DRIF
Hi Zhenzhnog, Nice! Reviewed-by: Clément Mathieu--Drif Thanks On Fri, 2025-09-19 at 03:06 -0400, Zhenzhong Duan wrote: > Caution: External email. Do not open attachments or click links, unless this > email comes from a known sender and you know the content is safe. > > > In early days, we h

[PULL 23/44] target/arm: Improve asserts in define_one_arm_cp_reg

2025-09-26 Thread Peter Maydell
From: Richard Henderson Reject ARM_CP_64BIT with ARM_CP_STATE_BOTH, because encoding constrains prevent it from working. Remove some extra parens; distribute ! across && to simplify. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed

[PULL 26/44] target/arm: Add key parameter to add_cpreg_to_hashtable

2025-09-26 Thread Peter Maydell
From: Richard Henderson Hoist the computation of key into the caller, where state is a known constant. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé [PMM: added comment about CRN key field increment] Signed-off-by: Peter Maydell --- t

[PULL 38/44] target/arm: Remove define_arm_vh_e2h_redirects_aliases

2025-09-26 Thread Peter Maydell
From: Richard Henderson Populate vhe_redir_to_{el2,el01} on each ARMCPRegInfo. Clear the fields within add_cpreg_to_hashtable_aa32. Create the FOO_EL12 cpreg within add_cpreg_to_hashtable_aa64; add ARM_CP_NO_RAW. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Tested-by: Philippe M

[PULL 05/44] target/arm/hvf: Split out sysreg.c.inc

2025-09-26 Thread Peter Maydell
From: Richard Henderson Move the list of supported sysregs to a reuseable file. Reviewed-by: Manos Pitsidianakis Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/hvf/hvf.c| 147 ++-

[PULL 43/44] target/arm: Move ID register field defs to cpu-features.h

2025-09-26 Thread Peter Maydell
Currently we define constants for the ID register fields in cpu.h. This means they're defined for a lot more code in QEMU than actually needs them. Move them to cpu-features.h, which is where we define the feature functions that test fields in these registers. There's only one place where we need

[PULL 18/44] target/arm: Rename CP_REG_AA32_NS_{SHIFT,MASK}

2025-09-26 Thread Peter Maydell
From: Richard Henderson Rename from CP_REG_NS_* to emphasize this is specific to AArch32. Reviewed-by: Manos Pitsidianakis Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/cpregs.h | 8 ---

[PATCH v2 24/32] hw/net: mark most non-virtio NICs as insecure

2025-09-26 Thread Daniel P . Berrangé
Historically most NICs are only interesting for non-virtualization use cases and have not been written with malicious guests in mind. As a general rule either virtio-net or xen-net should be used in all virtualized guests requiring a security boundary. There are a handful of exceptions resulting

[PULL 24/44] target/arm: Move cp processing to define_one_arm_cp_reg

2025-09-26 Thread Peter Maydell
From: Richard Henderson Processing of cp was split between add_cpreg_to_hashtable and define_one_arm_cp_reg. Unify it all to the top-level function. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- targe

[PULL 36/44] target/arm: Redirect VHE FOO_EL12 to FOO_EL1 during translation

2025-09-26 Thread Peter Maydell
From: Richard Henderson Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Tested-by: Philippe Mathieu-Daudé [PMM: expanded a comment slightly] Signed-off-by: Peter Maydell --- target/arm/cpregs.h| 22 - target/arm/gdbstub.c | 2 ++ target/arm/help

[PULL 09/44] target/arm/hvf: Replace hvf_sreg_match with hvf_sreg_list

2025-09-26 Thread Peter Maydell
From: Richard Henderson Change hvf_get_registers and hvf_put_registers to iterate over cpregs_indexes instead of hvf_sreg_match. This lets us drop the cp_idx member of hvf_sreg_match, which leaves only one member in the struct. Replace the struct with a const array. Instead of int, use the prop

[PULL 40/44] target/arm: Convert power control DPRINTF() uses to trace events

2025-09-26 Thread Peter Maydell
From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/arm-powerctl.c | 26 -- target/arm/trace-events | 6 ++ 2 files changed, 14 insertions(+), 18 deletions(-) diff --git a/tar

[PULL 11/44] target/arm/hvf: Use raw_read, raw_write to access

2025-09-26 Thread Peter Maydell
From: Richard Henderson Reduce the places that know about field types by 2. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/hvf/hvf.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

[PULL 33/44] target/arm: Rename TBFLAG_A64_NV2_MEM_E20 with *_E2H

2025-09-26 Thread Peter Maydell
From: Richard Henderson Install e2h in tbflags and compute nv2_mem_e20 from that in aarch64_tr_init_disas_context. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/cpu.h | 3 +--

[PULL 16/44] target/arm: Replace cpreg_field_is_64bit with cpreg_field_type

2025-09-26 Thread Peter Maydell
From: Richard Henderson Prepare for 128-bit fields by using a better query api. Reviewed-by: Manos Pitsidianakis Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/cpregs.h | 10 ++ tar

[PULL 07/24] target/riscv/common-semi-target: remove sizeof(target_ulong)

2025-09-26 Thread Alex Bennée
From: Pierrick Bouvier Only riscv64 extends SYS_EXIT, similar to aarch64. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-ID: <20250822150058.18692-6-pierrick.bouv...@linaro.org> Signed-off-by: Alex Bennée Message-ID: <20250922093711.2768983-9-alex.ben...@linaro.org> d

[PULL 14/44] target/arm: Drop define_one_arm_cp_reg_with_opaque

2025-09-26 Thread Peter Maydell
From: Richard Henderson The last use of this interface was removed in 603bc048a27f ("hw/arm: Remove pxa2xx_pic"). As the comment in gicv3 stated, keeping pointer references to cpregs has SMP issues, so avoid future temptation by removing the interface. Reviewed-by: Manos Pitsidianakis Signed-o

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