[PULL 36/40] gdbstub: Make hex conversion function non-internal

From: Gustavo Romero Make gdb_hextomem non-internal so it's not confined to use only in gdbstub.c. Signed-off-by: Gustavo Romero Reviewed-by: Richard Henderson Message-Id: <20240628050850.536447-8-gustavo.rom...@linaro.org> Signed-off-by: Alex Bennée Message-Id: <20240705084047.

[PULL 39/40] gdbstub: Add support for MTE in user mode

', used to control the MTE fault type at runtime. Signed-off-by: Gustavo Romero Message-Id: <20240628050850.536447-11-gustavo.rom...@linaro.org> Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-40-alex.ben...@linaro.org> diff --git a/configs/targets/aarch64-linux-user.ma

[PULL 18/40] tests/tcg/arm: Use vmrs/vmsr instead of mcr/mrc

mnemonic is clearer. Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-14-richard.hender...@linaro.org> Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-19-alex.ben...@linaro.org> diff --git a/tests/tcg/arm/fcvt.c b/tests

[PULL 25/40] plugins/lockstep: mention the one-insn-per-tb option

This really helps with lockstep although its super slow on big jobs. Reviewed-by: Manos Pitsidianakis Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-26-alex.ben...@linaro.org> diff --git a/contrib/plugins/lockstep.c b/contrib/plugins/lockstep.c index 8b90b37f67..1765

[PULL 34/40] target/arm: Make some MTE helpers widely available

Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-35-alex.ben...@linaro.org> diff --git a/target/arm/tcg/mte_helper.h b/target/arm/tcg/mte_helper.h new file mode 100644 index 00..1f471fb69b --- /dev/null +++ b/target/arm/tcg/mte_helper.h @@ -0,0 +1,66 @@ +/* + * ARM MemT

[PULL 27/40] plugins: Ensure vCPU index is assigned in init/exit hooks

From: Philippe Mathieu-Daudé Since vCPUs are hashed by their index, this index can't be uninitialized (UNASSIGNED_CPU_INDEX). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Message-Id: <20240606124010.2460-2-phi...@linaro.org> Signed-off-by: Alex Bennée Mess

[PULL 29/40] accel/tcg: Move qemu_plugin_vcpu_init__async() to plugins/

phi...@linaro.org> Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-30-alex.ben...@linaro.org> diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 8f6cb64da3..b19e1fdacf 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -192,13 +192,6 @@

[PULL 40/40] tests/tcg/aarch64: Add MTE gdbstub tests

org> Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-41-alex.ben...@linaro.org> diff --git a/configure b/configure index 8b6a2f16ce..019fcbd0ef 100755 --- a/configure +++ b/configure @@ -1673,6 +1673,10 @@ for target in $target_list; do echo "GDB=$gdb_bin"

[PULL 05/40] tests/docker: Specify --userns keep-id for Podman

. Replace -u $(UID) with --userns keep-id, which fixes the UID remapping. This change is limited to Podman because Docker does not support --userns keep-id. Signed-off-by: Akihiko Odaki Message-Id: <20240626-podman-v1-1-f8c8daf2b...@daynix.com> Signed-off-by: Alex Bennée Mess

[PULL 17/40] tests/tcg/arm: Use -march and -mfpu for fcvt

From: Richard Henderson Clang requires the architecture to be set properly in order to assemble the half-precision instructions. Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-13-richard.hender...@linaro.org> Signed-off-by: Alex Bennée M

[PULL 01/40] tests/lcitool: fix debian-i686-cross toolchain prefix

I guess we never noticed and tried to build with this cross image. Fix the toolchain prefix so we actually build 32 bit images. Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-2-alex.ben...@linaro.org> diff --git a/tests/docker/dockerfiles/

[PULL 09/40] tests/tcg/aarch64: Explicitly specify register width

133...@daynix.com> Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-5-richard.hender...@linaro.org> Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-10-alex.ben...@linaro.org> diff --git a/tests/tcg/aarch64/bti-1.c b/tests/tcg/aarch64/bti-1.c index 99a8

[PULL 11/40] tests/tcg/aarch64: Do not use x constraint

; Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-12-alex.ben...@linaro.org> diff --git a/tests/tcg/arm/fcvt.c b/tests/tcg/arm/fcvt.c index 7ac47b564e..f631197287 100644 --- a/tests/tcg/arm/fcvt.c +++ b/tests/tcg/arm/fcvt.c @@ -126,7 +126,7 @@ static void convert_single_to_half(

[PULL 10/40] tests/tcg/aarch64: Fix irg operand type

.160642-6-richard.hender...@linaro.org> Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-11-alex.ben...@linaro.org> diff --git a/tests/tcg/aarch64/mte-1.c b/tests/tcg/aarch64/mte-1.c index 88dcd617ad..146cad4a04 100644 --- a/tests/tcg/aarch64/mte-1.c +++ b/tests/tcg/aarch64/mte-1.c @@

[PULL 13/40] tests/tcg/arm: Fix fcvt result messages

fcvt test cases for AArch32/64") Message-Id: <20240627-tcg-v2-1-1690a8133...@daynix.com> [rth: Update arm ref file as well] Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-9-richard.hender...@linaro.org> Signed-off-by: Alex Bennée Me

[PULL 02/40] testing: restore some testing for i686

in the way and its TCG issues we want to catch I've added --disable-kvm to the build. Reported-by: Richard Henderson Suggested-by: Thomas Huth Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-3-alex.ben...@linaro.org> diff --git a/.gitlab-ci.d/crossbuilds.yml b/.gitla

[PULL 35/40] target/arm: Factor out code for setting MTE TCF0 field

across the board. Signed-off-by: Gustavo Romero Message-Id: <20240628050850.536447-7-gustavo.rom...@linaro.org> [AJB: clean-up includes, move MTE defines] Reviewed-by: Manos Pitsidianakis Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-36-alex.ben...@linaro.org> diff -

[PULL 15/40] tests/tcg/arm: Use -fno-integrated-as for test-arm-iwmmxt

From: Richard Henderson Clang does not support IWMXT instructions. Fall back to the external assembler. Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-11-richard.hender...@linaro.org> Signed-off-by: Alex Bennée Mess

[PULL 12/40] tests/tcg/aarch64: Add -fno-integrated-as for sme

2-8-richard.hender...@linaro.org> Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-13-alex.ben...@linaro.org> diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 11ccde5579..ad1774c2ce 100644 --- a/tests/tcg/aarch64/Makefile.target +++

[PULL 00/40] maintainer updates for testing, plugins and gdbstub

e x constraint tests/tcg/arm: Fix fcvt result messages tests/tcg/arm: Manually register allocate half-precision numbers Alex Bennée (11): tests/lcitool: fix debian-i686-cross toolchain prefix testing: restore some testing for i686 tracepoints: move physmem trace poi

[PULL 37/40] gdbstub: Pass CPU context to command handler

From: Gustavo Romero Allow passing the current CPU context to command handlers via user_ctx when the handler requires it. Signed-off-by: Gustavo Romero Message-Id: <20240628050850.536447-9-gustavo.rom...@linaro.org> Reviewed-by: Manos Pitsidianakis Signed-off-by: Alex Bennée Mess

[PULL 08/40] tests/tcg/aarch64: Drop -fno-tree-loop-distribute-patterns

From: Richard Henderson This option is not supported by clang, and is not required in order to get sve code generation with gcc 12. Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-4-richard.hender...@linaro.org> Signed-off-by: Alex

[PULL 03/40] tracepoints: move physmem trace points

They don't need to be in the global trace-events file and can have a local trace header. Also add address_space_map tracepoint for tracking mapping behaviour. Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-4-alex.ben...@linaro.org> diff

[PULL 04/40] hw/core: ensure kernel_end never gets used undefined

../../hw/core/loader-fit.c:20: /home/alex/lsrc/qemu.git/include/qemu/osdep.h: In function ‘load_fit’: /home/alex/lsrc/qemu.git/include/qemu/osdep.h:486:45: error: ‘kernel_end’ may be used uninitialized [-Werror=maybe-uninitialized] 486 | #define ROUND_UP(n, d) ROUND_DOWN((n) + (d) - 1, (d

[PULL 07/40] tests/tcg: Adjust variable defintion from cc-option

From: Richard Henderson Define the variable to the compiler flag used, not "y". This avoids replication of the compiler flag itself. Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-3-richard.hender...@linaro.org> Signed-off

[PULL 06/40] tests/tcg/minilib: Constify digits in print_num

Message-Id: <20240630190050.160642-2-richard.hender...@linaro.org> Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-7-alex.ben...@linaro.org> diff --git a/tests/tcg/minilib/printf.c b/tests/tcg/minilib/printf.c index 10472b4f58..fb0189c2bb 100644 --- a/tests/tcg/minilib/pr

[PULL 16/40] tests/tcg/arm: Manually register allocate half-precision numbers

-Id: <20240630190050.160642-12-richard.hender...@linaro.org> Signed-off-by: Alex Bennée Message-Id: <20240705084047.857176-17-alex.ben...@linaro.org> diff --git a/tests/tcg/arm/fcvt.c b/tests/tcg/arm/fcvt.c index 157790e679..d8c61cd29f 100644 --- a/tests/tcg/arm/fcvt.c +++ b/tests/tc

[PULL 14/40] tests/tcg/arm: Drop -N from LDFLAGS

From: Richard Henderson This is redudant with a linker script, and is not supported by clang. Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-10-richard.hender...@linaro.org> Signed-off-by: Alex Bennée Message-Id: <20240705084047.

Re: About VFIO Device Pass-through on Qemu.

uest: > IOVA>(IOMMU)>HPA Yes. In fact this is the only way we can do transparent device assignment without a paravirtualized DMA layer is to use the IOMMU to map the device into the GPA address space. Also the fixed IOVA/GPA to HPA mapping in the IOMMU is what necessitates memory pinning. Thanks, Alex

[PATCH v2 33/40] target/arm: Fix exception case in allocation_tag_mem_probe

From: Gustavo Romero If page in 'ptr_access' is inaccessible and probe is 'true' allocation_tag_mem_probe should not throw an exception, but currently it does, so fix it. Signed-off-by: Gustavo Romero Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée Message

[PATCH v2 23/40] plugins/lockstep: preserve sock_path

We can't assign sock_path directly from the autofree'd GStrv, take a copy. Signed-off-by: Alex Bennée --- contrib/plugins/lockstep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/contrib/plugins/lockstep.c b/contrib/plugins/lockstep.c index 237543b43a..111ec3fa27 100644

[PATCH v2 40/40] tests/tcg/aarch64: Add MTE gdbstub tests

From: Gustavo Romero Add tests to exercise the MTE stubs. The tests will only run if a version of GDB that supports MTE is available in the test environment. Signed-off-by: Gustavo Romero [AJB: re-base and checkpatch fixes] Signed-off-by: Alex Bennée Message-Id: <20240628050850.536447

Re: Question about OS/2 support under QEMU....

s you are looking for Spice? https://spice-space.org/ You run a guest agent on the guest that talks to some spice devices to pass information back and forth between the host and guest. > > Best regards, > > Roderick Klein > Dutch OS/2 VOICE foundation -- Alex Bennée Virtualisation Tech Lead @ Linaro

[PATCH v2 38/40] gdbstub: Use true to set cmd_startswith

From: Gustavo Romero cmd_startswith is a boolean so use 'true' to set it instead of 1. Signed-off-by: Gustavo Romero Signed-off-by: Alex Bennée Message-Id: <20240628050850.536447-10-gustavo.rom...@linaro.org> --- gdbstub/gdbstub.c | 80 +++

[PATCH v2 26/40] plugins/lockstep: clean-up output

We were repeating information which wasn't super clear. As we already will have dumped the last failing PC just note the divergence and dump the previous instruction log. Signed-off-by: Alex Bennée --- contrib/plugins/lockstep.c | 16 1 file changed, 8 insertions(+), 8

[PATCH v2 14/40] tests/tcg/arm: Drop -N from LDFLAGS

From: Richard Henderson This is redudant with a linker script, and is not supported by clang. Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-10-richard.hender...@linaro.org> Signed-off-by: Alex Bennée --- tests/tcg/arm/Makefile.softmmu-

[PATCH v2 25/40] plugins/lockstep: mention the one-insn-per-tb option

This really helps with lockstep although its super slow on big jobs. Signed-off-by: Alex Bennée --- contrib/plugins/lockstep.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/contrib/plugins/lockstep.c b/contrib/plugins/lockstep.c index 761bcdf363..353bf12dfb 100644

[PATCH v2 21/40] test/plugin: make insn plugin less noisy by default

While the match functionality is useful lets make the verbosity optional while we are actually running. Signed-off-by: Alex Bennée --- tests/plugin/insn.c | 36 +--- 1 file changed, 21 insertions(+), 15 deletions(-) diff --git a/tests/plugin/insn.c b/tests

[PATCH v2 13/40] tests/tcg/arm: Fix fcvt result messages

fcvt test cases for AArch32/64") Message-Id: <20240627-tcg-v2-1-1690a8133...@daynix.com> [rth: Update arm ref file as well] Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-9-richard.hender...@linaro.org> Signed-off-by: Alex B

[PATCH v2 19/40] linux-user/main: Suppress out-of-range comparison warning for clang

wed-by: Akihiko Odaki Message-Id: <20240630190050.160642-15-richard.hender...@linaro.org> Signed-off-by: Alex Bennée --- linux-user/main.c | 1 + 1 file changed, 1 insertion(+) diff --git a/linux-user/main.c b/linux-user/main.c index 94c99a1366..7d3cf45fa9 100644 --- a/linux-user/main.c +++ b/l

[PATCH v2 36/40] gdbstub: Make hex conversion function non-internal

From: Gustavo Romero Make gdb_hextomem non-internal so it's not confined to use only in gdbstub.c. Signed-off-by: Gustavo Romero Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée Message-Id: <20240628050850.536447-8-gustavo.rom...@linaro.org> --- gdbstub/internals.h

[PATCH v2 34/40] target/arm: Make some MTE helpers widely available

From: Gustavo Romero Make the MTE helpers allocation_tag_mem_probe, load_tag1, and store_tag1 available to other subsystems. Signed-off-by: Gustavo Romero Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Alex Bennée Message-Id: <20240628050850.53644

[PATCH v2 32/40] gdbstub: Add support for target-specific stubs

functions as interfaces to extend the qSupported string, the query handler table, and the set handler table, allowing target-specific stub implementations. Signed-off-by: Gustavo Romero Reviewed-by: Alex Bennée Signed-off-by: Alex Bennée Message-Id: <20240628050850.536447-4-gustavo.

[PATCH v2 24/40] plugins/lockstep: make mixed-mode safe

The ExecState is shared across the socket and if we want to compare say 64 bit and 32 bit binaries we need the two to use the same sizes for things. Message-Id: <20240628124258.832466-11-alex.ben...@linaro.org> Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée --- contrib/p

[PATCH v2 35/40] target/arm: Factor out code for setting MTE TCF0 field

across the board. Signed-off-by: Gustavo Romero Message-Id: <20240628050850.536447-7-gustavo.rom...@linaro.org> [AJB: clean-up includes, move MTE defines] Signed-off-by: Alex Bennée --- vAJB: - clean-up includes, move MTE defines --- linux-user/aarch64/mte_user_helper.

[PATCH v2 37/40] gdbstub: Pass CPU context to command handler

From: Gustavo Romero Allow passing the current CPU context to command handlers via user_ctx when the handler requires it. Signed-off-by: Gustavo Romero Signed-off-by: Alex Bennée Message-Id: <20240628050850.536447-9-gustavo.rom...@linaro.org> --- include/gdbstub/commands.h | 3 +++ g

[PATCH v2 16/40] tests/tcg/arm: Manually register allocate half-precision numbers

-Id: <20240630190050.160642-12-richard.hender...@linaro.org> Signed-off-by: Alex Bennée --- tests/tcg/arm/fcvt.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/tests/tcg/arm/fcvt.c b/tests/tcg/arm/fcvt.c index 157790e679..d8c61cd29f 100644 --- a/tests/tcg/arm/

[PATCH v2 30/40] gdbstub: Clean up process_string_cmd

From: Gustavo Romero Change 'process_string_cmd' to return true on success and false on failure, instead of 0 and -1. Signed-off-by: Gustavo Romero Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Alex Bennée Message-Id

[PATCH v2 08/40] tests/tcg/aarch64: Drop -fno-tree-loop-distribute-patterns

From: Richard Henderson This option is not supported by clang, and is not required in order to get sve code generation with gcc 12. Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-4-richard.hender...@linaro.org> Signed-off-by: Alex

[PATCH v2 05/40] tests/docker: Specify --userns keep-id for Podman

. Replace -u $(UID) with --userns keep-id, which fixes the UID remapping. This change is limited to Podman because Docker does not support --userns keep-id. Signed-off-by: Akihiko Odaki Message-Id: <20240626-podman-v1-1-f8c8daf2b...@daynix.com> Signed-off-by: Alex Bennée --- tests/

[PATCH v2 39/40] gdbstub: Add support for MTE in user mode

', used to control the MTE fault type at runtime. Signed-off-by: Gustavo Romero Signed-off-by: Alex Bennée Message-Id: <20240628050850.536447-11-gustavo.rom...@linaro.org> --- configs/targets/aarch64-linux-user.mak | 2 +- target/arm/internals.h | 6 + target/arm

[PATCH v2 31/40] gdbstub: Move GdbCmdParseEntry into a new header file

to gdb_get_cmd_param. This commit also makes gdb_put_packet public since is used in gdbstub command handling. Signed-off-by: Gustavo Romero Reviewed-by: Alex Bennée Signed-off-by: Alex Bennée Message-Id: <20240628050850.536447-3-gustavo.rom...@linaro.org> --- gdbstub/internals.h

[PATCH v2 28/40] plugins: Free CPUPluginState before destroying vCPU state

org> Signed-off-by: Alex Bennée --- include/qemu/plugin.h | 3 +++ hw/core/cpu-common.c | 5 + 2 files changed, 8 insertions(+) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index bc5aef979e..af5f9db469 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -149,6

[PATCH v2 12/40] tests/tcg/aarch64: Add -fno-integrated-as for sme

2-8-richard.hender...@linaro.org> Signed-off-by: Alex Bennée --- tests/tcg/aarch64/Makefile.target | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 11ccde5579..ad1774c2ce 100644 --- a/tests/tcg/a

[PATCH v2 29/40] accel/tcg: Move qemu_plugin_vcpu_init__async() to plugins/

phi...@linaro.org> Signed-off-by: Alex Bennée --- hw/core/cpu-common.c | 9 + plugins/core.c | 8 +++- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 8f6cb64da3..b19e1fdacf 100644 --- a/hw/core/cpu-common.c +++ b/hw/co

[PATCH v2 22/40] test/plugins: preserve the instruction record over translations

We are interested in the particular instruction so we should use a stable record for it. We could bring this down to physical address but for now vaddr + disas seems to do the trick. Signed-off-by: Alex Bennée --- tests/plugin/insn.c | 76 ++--- 1 file

[PATCH v2 27/40] plugins: Ensure vCPU index is assigned in init/exit hooks

From: Philippe Mathieu-Daudé Since vCPUs are hashed by their index, this index can't be uninitialized (UNASSIGNED_CPU_INDEX). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Message-Id: <20240606124010.2460-2-phi...@linaro.org> Signed-off-by: Alex Bennée --- p

[PATCH v2 18/40] tests/tcg/arm: Use vmrs/vmsr instead of mcr/mrc

mnemonic is clearer. Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-14-richard.hender...@linaro.org> Signed-off-by: Alex Bennée --- tests/tcg/arm/fcvt.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/tests/tcg/

[PATCH v2 00/40] July maintainer updates (32bit, testing, plugins, gdbstub)

irg operand type tests/tcg/aarch64: Do not use x constraint tests/tcg/arm: Fix fcvt result messages tests/tcg/arm: Manually register allocate half-precision numbers Alex Bennée (11): tests/lcitool: fix debian-i686-cross toolchain prefix testing: restore some testing for i686 tracepoints

[PATCH v2 17/40] tests/tcg/arm: Use -march and -mfpu for fcvt

From: Richard Henderson Clang requires the architecture to be set properly in order to assemble the half-precision instructions. Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-13-richard.hender...@linaro.org> Signed-off-by: Alex

[PATCH v2 15/40] tests/tcg/arm: Use -fno-integrated-as for test-arm-iwmmxt

From: Richard Henderson Clang does not support IWMXT instructions. Fall back to the external assembler. Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-11-richard.hender...@linaro.org> Signed-off-by: Alex Bennée --- tests/t

[PATCH v2 11/40] tests/tcg/aarch64: Do not use x constraint

; Signed-off-by: Alex Bennée --- tests/tcg/arm/fcvt.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/tests/tcg/arm/fcvt.c b/tests/tcg/arm/fcvt.c index 7ac47b564e..f631197287 100644 --- a/tests/tcg/arm/fcvt.c +++ b/tests/tcg/arm/fcvt.c @@ -126,7 +126,7 @@

[PATCH v2 10/40] tests/tcg/aarch64: Fix irg operand type

.160642-6-richard.hender...@linaro.org> Signed-off-by: Alex Bennée --- tests/tcg/aarch64/mte-1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/tcg/aarch64/mte-1.c b/tests/tcg/aarch64/mte-1.c index 88dcd617ad..146cad4a04 100644 --- a/tests/tcg/aarch64/mte-1.c +++ b/tests/tcg/aar

[PATCH v2 06/40] tests/tcg/minilib: Constify digits in print_num

Message-Id: <20240630190050.160642-2-richard.hender...@linaro.org> Signed-off-by: Alex Bennée --- tests/tcg/minilib/printf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/tcg/minilib/printf.c b/tests/tcg/minilib/printf.c index 10472b4f58..fb0189c2bb 100644 --- a

[PATCH v2 01/40] tests/lcitool: fix debian-i686-cross toolchain prefix

I guess we never noticed and tried to build with this cross image. Fix the toolchain prefix so we actually build 32 bit images. Message-Id: <20240628124258.832466-2-alex.ben...@linaro.org> Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée --- tests/docker/dockerfiles/debia

[PATCH v2 07/40] tests/tcg: Adjust variable defintion from cc-option

From: Richard Henderson Define the variable to the compiler flag used, not "y". This avoids replication of the compiler flag itself. Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-3-richard.hender...@linaro.org> Signed-off

[PATCH v2 02/40] testing: restore some testing for i686

in the way and its TCG issues we want to catch I've added --disable-kvm to the build. Reported-by: Richard Henderson Suggested-by: Thomas Huth Signed-off-by: Alex Bennée --- v2 - add --disable-kvm - currently blocked by https://gitlab.com/qemu-project/qemu/-/issues/2413 --- .gitlab-ci.d

[PATCH v2 04/40] hw/core: ensure kernel_end never gets used undefined

../../hw/core/loader-fit.c:20: /home/alex/lsrc/qemu.git/include/qemu/osdep.h: In function ‘load_fit’: /home/alex/lsrc/qemu.git/include/qemu/osdep.h:486:45: error: ‘kernel_end’ may be used uninitialized [-Werror=maybe-uninitialized] 486 | #define ROUND_UP(n, d) ROUND_DOWN((n) + (d) - 1, (d

[PATCH v2 20/40] gitlab: don't bother with KVM for TCI builds

In fact any other accelerator would be pointless as the point is to exercise the TCI accelerator anyway. Signed-off-by: Alex Bennée --- .gitlab-ci.d/buildtest.yml | 2 +- .gitlab-ci.d/crossbuilds.yml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.gitlab-ci.d

[PATCH v2 09/40] tests/tcg/aarch64: Explicitly specify register width

133...@daynix.com> Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-5-richard.hender...@linaro.org> Signed-off-by: Alex Bennée --- tests/tcg/aarch64/bti-1.c | 6 +++--- tests/tcg/aarch64/bti-3.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/tests

[PATCH v2 03/40] tracepoints: move physmem trace points

They don't need to be in the global trace-events file and can have a local trace header. Also add address_space_map tracepoint for tracking mapping behaviour. Message-Id: <20240628124258.832466-5-alex.ben...@linaro.org> Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson

Re: [PATCH v4 00/14] test/tcg: Clang build fixes for arm/aarch64

. Queued to testing/next, thanks. -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH v1 2/2] xen: mapcache: Fix unmapping of first entries in buckets

concern considering QEMU and Glib both provide various abstractions used around the rest of the code base. The original patch that introduces the mapcache doesn't tell me much about access patterns for the cache, just that it is trying to solve memory exhaustion issues with lots of dynamic small mappings. Maybe a simpler structure is desirable? We also have an interval tree implementation ("qemu/interval-tree.h") if what we really want is a sorted tree of memory that can be iterated locklessly. -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH] hw/timer/hpet: Fix wrong HPET interrupts

if (timer_is_periodic(timer)) { > + timer->cmp &= 0xULL; > +} > +hpet_set_timer(timer); > } > } > } else if (deactivating_bit(old_val, new_val, HPET_CFG_ENABLE)) { -- Alex Bennée Virtualisation Tech Lead @ Linaro

[RFC PATCH] hw/core: ensure kernel_end never gets used undefined

../../hw/core/loader-fit.c:20: /home/alex/lsrc/qemu.git/include/qemu/osdep.h: In function ‘load_fit’: /home/alex/lsrc/qemu.git/include/qemu/osdep.h:486:45: error: ‘kernel_end’ may be used uninitialized [-Werror=maybe-uninitialized] 486 | #define ROUND_UP(n, d) ROUND_DOWN((n) + (d) - 1, (d

Re: [PATCH v1 1/2] physmem: Bail out qemu_ram_block_from_host() for invalid ram addrs

"Edgar E. Iglesias" writes: > On Thu, Jul 4, 2024 at 1:26 PM Alex Bennée wrote: > > "Edgar E. Iglesias" writes: > > > From: "Edgar E. Iglesias" > > > > Bail out in qemu_ram_block_from_host() when > > xen_ram_addr_from_m

Re: [PATCH 2/2] system/vl.c: parse all -accel options

er didn't spot the problem; > it's okay to send out broken patches, that's part of the learning > experience. :) > > Paolo > > (*) as opposed to Acked-by, where your review probably has been more > conceptual than technical, and that you don't really want to take the > patch in a pull request. > > > Paolo -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH v1 1/2] physmem: Bail out qemu_ram_block_from_host() for invalid ram addrs

for failed mappings? > block = qemu_get_ram_block(ram_addr); > if (block) { > *offset = ram_addr - block->offset; -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH 0/3] plugins: Few debugging cleanups

letions(-) Queued to plugins/next, thanks. -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PULL v3 58/85] hw/i386/fw_cfg: Add etc/e820 to fw_cfg late

have .mailmap and the gitdm metadata for after the fact fixups. -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH] MAINTAINERS: add Stefano Garzarella as vhost/vhost-user reviewer

Stefano Garzarella writes: > I have recently been working on supporting vhost-user on any POSIX, > so I want to help maintain it. > > Cc: Michael S. Tsirkin > Signed-off-by: Stefano Garzarella Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH 3/4] util/oslib-posix: Fix superfluous trailing semicolon

Zhao Liu writes: > Signed-off-by: Zhao Liu Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH 4/4] target/hexagon/imported/mmvec: Fix superfluous trailing semicolon

Zhao Liu writes: > Fix the superfluous trailing semicolon in target/hexagon/imported/mmvec/ > ext.idef. > > Cc: Brian Cain > Signed-off-by: Zhao Liu Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH 1/4] accel/kvm/kvm-all: Fix superfluous trailing semicolon

Value, 1);; > +stats->value = g_new0(StatsValue, 1); > > if ((pdesc->flags & KVM_STATS_UNIT_MASK) == KVM_STATS_UNIT_BOOLEAN) { > stats->value->u.boolean = *stats_data; Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH v3] virtio: Implement Virtio Backend for SD/MMC in QEMU

VirtIO specification? -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH v10 11/12] hw/pci: Convert rom_bar into OnOffAuto

;, > >[ON_OFF_AUTO_ON] = "on", > >[ON_OFF_AUTO_OFF] = "off", > >}, > >.size = ON_OFF_AUTO__MAX > > }; > > > > I also tried with an existing property: > > > > $ ./qemu-system-x86_64 -device intel-hda,msi=0 > > qemu-system-x86_64: -device intel-hda,msi=0: Parameter 'msi' does not > > accept value '0' > > Then it was probably bit properties that also accept 0/1, on/off, > true/false. Maybe similar aliases could be added to on/off/auto? > > In any case when I first saw rombar I thought it would set the BAR of the > ROM so wondered why it's 1 and not 5 or 6 or an offset. So on/off is > clearer in this case. There's only one PCI spec defined offset for the ROM BAR. Yes, the option could be more clear but relocating the ROM to a different regular BAR offset is invalid. Thanks, Alex

Re: [PATCH 4/4] python: enable testing for 3.13

lowed to > fail.) > > Signed-off-by: John Snow Reviewed-by: Alex Bennée Tested-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH 2/4] python: Do not use pylint 3.2.4 with python 3.8

John Snow writes: > There is a bug in this version, > see: https://github.com/pylint-dev/pylint/issues/9751 > > Signed-off-by: John Snow Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH 1/4] python: linter changes for pylint 3.x

2: E0606: Possibly using variable 'sock' before > assignment (possibly-used-before-assignment) > qemu/utils/qemu_ga_client.py:168:4: R1711: Useless return at end of function > or method (useless-return) > > Signed-off-by: John Snow Reviewed-by: Alex Bennée -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH] target/arm: Use cpu_env in cpu_untagged_addr

if (cpu->env.tagged_addr_enable) { > +CPUARMState *env = cpu_env(cs); > +if (env->tagged_addr_enable) { > /* > * TBI is enabled for userspace but not kernelspace addresses. > * Only clear the tag if bit 55 is clear. -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH] vhost-user: Skip unnecessary duplicated VHOST_USER_SET_LOG_BASE requests

"BillXiang" writes: >> From: "Alex Bennée" >> Date:  Mon, Jul 1, 2024, 16:49 >> Subject:  Re: [PATCH] vhost-user: Skip unnecessary duplicated >> VHOST_USER_SET_LOG_BASE requests >> To: "项文成" >> Cc: , >> 项文成 writes:

Re: [PATCH] tcg/optimize: Fix TCG_COND_TST* simplification of setcond2

, %%eax\n\t" > +"shll %%cl, %%edx\n\t" > +: "=a"(*a), "=d"(*d) > +: "c"(c)); > +} > + > +int main(void) > +{ > +long a, c, d; The compiler complains about the mismatch between long and the unsigned long of

Re: [PATCH] tcg/optimize: Fix TCG_COND_TST* simplification of setcond2

"setne %%dl\n\t" > +"shll %%cl, %%eax\n\t" > +"shll %%cl, %%edx\n\t" > +: "=a"(*a), "=d"(*d) > +: "c"(c)); > +} > + > +int main(void) > +{ > +long a, c, d; > + > +for (c = 0; c < 64; c++) { > +test(, , c); > +assert(a == (c & 0x20 ? 0 : 1u << (c & 0x1f))); > +assert(d == (c & 0x20 ? 1u << (c & 0x1f) : 0)); > +} > +return 0; > +} -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH] vhost-user: Skip unnecessary duplicated VHOST_USER_SET_LOG_BASE requests

e VHOST_USER_ADD_MEM_REG: > case VHOST_USER_REM_MEM_REG: > +case VHOST_USER_SET_LOG_BASE: > return true; > default: > return false; -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH v6 06/11] target/arm: Factor out code for setting MTE TCF0 field

Gustavo Romero writes: > Hi Alex, > > On 6/28/24 9:14 AM, Alex Bennée wrote: >> Gustavo Romero writes: >> >>> Factor out the code used for setting the MTE TCF0 field from the prctl >>> code into a convenient function. Other subsystems, like gdbstub, need

Re: [PATCH 02/23] target/i386: fix gen_prepare_size_nz condition

Alex Bennée writes: > Incorrect brace positions causes an unintended overflow on 32 bit > builds and shenanigans result. > > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2413 > Suggested-by: Mark Cave-Ayland > Signed-off-by: Alex Bennée This seems to t

[PATCH 20/23] gdbstub: Pass CPU context to command handler

From: Gustavo Romero Allow passing the current CPU context to command handlers via user_ctx when the handler requires it. Signed-off-by: Gustavo Romero Signed-off-by: Alex Bennée Message-Id: <20240628050850.536447-9-gustavo.rom...@linaro.org> --- include/gdbstub/commands.h | 3 +++ g

[PATCH 16/23] target/arm: Fix exception case in allocation_tag_mem_probe

From: Gustavo Romero If page in 'ptr_access' is inaccessible and probe is 'true' allocation_tag_mem_probe should not throw an exception, but currently it does, so fix it. Signed-off-by: Gustavo Romero Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20240628050850.536

[PATCH 22/23] gdbstub: Add support for MTE in user mode

From: Gustavo Romero This commit implements the stubs to handle the qIsAddressTagged, qMemTag, and QMemTag GDB packets, allowing all GDB 'memory-tag' subcommands to work with QEMU gdbstub on aarch64 user mode. It also implements the get/set functions for the special GDB MTE register 'tag_ctl',

[PATCH 21/23] gdbstub: Use true to set cmd_startswith

From: Gustavo Romero cmd_startswith is a boolean so use 'true' to set it instead of 1. Signed-off-by: Gustavo Romero Message-Id: <20240628050850.536447-10-gustavo.rom...@linaro.org> --- gdbstub/gdbstub.c | 80 +++ 1 file changed, 40 insertions(+),

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