[Qemu-devel] Issue with nVMX and USB direct assignment (VFIO) in kernel 4.10 and newer

2017-07-11 Thread Andrew Barnes
[Qemu 2.9.0, kernels as stated below] 4.10 is the first kernel to support nested VMX in a manor that is usable in a hyper-V scenario. Whilst nVMX has been available before that, 4.10 is i believe the first kernel that implements it further. However, I have found the following pattern: 4.8.6 or

[Qemu-devel] [IGDVFIO] [PATCH 1/8] RFC and help completing: Intel IGD Direct Assignment with VFIO

2014-09-24 Thread Andrew Barnes
..e6a7fbd 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -6,6 +6,7 @@ * Isaku Yamahata yamahata at valinux co jp * VA Linux Systems Japan K.K. * Copyright (C) 2012 Jason Baron jba...@redhat.com + * Copyright (C) 2014 Andrew Barnes a...@outsideglobe.com IGD

[Qemu-devel] [IGDVFIO] [PATCH 2/8] RFC and help completing: Intel IGD Direct Assignment with VFIO

2014-09-24 Thread Andrew Barnes
: * Alex Williamson alex.william...@redhat.com + * Andrew Barnes a...@outsideglobe.com IGD Support * * This work is licensed under the terms of the GNU GPL, version 2. See * the COPYING file in the top-level directory. @@ -56,6 +57,45 @@ #define VFIO_ALLOW_KVM_MSI 1 #define VFIO_ALLOW_KVM_MSIX

[Qemu-devel] [IGDVFIO] [PATCH 0/8] RFC and help completing: Intel IGD Direct Assignment with VFIO

2014-09-24 Thread Andrew Barnes
are the patches, incase this is a more usable format. They do also include Alex Williamsons e820 patch, this is not mentioned in the following patch emails. Kind Regards, Andrew Barnes diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 97932a6..18c72d2 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -617,6

[Qemu-devel] [IGDVFIO] [PATCH 4/8] RFC and help completing: Intel IGD Direct Assignment with VFIO

2014-09-24 Thread Andrew Barnes
+ *2014 Andrew Barnes a...@outsideglobe.com IGD Support + *Temporarily extended to provide host config read/write. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the Software), to deal @@ -37,9 +39,9

[Qemu-devel] [IGDVFIO] [PATCH 3/8] RFC and help completing: Intel IGD Direct Assignment with VFIO

2014-09-24 Thread Andrew Barnes
@@ * Isaku Yamahata yamahata at valinux co jp * VA Linux Systems Japan K.K. * Copyright (C) 2012 Jason Baron jba...@redhat.com + * 2014 Andrew barnes a...@outsideglobe.com IGD Support * * This is based on piix_pci.c, but heavily modified. * @@ -30,11 +31,26

[Qemu-devel] [IGDVFIO] [PATCH 8/8] RFC and help completing: Intel IGD Direct Assignment with VFIO

2014-09-24 Thread Andrew Barnes
Seabios patch This patch covers all the changes to seabios. The intentions are to make seabios behave like the hosts BIOS. and like the hosts BIOS, configure the Q35 chipset more thoroughly. This patch configures TOM, TOUUD, TOLUD, BDSM, BGSM, TSEG, IGD-OPREGION. by writing new base addresses,

[Qemu-devel] [IGDVFIO] [PATCH 5/8] RFC and help completing: Intel IGD Direct Assignment with VFIO

2014-09-24 Thread Andrew Barnes
include/hw/pci-host/q35.h this patch adds: * #defines for q35 pci config. not all are used, added for completeness patch - diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h index d9ee978..abb795e 100644 --- a/include/hw/pci-host/q35.h +++

[Qemu-devel] [IGDVFIO] [PATCH 7/8] RFC and help completing: Intel IGD Direct Assignment with VFIO

2014-09-24 Thread Andrew Barnes
include/hw/pci/pci_ids.h A very last minute realisation is that this is not needed. Its purpose is to make sure anything else that references LPC device ID is given the hacked-in host's ID. but in verifying the patch validity it appears this not referenced anywhere, other than where its taken

[Qemu-devel] [IGDVFIO] [PATCH 6/8] RFC and help completing: Intel IGD Direct Assignment with VFIO

2014-09-24 Thread Andrew Barnes
include/hw/pci/pci.h patch - diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index c352c7b..d3bc224 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -338,6 +338,9 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin); #define PCI_BUS(obj)

Re: [Qemu-devel] [Xen-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support

2014-07-08 Thread Andrew Barnes
Hi, I've been working on IGD passthrough using native qemu and VFIO, (without any XEN components). This work hasn't progressed in recent, but I am able to continue it again. Late last year I was in discussions with Allen Kay, Vikas Shivappa from Intel and Alex Williamson from Redhat, which