On Tue, Aug 9, 2022 at 11:17 PM Dan Williams wrote:
>
> Bobo WL wrote:
> > Hi Dan,
> >
> > Thanks for your reply!
> >
> > On Mon, Aug 8, 2022 at 11:58 PM Dan Williams
> > wrote:
> > >
> > > What is the output of:
> > >
> &g
Hi Dan,
Thanks for your reply!
On Mon, Aug 8, 2022 at 11:58 PM Dan Williams wrote:
>
> What is the output of:
>
> cxl list -MDTu -d decoder0.0
>
> ...? It might be the case that mem1 cannot be mapped by decoder0.0, or
> at least not in the specified order, or that validation check is
Hi Jonathan
Thanks for your reply!
On Mon, Aug 8, 2022 at 8:37 PM Jonathan Cameron
wrote:
>
> Probably not related to your problem, but there is a disconnect in QEMU /
> kernel assumptionsaround the presence of an HDM decoder when a HB only
> has a single root port. Spec allows it to be
Hi list
I want to test cxl functions in arm64, and found some problems I can't
figure out.
My test environment:
1. build latest bios from https://github.com/tianocore/edk2.git master
branch(cc2db6ebfb6d9d85ba4c7b35fba1fa37fffc0bc2)
2. build latest qemu-system-aarch64 from