Ping ;-)
Regards,
Boqun
On Tue, Mar 20, 2018 at 08:08:15AM +0800, Boqun Feng wrote:
> A new cpu model called "KnightsMill" is added to model Knights Mill
> processors. Compared to "Skylake-Server" cpu model, the following
> features are added:
>
> a
pcid invpcid clflushopt avx512dq avx512bw clwb smap rtm mpx
xsavec xgetbv1 hle
Signed-off-by: Boqun Feng
---
v1 --> v2:
* Change the model name to "KnightsMill" as per Daniel's
suggestion.
target/i386/cpu.c | 42 ++
On Wed, Mar 14, 2018 at 01:01:30PM +, Daniel P. Berrangé wrote:
> On Wed, Mar 14, 2018 at 03:29:59PM +0800, Boqun Feng wrote:
> > A new cpu model called "KNM" is added to model Knights Mill processors.
>
> Why the obscure acryonym? Can't we just call it KnightsM
d invpcid clflushopt avx512dq avx512bw axv512cd clwb smap rtm
mpx xsavec xgetbv1 hle
Signed-off-by: Boqun Feng
---
target/i386/cpu.c | 42 ++
1 file changed, 42 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 2c04645ceac9..215a9
On Fri, Jun 23, 2017 at 10:38:14AM -0300, Eduardo Habkost wrote:
> On Wed, Jun 21, 2017 at 01:29:34PM +0800, Boqun Feng (Intel) wrote:
> > Introduce Skylake-Server cpu mode which inherits the features from
> > Skylake-Client and supports some additional features that are: AVX51
Introduce Skylake-Server cpu mode which inherits the features from
Skylake-Client and supports some additional features that are: AVX512,
CWLB and PGPE1GB.
Signed-off-by: Boqun Feng (Intel)
---
target/i386/cpu.c | 42 ++
1 file changed, 42 insertions
