use extract32()
function so it's less error-prone.
This went unnoticed because irqs >= 14 are not used in a standard
QEMU/OPAL boot, changing the first QEMU serial-isa irq to 14 to test
does demonstrate serial irqs aren't received, and that this change
fixes that.
Reported-by: Céd
Hello Jamin,
On 7/26/24 08:00, Jamin Lin wrote:
Hi Cedric,
I will looked at v2. Sorry for the late reply, I was on PTO.
Thanks,
C.
Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register
memory region of I2C bus
On 7/18/24 11:44, Jamin Lin wrote:
Hi Cedric,
Sub
the valid bit of the thread context.
3. Return the number of bytes requested in step 1 to a register.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/hw/ppc/xive_regs.h | 2 ++
hw/intc/xive.c | 15
special op support for 1-byte writes to this field.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/hw/ppc/xive2.h | 2 ++
include/hw/ppc/xive_regs.h | 1 +
hw/intc/xive.c | 2 ++
hw/intc/xive2.c
On 8/1/24 22:30, Michael Kowal wrote:
From: Frederic Barrat
The 'PGoFirst' field of a Notify Virtual Processor tells if the NVP
belongs to a VP group.
Also, print the Reporting Cache Line address, if defined.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/x
unused in the current implementation so we
just support the writing of the value for now.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/intc/xive.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/intc
On 8/1/24 22:29, Michael Kowal wrote:
From: Frederic Barrat
The OGEN field at offset 0x1F is a new field for Gen2 TIMA. This
patch defines it.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/hw/ppc/xive_regs.h | 1
added define comment
* is flagged with a warning */
To:
#define A 1 /* original define comment is */
/* now fine, no warning...*/
#define B 2 /* Newly added define comment */
/* is fine... */
Signed-off-by: Michael Kowal
Reviewed-
uld indicate a
programming error.
Those bits were incorrectly specified because of ppc bit numbering
fun. Coverity detected this as an always-zero expression.
Reported-by: Cédric Le Goater
Resolves: Coverity CID 1558829 (partially)
Signed-off-by: Nicholas Piggin
Reviewed-by: Cédric Le Goater
Tha
use extract32()
function so it's less error-prone.
This went unnoticed because irqs >= 14 are not used in a standard
QEMU/OPAL boot, changing the first QEMU serial-isa irq to 14 to test
does demonstrate serial irqs aren't received, and that this change
fixes that.
Reported-by: Céd
Goater
Resolves: Coverity CID 1558830
Fixes: 24bd283bccb33 ("ppc/pnv: Implement ADU access to LPC space")
Signed-off-by: Nicholas Piggin
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/ppc/pnv_adu.c | 12
1 file changed, 12 insertions(+)
diff --git a/hw/ppc/pnv_
Hello Guenter,
On 8/9/24 00:05, Guenter Roeck wrote:
Hi,
On Tue, Jun 25, 2024 at 09:08:30AM +0200, Cédric Le Goater wrote:
The tacoma-bmc machine was a board including an AST2600 SoC based BMC
and a witherspoon like OpenPOWER system. It was used for bring up of
the AST2600 SoC in labs. It can
On 8/15/24 09:31, Nicholas Piggin wrote:
On Tue Aug 13, 2024 at 11:45 PM AEST, Aditya Gupta wrote:
Currently any device tree passed with -dtb option in QEMU, was ignored
by the PowerNV code.
Read and pass the passed -dtb to the kernel, thus enabling easier
debugging with custom DTBs.
The exist
On 8/1/24 10:51, Aditya Gupta wrote:
Currently any device tree passed with -dtb option in QEMU, was ignored
by the PowerNV code.
Read and pass the passed -dtb to the kernel, thus enabling easier
debugging with custom DTBs.
The existing behaviour when -dtb is 'not' passed, is preserved as-is.
B
On 8/1/24 09:44, Cédric Le Goater wrote:
- /* Pack resulting tree */
- _FDT((fdt_pack(fdt)));
+ /* read the file 'machine->dtb', and load it into 'fdt' buffer */
+ if (!g_file_get_contents(machine->dtb, (gchar **)&fdt, NULL, NULL)) {
+
Hello Aditya,
On 7/31/24 22:10, Aditya Gupta wrote:
Currently any device tree passed with -dtb option in QEMU, was ignored
by the PowerNV code.
Read and pass the passed -dtb to the kernel, thus enabling easier
debugging with custom DTBs.
The existing behaviour when -dtb is 'not' passed, is pre
On 7/31/24 15:51, Aditya Gupta wrote:
Hi Daniel,
Thank you for the review.
On 24/07/31 02:34PM, Daniel P. Berrangé wrote:
On Wed, Jul 31, 2024 at 06:52:35PM +0530, Aditya Gupta wrote:
Currently any device tree passed with -dtb option in QEMU, was ignored
by the PowerNV code.
Read and pass th
Hello Aditya,
On 7/31/24 15:22, Aditya Gupta wrote:
Currently any device tree passed with -dtb option in QEMU, was ignored
by the PowerNV code.
Read and pass the passed -dtb to the kernel, thus enabling easier
debugging with custom DTBs.
I thought we had enough controls with the QEMU command
On 7/30/24 19:56, Michael S. Tsirkin wrote:
On Tue, Jul 30, 2024 at 09:26:20PM +0900, Akihiko Odaki wrote:
On 2024/07/30 20:37, Michael S. Tsirkin wrote:
On Mon, Jul 15, 2024 at 02:19:06PM +0900, Akihiko Odaki wrote:
Based-on: <20240714-rombar-v2-0-af1504ef5...@daynix.com>
("[PATCH v2 0/4] hw/
Hello Chalapathi
On 7/30/24 19:23, Chalapathi V wrote:
Hello,
In patch v6 below issues detected during Coverity Scan were fixed.
- CID 1558831: Resource leaks (RESOURCE_LEAK)
Variable "rsp_payload" going out of scope leaks the storage it points to.
- CID 1558827:(OVERRUN)
Overrunnin
On 7/29/24 21:00, Alejandro Zeise wrote:
This change adds an accumulative hashing function
(qcrypto_hash_accumulate_bytesv) and implementation
for each of the crypto library backends that QEMU supports.
The QCrypto API did not support hashing in an accumulative mode.
As such, hardware hash modul
t prefix from OFF_AUTOPCIBAR_OFF to OFF_AUTO_PCIBAR_OFF.
Signed-off-by: Markus Armbruster
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
qapi/common.json | 1 -
hw/vfio/pci.c| 10 +-
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/qapi/common.json b/qapi/commo
Hello Alejandro,
On 7/29/24 21:00, Alejandro Zeise wrote:
Make the Aspeed HACE module use the new qcrypto accumulative hashing functions
when in scatter-gather accumulative mode. A hash context will maintain a
"running-hash" as each scatter-gather chunk is received.
Previously each scatter-gath
On 7/26/24 01:53, Nicholas Piggin wrote:
+static void transfer(PnvSpi *s, PnvXferBuffer *payload)
+{
+uint32_t tx;
+uint32_t rx;
+PnvXferBuffer *rsp_payload = NULL;
+
+rsp_payload = pnv_spi_xfer_buffer_new();
+for (int offset = 0; offset < payload->len; offset += s->transfer_l
On 7/26/24 01:53, Nicholas Piggin wrote:
From: Chalapathi V
In this commit SPI shift engine and sequencer logic is implemented.
Shift engine performs serialization and de-serialization according to the
control by the sequencer and according to the setup defined in the
configuration registers. S
the serial port as it does on real hardware.
This requires a linkage between adu and lpc, which allows adu to
perform memory access in the lpc space.
Reviewed-by: Cédric Le Goater
Signed-off-by: Nicholas Piggin
---
hw/ppc/pnv.c | 4 ++
hw/ppc/pnv_adu.c | 95
On 7/26/24 01:52, Nicholas Piggin wrote:
The POWER8 LPC ISA device irqs all get combined and reported to the line
connected the PSI LPCHC irq. POWER9 changed this so only internal LPC
host controller irqs use that line, and the device irqs get routed to
4 new lines connected to PSI SERIRQ0-3.
PO
On 7/24/24 23:21, Michael Kowal wrote:
From: Frederic Barrat
Moving xive2_nvp_pic_print_info() to align with the other "pic_print_info"
functions.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/hw/ppc/xi
On 7/24/24 23:21, Michael Kowal wrote:
From: Frederic Barrat
In XIVE Gen 2 there were some minor changes to the TIMA header that were
updated when printed.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/intc/xive.c | 12
t targeting a VP-group
or crowd.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/hw/ppc/xive2_regs.h | 7 +++
hw/intc/xive2.c | 7 +--
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git
The following changes since commit 3cce8bd4d737f2ca688bbdcb92cd5cc683245bbd:
Merge tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu into
staging (2024-07-23 15:23:05 +1000)
are available in the Git repository at:
https://github.com/legoater/qemu/ tags/pull-vfio-20240723-1
On 7/23/24 16:00, Cédric Le Goater wrote:
The following changes since commit 6af69d02706c821797802cfd56acdac13a7c9422:
Merge tag 'nvme-next-pull-request' of https://gitlab.com/birkelund/qemu into
staging (2024-07-23 13:55:45 +1000)
are available in the Git repository at:
Hello
On 7/23/24 16:23, Yi Liu wrote:
On 2024/7/23 05:13, Joao Martins wrote:
This small series adds support for IOMMU dirty tracking support via the
IOMMUFD backend. The hardware capability is available on most recent x86
hardware (and these SMMUv3 in upcoming v6.11). The series is divided
org
Let's remove the first instance.
Fixes: 938026053f4 ("vfio/container: Switch to QOM")
Signed-off-by: Eric Auger
Reviewed-by: Cédric Le Goater
Reviewed-by: Zhenzhong Duan
---
hw/vfio/container.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/vfio/container.c b/hw/vf
From: Zhenzhong Duan
mdevs aren't "physical" devices and when asking for backing IOMMU info,
it fails the entire provisioning of the guest. Fix that by setting
vbasedev->mdev true so skipping HostIOMMUDevice initialization in the
presence of mdevs.
Fixes: 930589520128 ("vfio/iommufd: Implement H
get() ]
Signed-off-by: Cédric Le Goater
Reviewed-by: Zhenzhong Duan
---
include/hw/vfio/vfio-common.h | 2 ++
hw/vfio/iommufd.c | 26 ++
2 files changed, 28 insertions(+)
diff --git a/include/hw/vfio/vfio-common.h b/include/hw/vfio/v
: Cédric Le Goater
Reviewed-by: Eric Auger
Reviewed-by: Zhenzhong Duan
---
hw/vfio/iommufd.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c
index
7c1b9e0284a3e84f68d13031cd517bffc47376d8..7390621ee92762c5d752c0fae907e71380b6e980
rtins
Reviewed-by: Cédric Le Goater
Reviewed-by: Zhenzhong Duan
Reviewed-by: Eric Auger
---
include/hw/vfio/vfio-common.h | 2 ++
hw/vfio/helpers.c | 14 ++
hw/vfio/pci.c | 12 +++-
3 files changed, 19 insertions(+), 9 deletions(-)
diff --
;all of nothing' of type1 approach that we have
been using so far between container vs device dirty tracking.
Signed-off-by: Joao Martins
Reviewed-by: Zhenzhong Duan
[ clg: Added ERRP_GUARD() in iommufd_cdev_autodomains_get() ]
Signed-off-by: Cédric Le Goater
Reviewed-by: Eric Auger
---
incl
attach_device().
Suggested-by: Zhenzhong Duan
Signed-off-by: Joao Martins
Reviewed-by: Cédric Le Goater
Reviewed-by: Eric Auger
---
include/sysemu/host_iommu_device.h | 3 ---
backends/iommufd.c | 3 ++-
hw/vfio/container.c| 5 +
hw/vfio/iommufd.c
() being called early
during attach_device().
Signed-off-by: Joao Martins
Reviewed-by: Cédric Le Goater
Reviewed-by: Zhenzhong Duan
Reviewed-by: Eric Auger
---
include/sysemu/host_iommu_device.h | 4
hw/vfio/iommufd.c | 1 +
2 files changed, 5 insertions(+)
diff --git a
From: Joao Martins
mdevs aren't "physical" devices and when asking for backing IOMMU info, it
fails the entire provisioning of the guest. Fix that by skipping
HostIOMMUDevice initialization in the presence of mdevs, and skip setting
an iommu device when it is known to be an mdev.
Cc: Zhenzhong D
From: Zhenzhong Duan
mdevs aren't "physical" devices and when asking for backing IOMMU info,
it fails the entire provisioning of the guest. Fix that by setting
vbasedev->mdev true so skipping HostIOMMUDevice initialization in the
presence of mdevs.
Fixes: 930589520128 ("vfio/iommufd: Implement H
From: Joao Martins
ioctl(iommufd, IOMMU_HWPT_SET_DIRTY_TRACKING, arg) is the UAPI that
enables or disables dirty page tracking. The ioctl is used if the hwpt
has been created with dirty tracking supported domain (stored in
hwpt::flags) and it is called on the whole list of iommu domains.
Signed-
From: Joao Martins
The helper will be able to fetch vendor agnostic IOMMU capabilities
supported both by hardware and software. Right now it is only iommu dirty
tracking.
Signed-off-by: Joao Martins
Reviewed-by: Zhenzhong Duan
Reviewed-by: Cédric Le Goater
Reviewed-by: Eric Auger
fully
GET_HW_INFO. This means vfio_device_hiod_realize() is called in
different places within the backend .attach_device() implementation.
Suggested-by: Cédric Le Goater
Signed-off-by: Joao Martins
Reviewed-by: Zhenzhong Duan
Reviewed-by: Cédric Le Goater
[ clg: Fixed error handli
The following changes since commit 6af69d02706c821797802cfd56acdac13a7c9422:
Merge tag 'nvme-next-pull-request' of https://gitlab.com/birkelund/qemu into
staging (2024-07-23 13:55:45 +1000)
are available in the Git repository at:
https://github.com/legoater/qemu/ tags/pull-vfio-20240723
fo
On 7/23/24 10:56, Joao Martins wrote:
On 23/07/2024 09:35, Cédric Le Goater wrote:
On 7/22/24 23:13, Joao Martins wrote:
This small series adds support for IOMMU dirty tracking support via the
IOMMUFD backend. The hardware capability is available on most recent x86
hardware (and these SMMUv3
On 7/22/24 23:13, Joao Martins wrote:
This small series adds support for IOMMU dirty tracking support via the
IOMMUFD backend. The hardware capability is available on most recent x86
hardware (and these SMMUv3 in upcoming v6.11). The series is divided
organized as follows:
* Patches 1 - 7: IOMMU
On 7/23/24 10:05, Joao Martins wrote:
On 23/07/2024 08:55, Eric Auger wrote:
On 7/23/24 09:44, Cédric Le Goater wrote:
On 7/23/24 09:38, Eric Auger wrote:
Hi Joao,
On 7/22/24 23:13, Joao Martins wrote:
Move the HostIOMMUDevice::realize() to be invoked during the attach
of the device
means vfio_device_hiod_realize() is called in
different places within the backend .attach_device() implementation.
Suggested-by: Cédric Le Goater
Signed-off-by: Joao Martins
Reviewed-by: Zhenzhong Duan
---
include/hw/vfio/vfio-common.h | 1 +
hw/vfio/common.c | 16 ++--
ed in
different places within the backend .attach_device() implementation.
Suggested-by: Cédric Le Goater
Signed-off-by: Joao Martins
Reviewed-by: Zhenzhong Duan
---
include/hw/vfio/vfio-common.h | 1 +
hw/vfio/common.c | 16 ++--
hw/vfio/container.c | 4
On 7/23/24 06:38, Duan, Zhenzhong wrote:
-Original Message-
From: Joao Martins
Subject: [PATCH v6 1/9] vfio/iommufd: Introduce auto domain creation
There's generally two modes of operation for IOMMUFD:
1) The simple user API which intends to perform relatively simple things
with IOM
On 7/23/24 08:13, Joao Martins wrote:
On 23/07/2024 06:11, Duan, Zhenzhong wrote:
-Original Message-
From: Joao Martins
Subject: [PATCH v6 5/9] vfio/iommufd: Probe and request hwpt dirty
tracking capability
In preparation to using the dirty tracking UAPI, probe whether the IOMMU
sup
On 7/22/24 20:01, Joao Martins wrote:
On 22/07/2024 18:04, Cédric Le Goater wrote:
On 7/22/24 18:29, Joao Martins wrote:
On 22/07/2024 16:58, Cédric Le Goater wrote:
On 7/22/24 17:42, Joao Martins wrote:
On 22/07/2024 16:13, Cédric Le Goater wrote:
On 7/22/24 17:01, Joao Martins wrote:
On
Hello Alejandro,
On 7/22/24 22:15, Alejandro Zeise wrote:
Make the Aspeed HACE module use the new qcrypto accumulative hashing functions
when in scatter-gather accumulative mode. A hash context will maintain a
"running-hash" as each scatter-gather chunk is received.
Previously each scatter-gath
On 7/22/24 19:04, Cédric Le Goater wrote:
On 7/22/24 18:29, Joao Martins wrote:
On 22/07/2024 16:58, Cédric Le Goater wrote:
On 7/22/24 17:42, Joao Martins wrote:
On 22/07/2024 16:13, Cédric Le Goater wrote:
On 7/22/24 17:01, Joao Martins wrote:
On 22/07/2024 15:53, Cédric Le Goater wrote
On 7/22/24 18:29, Joao Martins wrote:
On 22/07/2024 16:58, Cédric Le Goater wrote:
On 7/22/24 17:42, Joao Martins wrote:
On 22/07/2024 16:13, Cédric Le Goater wrote:
On 7/22/24 17:01, Joao Martins wrote:
On 22/07/2024 15:53, Cédric Le Goater wrote:
On 7/19/24 19:26, Joao Martins wrote:
On
On 7/22/24 17:42, Joao Martins wrote:
On 22/07/2024 16:13, Cédric Le Goater wrote:
On 7/22/24 17:01, Joao Martins wrote:
On 22/07/2024 15:53, Cédric Le Goater wrote:
On 7/19/24 19:26, Joao Martins wrote:
On 19/07/2024 15:24, Joao Martins wrote:
On 19/07/2024 15:17, Cédric Le Goater wrote
On 7/22/24 17:09, Joao Martins wrote:
On 22/07/2024 15:57, Eric Farman wrote:
On Mon, 2024-07-22 at 15:07 +0800, Zhenzhong Duan wrote:
mdevs aren't "physical" devices and when asking for backing IOMMU info,
it fails the entire provisioning of the guest. Fix that by setting
vbasedev->mdev true s
On 7/22/24 17:01, Joao Martins wrote:
On 22/07/2024 15:53, Cédric Le Goater wrote:
On 7/19/24 19:26, Joao Martins wrote:
On 19/07/2024 15:24, Joao Martins wrote:
On 19/07/2024 15:17, Cédric Le Goater wrote:
On 7/19/24 14:05, Joao Martins wrote:
By default VFIO migration is set to auto
On 7/19/24 19:26, Joao Martins wrote:
On 19/07/2024 15:24, Joao Martins wrote:
On 19/07/2024 15:17, Cédric Le Goater wrote:
On 7/19/24 14:05, Joao Martins wrote:
By default VFIO migration is set to auto, which will support live
migration if the migration capability is set *and* also dirty
On 7/22/24 10:50, Joao Martins wrote:
On 22/07/2024 06:16, Duan, Zhenzhong wrote:
-Original Message-
From: Joao Martins
Subject: [PATCH v5 05/13] vfio/iommufd: Introduce auto domain creation
There's generally two modes of operation for IOMMUFD:
1) The simple user API which intends to
HostIOMMUDevice::realize() being called early
during attach_device().
Signed-off-by: Joao Martins
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/sysemu/host_iommu_device.h | 4
hw/vfio/iommufd.c | 1 +
2 files changed, 5 insertions(+)
diff --git a/include/sysemu
On 7/19/24 14:04, Joao Martins wrote:
This small series adds support for IOMMU dirty tracking support via the
IOMMUFD backend. The hardware capability is available on most recent x86
hardware. The series is divided organized as follows:
* Patch 1-2: Fixes a regression into mdev support with IOMM
On 7/22/24 09:07, Zhenzhong Duan wrote:
This fixes a potential issue with mdev that fails to initialize
HOST_IOMMU_DEVICE.
Reason is mdev isn't physical device and doesn't support IOMMU_GET_HW_INFO.
I thought ap/ccw are all mdev type and need a fix.
This series depends on a patch from Joao whi
On 7/19/24 18:50, Eric Auger wrote:
In vfio_connect_container's error path, the base container is
removed twice form the VFIOAddressSpace QLIST: first on the
listener_release_exit label and second, on free_container_exit
label, through object_unref(container), which calls
vfio_container_instance_
On 7/22/24 09:07, Zhenzhong Duan wrote:
This fixes a potential issue with mdev that fails to initialize
HOST_IOMMU_DEVICE.
Reason is mdev isn't physical device and doesn't support IOMMU_GET_HW_INFO.
I thought ap/ccw are all mdev type and need a fix.
This series depends on a patch from Joao whi
On some runners, test_arm_ast2600_evb_buildroot_tpm can take longer
than 90s to complete. Increase timeout for these.
Reported-by: Thomas Huth
Signed-off-by: Cédric Le Goater
---
tests/avocado/machine_aspeed.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/avocado
From: Jamin Lin
AST2700 and AST2600 ADC controllers are identical.
Introduce ast2700 class and set 2 engines.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
include/hw/adc/aspeed_adc.h | 1 +
hw/adc/aspeed_adc.c | 16
2 files changed, 17 insertions
different.
Incrementing the version of aspeed_i2c_vmstate to 3.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
include/hw/i2c/aspeed_i2c.h | 4 ++--
hw/i2c/aspeed_i2c.c | 39 -
2 files changed, 23 insertions(+), 20 deletions(-)
diff --git
From: Cédric Le Goater
The default behavior of some Aspeed machines is to boot from the eMMC
device, like the rainier-bmc. Others like ast2600-evb could also boot
from eMMC if the HW strapping boot-from-eMMC bit was set. Add a
property to set or unset this bit. This is useful to test boot images
From: Cédric Le Goater
This value is taken from a running Rainier machine.
Signed-off-by: Cédric Le Goater
Reviewed-by: Andrew Jeffery
Tested-by: Andrew Jeffery
Tested-by: Philippe Mathieu-Daudé
---
hw/arm/aspeed.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm
register space for AST2700.
Introduce a new class attribute to set the I2C controller memory size
for different ASPEED SOCs.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
include/hw/i2c/aspeed_i2c.h | 2 +-
hw/i2c/aspeed_i2c.c | 6 +-
2 files changed, 6 insertions(+), 2
From: Cédric Le Goater
Report support on the AST2600 SoC if the boot-from-eMMC HW strapping
bit is set at the board level. AST2700 also has support but it is not
yet ready in QEMU and others SoCs do not have support, so return false
always for these.
Signed-off-by: Cédric Le Goater
Reviewed-by
ADC model
* I2C model changes preparing AST2700 I2C support
--------
Cédric Le Goater (10):
aspeed/smc: Fix possible integer overflow
aspeed: Change type of eMMC device
aspeed: Load eMMC first boot area as a boot rom
From: Cédric Le Goater
To change default behavior of a machine and boot from eMMC, future
changes will add a machine option to let the user configure the
boot-from-eMMC HW strapping bit. Add a new machine attribute first.
Signed-off-by: Cédric Le Goater
Reviewed-by: Andrew Jeffery
Tested-by
: Cédric Le Goater
---
hw/arm/aspeed_ast27x0.c | 12
1 file changed, 12 insertions(+)
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index a9fb0d4b8874..4257b5e8af82 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -60,6 +60,7 @@ static const hwaddr
From: Cédric Le Goater
When the boot-from-eMMC HW strapping bit is set, use the 'boot-config'
property to set the boot config register to boot from the first boot
area partition of the eMMC device. Also set the boot partition size
of the device.
Signed-off-by: Cédric Le Goater
R
From: Cédric Le Goater
The first boot area partition (64K) of the eMMC device should contain
an initial boot loader (u-boot SPL). Load it as a ROM only if an eMMC
device is available to boot from but no flash device is.
Signed-off-by: Cédric Le Goater
Reviewed-by: Andrew Jeffery
Tested-by
From: Cédric Le Goater
Bit SCU500[2] of the AST2600 controls the boot device of the SoC.
Future changes will configure this bit to boot from eMMC disk images
specially built for this purpose.
Signed-off-by: Joel Stanley
Signed-off-by: Cédric Le Goater
Reviewed-by: Andrew Jeffery
Tested-by
er-builder,target=p10bmc/lastSuccessfulBuild/
Signed-off-by: Cédric Le Goater
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
---
tests/avocado/machine_aspeed.py | 39 +
1 file changed, 39 insertions(+)
diff --git a/tests/avocado/machine_aspeed.
From: Cédric Le Goater
The QEMU device model representing the eMMC device of the machine is
currently created with type SD_CARD. Change the type to EMMC now that
it is available.
Signed-off-by: Cédric Le Goater
Reviewed-by: Andrew Jeffery
Tested-by: Andrew Jeffery
Reviewed-by: Philippe
is always between 0 and
15 and, in this case, there is always a matching hclk divisor. Remove
the return 0 and use g_assert_not_reached() instead.
Fixes: Coverity CID 1547822
Suggested-by: Peter Maydell
Signed-off-by: Cédric Le Goater
Reviewed-by: Peter Maydell
---
hw/ssi/aspeed_smc.c | 3 +--
1 fi
From: Jamin Lin
Fix coding style issues from checkpatch.pl
Test command:
./scripts/checkpatch.pl --no-tree -f hw/arm/aspeed.c
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
hw/arm/aspeed.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a
calls
vfio_container_instance_finalize().
Let's remove the first instance.
Fixes: 938026053f4 ("vfio/container: Switch to QOM")
Signed-off-by: Eric Auger
Oh. Nice catch !
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/vfio/container.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/v
On 7/19/24 14:05, Joao Martins wrote:
By default VFIO migration is set to auto, which will support live
migration if the migration capability is set *and* also dirty page
tracking is supported.
For testing purposes one can force enable without dirty page tracking
via enable-migration=on, but tha
able to successfully
GET_HW_INFO. This means vfio_device_hiod_realize() is called in
different places within the backend .attach_device() implementation.
Suggested-by: Cédric Le Goater
Signed-off-by: Joao Martins
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/hw/vfio/vfio-com
igned-off-by: Joao Martins
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/hw/vfio/vfio-common.h | 2 ++
hw/vfio/helpers.c | 14 ++
hw/vfio/pci.c | 12 +++-
3 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/include/hw
On 7/18/24 08:49, Jamin Lin wrote:
Currently, users can set the intc mapping table with
enumerated device id and device irq to get the INTC orgate
input pins. However, some devices use the continuous bits number in the
same orgate. To reduce the enumerated device id definition,
create a new API t
On 7/18/24 08:49, Jamin Lin wrote:
The "Current DMA Operating Address Status(0x50)" register of
I2C new mode has been removed in AST2700.
This register is used for debugging and it is a read only register.
To support AST2700 DMA mode, introduce a new
dma_dram_offset class attribute in AspeedI2Cb
s not need to decrease the dram physical
high part address for DMA operation.
(high part physical address bit[7:0] – 4)
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/i2c/aspeed_i2c.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/hw/i2c/a
ize either
4KB or 64KB.
Could you tell me which size you prefer?
I would keep the larger value for the model and let FW decide to resize or not.
Thanks for suggestion.
Got it.
and so,
Reviewed-by: Cédric Le Goater
Thanks,
C.
Thanks,
C.
* Email Confidentiality Noti
On 7/18/24 18:18, Cédric Le Goater wrote:
On 7/18/24 08:49, Jamin Lin wrote:
v1:
1. support ADC for AST2700
2. support I2C for AST2700
Jamin Lin (15):
aspeed/adc: Add AST2700 support
aspeed/soc: support ADC for AST2700
hw/i2c/aspeed: support to set the different memory size
hw/i2c
On 7/18/24 15:47, Joao Martins wrote:
On 17/07/2024 10:31, Joao Martins wrote:
On 17/07/2024 10:28, Cédric Le Goater wrote:
@@ -224,6 +300,11 @@ static void
iommufd_cdev_detach_container(VFIODevice *vbasedev,
{
Error *err = NULL;
+ if (vbasedev->h
On 7/18/24 08:49, Jamin Lin wrote:
v1:
1. support ADC for AST2700
2. support I2C for AST2700
Jamin Lin (15):
aspeed/adc: Add AST2700 support
aspeed/soc: support ADC for AST2700
hw/i2c/aspeed: support to set the different memory size
hw/i2c/aspeed: support discontinuous register memor
On 7/17/24 15:06, Cédric Le Goater wrote:
The image was built using the process described in commit c8cb19876d3e
("hw/sd/sdcard: Support boot area in emmc image") with artefacts from
the latest successful build of the IBM P10 BMC platform available on:
https://jenkins.openbmc.
On 7/17/24 08:30, Cédric Le Goater wrote:
Hello,
This series enables boot from eMMC on the rainier-bmc machine, which
is the default behavior and also on the AST2600 EVB using a machine
option to change the default.
First 6 patches adjust the machine setup and HW strapping to boot from
eMMC
On 7/12/24 18:36, Cédric Le Goater wrote:
Coverity reports a possible integer overflow because routine
aspeeed_smc_hclk_divisor() has a codepath returning 0, which could
lead to an integer overflow when computing variable 'hclk_shift' in
the caller aspeed_smc_dma_calibration().
The va
On 7/18/24 11:44, Jamin Lin wrote:
Hi Cedric,
Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register
memory region of I2C bus
On 7/18/24 08:49, Jamin Lin wrote:
It only support continuous register memory region for all I2C bus.
However, the register address of all I2c bus
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