fault: 1024)
target=
Boolean options correspond to hardware capabilities that can be disabled
Signed-off-by: Nicolas Pitre
Signed-off-by: Drew Fustini
---
Changes since v1:
- remove initialization of the example SoC now that device properties
can be use to configure controllers from the co
From: Nicolas Pitre
Add boolean property for CBQRI and imply it should be enabled for the
RISC-V virt machine.
Signed-off-by: Nicolas Pitre
Signed-off-by: Drew Fustini
---
Changes since v1:
- remove example SoC now that command line arguments supported for CBQRI
- change 'select RISC_
Pitre
Signed-off-by: Drew Fustini
---
Changes since v1:
- Move defines TYPE_RISCV_CBQRI_CC from cbqri_capacity.c and
TYPE_RISCV_CBQRI_BC from cbqri_bandwidth.c into include/hw/riscv.h
so machines can include it (suggested by Alistair)
include/hw/riscv/cbqri.h | 81
Build the example SoC instantiation code when CBQRI_EXAMPLE_SOC is
enabled.
Signed-off-by: Nicolas Pitre
Signed-off-by: Drew Fustini
---
Note: the example SoC instantiation code is only included for reference
and it is not required anymore for the CBQRI proof-of-concept to work.
The CBQRI
From: Nicolas Pitre
Build the CBQRI controllers when RISC-V CBQRI is enabled by Kconfig.
Signed-off-by: Nicolas Pitre
Signed-off-by: Drew Fustini
---
Changes since v1:
- remove example SoC now that command line arguments supported for CBQRI
hw/riscv/meson.build | 2 ++
1 file changed, 2
This RFC series implements the Ssqosid extension and the sqoscfg CSR as
defined in the RISC-V Capacity and Bandwidth Controller QoS Register
Interface (CBQRI) specification [1]. Quality of Service (QoS) in this
context is concerned with shared resources on an SoC such as cache
capacity and memory b
controller
0x4821000 4KB Cluster 1 L2 cache controller
0x4828000 4KB Memory controller 0
0x4829000 4KB Memory controller 1
0x482A000 4KB Memory controller 2
0x482B000 4KB Shared LLC cache controller
Signed-off-by: Nicolas Pitre
Signed-off-by: Drew Fustini
---
Note: this example SoC
, Occupancy
- Capacity allocation ops: CONFIG_LIMIT, READ_LIMIT, FLUSH_RCID
Link: https://github.com/riscv-non-isa/riscv-cbqri/blob/main/riscv-cbqri.pdf
Signed-off-by: Nicolas Pitre
Signed-off-by: Drew Fustini
---
Changes since v1:
- Move TYPE_RISCV_CBQRI_CC to include/hw/riscv/cbqri.h so that
message]
Signed-off-by: Drew Fustini
---
Changes since v1:
- rebase on current master (v8.0.50) instead of 8.0.0-rc4
disas/riscv.c | 1 +
target/riscv/cpu.c | 2 ++
target/riscv/cpu.h | 3 +++
target/riscv/cpu_bits.h | 5 +
target/riscv/csr.c | 34
, Total read/write byte count, Total
read byte count, Total write byte count
- Bandwidth allocation operations: CONFIG_LIMIT, READ_LIMIT
Link: https://github.com/riscv-non-isa/riscv-cbqri/blob/main/riscv-cbqri.pdf
Signed-off-by: Nicolas Pitre
Signed-off-by: Drew Fustini
Pitre
Signed-off-by: Drew Fustini
---
include/hw/riscv/cbqri.h | 81
1 file changed, 81 insertions(+)
create mode 100644 include/hw/riscv/cbqri.h
diff --git a/include/hw/riscv/cbqri.h b/include/hw/riscv/cbqri.h
new file mode 100644
index
This RFC series implements the Ssqosid extension and the sqoscfg CSR as
defined in the RISC-V Capacity and Bandwidth Controller QoS Register
Interface (CBQRI) specification [1]. Quality of Service (QoS) in this
context is concerned with shared resources on an SoC such as cache
capacity and memory b
From: Nicolas Pitre
Build the CBQRI controllers and CBQRI example configuration when enabled
by Kconfig.
Signed-off-by: Nicolas Pitre
Signed-off-by: Drew Fustini
---
hw/riscv/meson.build | 4
1 file changed, 4 insertions(+)
diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build
index
controller
0x4821000 4KB Cluster 1 L2 cache controller
0x4828000 4KB Memory controller 0
0x4829000 4KB Memory controller 1
0x482A000 4KB Memory controller 2
0x482B000 4KB Shared LLC cache controller
Signed-off-by: Nicolas Pitre
Signed-off-by: Drew Fustini
---
Note: this solution is
message]
Signed-off-by: Drew Fustini
---
Note: the Ssqosid extension and CBQRI spec are still in a draft state.
The CSR address of sqoscfg is not final.
disas/riscv.c | 1 +
target/riscv/cpu.c | 2 ++
target/riscv/cpu.h | 3 +++
target/riscv/cpu_bits.h | 5 +
target
From: Nicolas Pitre
Initialize an example SoC that instantiates CBQRI capacity and bandwidth
controllers with specific parameters for testing purposes.
Signed-off-by: Nicolas Pitre
Signed-off-by: Drew Fustini
---
Note: this solution is not flexible enough for upstream inclusion.
Future work
From: Nicolas Pitre
Add Kconfig options for CBQRI and an example instantiation of capacity
and bandwidth controllers.
Signed-off-by: Nicolas Pitre
Signed-off-by: Drew Fustini
---
hw/riscv/Kconfig | 8
1 file changed, 8 insertions(+)
diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig
Signed-off-by: Drew Fustini
---
hw/riscv/cbqri_bandwidth.c | 511 +
1 file changed, 511 insertions(+)
create mode 100644 hw/riscv/cbqri_bandwidth.c
diff --git a/hw/riscv/cbqri_bandwidth.c b/hw/riscv/cbqri_bandwidth.c
new file mode 100644
index
, Occupancy
- Capacity allocation ops: CONFIG_LIMIT, READ_LIMIT, FLUSH_RCID
Link: https://github.com/riscv-non-isa/riscv-cmqri/blob/main/riscv-cbqri.pdf
Signed-off-by: Nicolas Pitre
Signed-off-by: Drew Fustini
---
hw/riscv/cbqri_capacity.c | 532 ++
1 file
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