Sure, I will fix it in the next patch series.
Thank you
Sincerely,
Fea
On Mon, Jun 10, 2024 at 7:49 PM Philippe Mathieu-Daudé
wrote:
> Hi Fea,
>
> On 4/6/24 09:15, Fea.Wang wrote:
> > Due to a description loading failure, adding a trace log makes observing
> > the DMA behavior easy.
> >
> >
Sure, I will reorder the commits in the next patch series.
Thank you
Sincerely,
Fea
On Thu, Jun 6, 2024 at 7:58 AM Alistair Francis
wrote:
> On Tue, Jun 4, 2024 at 4:23 PM Fea.Wang wrote:
> >
> > Add RISC-V privilege 1.13 support.
> >
> > Signed-off-by: Fea.Wang
> > Signed-off-by: Fea.Wang
I just encountered this issue when running Linux, and the trouble will be
fixed after the patches. So I think they work.
Sincerely,
Fea
On Mon, Jun 3, 2024 at 6:31 PM Edgar E. Iglesias
wrote:
> On Mon, Jun 3, 2024 at 7:48 AM Fea.Wang wrote:
>
>> Fix the transmission return size because not
Hi Edgar,
thank you for the advice, I will squash them in the next version of the
patch series.
Sincerely,
Fea
On Mon, Jun 3, 2024 at 6:21 PM Edgar E. Iglesias
wrote:
> On Mon, Jun 3, 2024 at 7:48 AM Fea.Wang wrote:
>
>> When calling the loading a description function, it should be noticed
>>
Hi Edgar,
Thank you for recommending to me. I will make the change in the next
version of the patch series.
Sincerely,
Fea
On Mon, Jun 3, 2024 at 6:19 PM Edgar E. Iglesias
wrote:
> On Mon, Jun 3, 2024 at 7:47 AM Fea.Wang wrote:
>
>> Loading a description from memory may cause a bus-error. In
Thank you for correcting me.
I will fix it in the next version of the patch series.
Sincerely,
Fea
On Tue, Jun 4, 2024 at 8:54 AM Alistair Francis
wrote:
> On Wed, May 15, 2024 at 6:01 PM Fea.Wang wrote:
> >
> > Based on privilege 1.13 spec, there should be a bit56 for 'P1P13' in
> >
Got it.
I will fix it in the next version of the patch series.
Sincerely,
Fea
On Tue, Jun 4, 2024 at 8:56 AM Alistair Francis
wrote:
> On Tue, Jun 4, 2024 at 10:46 AM Alistair Francis
> wrote:
> >
> > On Wed, May 15, 2024 at 6:02 PM Fea.Wang wrote:
> > >
> > > Add RISC-V privilege 1.13
PATCH/* |sed -e 's/$/,/')" /XXXPATCH/*
Sincerely,
Fea
On Thu, May 30, 2024 at 6:37 PM Andrew Jones
wrote:
> On Thu, May 30, 2024 at 11:30:28AM GMT, Fea Wang wrote:
> > Hi Daniel,
> > thank you for your help.
> >
> > I found that only the cover is without many maintaine
Hi Daniel,
thank you for your help.
I found that only the cover is without many maintainers. I used to send
patches by git send-email --dry-run --to 'qemu-devel@nongnu.org,
qemu-ri...@nongnu.org' --cc-cmd='scripts/get_maintainer.pl -i' patches/*.
Do you have a better script for me?
Thank you.
Sorry that I only put the patch version on the cover letter.
I will resend the patches.
Sincerely,
Fea
Fea.Wang 於 2024年5月15日 週三 下午3:48寫道:
> Based on the change log for the RISC-V privilege 1.13 spec, add the
> support for ss1p13.
>
> Ref:
>
OK, I will correct it in the patch v2. Thank you.
Sincerely,
Fea
LIU Zhiwei 於 2024年5月13日 週一 上午10:49寫道:
>
> On 2024/5/10 14:58, Fea.Wang wrote:
> > Based on privileged spec 1.13, the RV32 needs to implement MEDELEGH
> > and HEDELEGH for exception codes 32-47 for reserving and exception codes
>
Thank you, I will correct it in the patch v2.
Sincerely,
Fea
LIU Zhiwei 於 2024年5月13日 週一 上午10:51寫道:
>
> On 2024/5/10 14:58, Fea.Wang wrote:
> > Based on privilege 1.13 spec, there should be a bit56 for 'P1P13' in
> > SMSTATEEN0 that controls access to the hedeleg.
> >
> > Signed-off-by:
Thank you, I will correct it in the patch v2.
Sincerely,
Fea
LIU Zhiwei 於 2024年5月13日 週一 上午10:55寫道:
>
> On 2024/5/10 14:58, Fea.Wang wrote:
> > From: Jim Shu
> >
> > Public the conversion function of priv_spec and string in cpu.h, so that
> > tcg-cpu.c could also use it.
> >
> > Signed-off-by:
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