Sorry for your inconvenience.
There's something wrong on my patchwork.
I'll upload them again and share the link soon.
Thanks again.
Best regards
Heecheol yang
From: Michael Rolnik
Sent: Wednesday, September 28, 2022 2:52:48 AM
To: Heecheol Yang
Cc: qemu-devel
Hello.
First of all, I am very sorry for my late response for following patchworks for
AVR gpio.:
* https://patchew.org/QEMU/20210313165445.2113938-1-f4...@amsat.org/
I couldn't check works for several years because of my personal reasons.
If I or anyone want to continue these works, can I
Thanks for your review.
Actually, the very recent v2 one is v4. There was an typo while I was writing
multiple mails for successful patchew builds(v2 and v3 has the same contents)
.. Sorry.
If needed, let me know to write the new titled version of mail which contains
the same contents.
-
I am very sorry for your inconvenience. This is 3rd version of the patch for
what I did.
I should have read the contribution guide again and again. I am very sorry
again.
The contents of the patch is the same with the v2. This mail is just for
patchew and making a new thread.
Here are what I ch
Hello, Thank you very much for your prompt and kind review.
This is my next version of the patch. Here are what I changed from the previous
one:
* Remove unnecessary header inclusions
* Replace codes for unreachable conditions with g_assert_not_reached()
function
* Remove 'enable' f
Add some of these features for avr gpio:
- GPIO I/O : PORTx registers
- Data Direction : DDRx registers
Following things are not supported yet:
- PINx registers
- MCUR registers
- Even though read/write for DDRx registers are
implemented, actual direction controls are not
suppor
