[PATCH v3] memory tier: consolidate the initialization of memory tiers

2024-07-04 Thread Ho-Ren (Jack) Chuang
mory types"): [0/2] https://lkml.kernel.org/r/20240405000707.2670063-1-horenchu...@bytedance.com [1/2] https://lkml.kernel.org/r/20240405000707.2670063-2-horenchu...@bytedance.com [1/2] https://lkml.kernel.org/r/20240405000707.2670063-3-horenchu...@bytedance.com Signed-off-by: Ho-Ren (

Re: [PATCH v2 1/1] memory tier: consolidate the initialization of memory tiers

2024-07-03 Thread Ho-Ren (Jack) Chuang
Hi Jonathan, I appreciate your feedback and valuable suggestions. Replies inlined. July 2, 2024 at 6:25 AM, "Jonathan Cameron" wrote: > > On Fri, 28 Jun 2024 06:09:23 +0000 > > "Ho-Ren (Jack) Chuang" wrote: > > > > > If we simply move t

Re: [PATCH v2 1/1] memory tier: consolidate the initialization of memory tiers

2024-07-01 Thread Ho-Ren (Jack) Chuang
Hi Huang, Ying, Thanks for your feedback and helpful suggestions. Replies inlined. June 30, 2024 at 10:13 PM, "Huang, Ying" wrote: > > Hi, Jack, > > "Ho-Ren (Jack) Chuang" writes: > > I suggest you to merge the [0/1] with the change log here. [0/1] &

[PATCH v2 1/1] memory tier: consolidate the initialization of memory tiers

2024-06-28 Thread Ho-Ren (Jack) Chuang
mutex_unlock(_tier_lock); + /* Record nodes with memory and CPU to set default DRAM performance. */ + nodes_and(default_dram_nodes, node_states[N_MEMORY], + node_states[N_CPU]); hotplug_memory_notifier(memtier_hotplug_callback, MEMTIER_HOTPLUG_PRI); return 0; -- Ho-Ren (Jack) Chuang

[PATCH v2 0/1] memory tier: consolidate the initialization of memory tiers

2024-06-28 Thread Ho-Ren (Jack) Chuang
...@bytedance.com [1/2] https://lkml.kernel.org/r/20240405000707.2670063-3-horenchu...@bytedance.com Ho-Ren (Jack) Chuang (1): memory tier: consolidate the initialization of memory tiers drivers/acpi/numa/hmat.c | 5 +-- include/linux/memory-tiers.h | 2 ++ mm/memory-tiers.c| 59

[PATCH v1] memory tier: consolidate the initialization of memory tiers

2024-06-20 Thread Ho-Ren (Jack) Chuang
g/r/20240405000707.2670063-3-horenchu...@bytedance.com Thanks, Ho-Ren (Jack) Chuang drivers/acpi/numa/hmat.c | 4 ++- include/linux/memory-tiers.h | 6 mm/memory-tiers.c| 70 ++-- 3 files changed, 44 insertions(+), 36 deletions(-) diff --git a/drivers/acpi/n

Re: [External] Re: [PATCH v11 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-04-17 Thread Ho-Ren (Jack) Chuang
On Wed, Apr 10, 2024 at 9:51 AM Jonathan Cameron wrote: > > On Tue, 9 Apr 2024 12:02:31 -0700 > "Ho-Ren (Jack) Chuang" wrote: > > > Hi Jonathan, > > > > On Tue, Apr 9, 2024 at 9:12 AM Jonathan Cameron > > wrote: > > > > > > On Fr

Re: [External] Re: [PATCH v11 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-04-09 Thread Ho-Ren (Jack) Chuang
On Tue, Apr 9, 2024 at 7:33 PM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > > On Fri, Apr 5, 2024 at 7:03 AM Jonathan Cameron > > wrote: > >> > >> On Fri, 5 Apr 2024 00:07:06 + > >> "Ho-Ren (Jack) Chuang"

Re: [External] Re: [PATCH v11 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

2024-04-09 Thread Ho-Ren (Jack) Chuang
On Tue, Apr 9, 2024 at 2:50 PM Andrew Morton wrote: > > On Tue, 9 Apr 2024 12:00:06 -0700 "Ho-Ren (Jack) Chuang" > wrote: > > > Hi Jonathan, > > > > On Fri, Apr 5, 2024 at 6:56 AM Jonathan Cameron > > wrote: > > > > > > On Fri

Re: [External] Re: [PATCH v11 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-04-09 Thread Ho-Ren (Jack) Chuang
Hi Jonathan, On Tue, Apr 9, 2024 at 9:12 AM Jonathan Cameron wrote: > > On Fri, 5 Apr 2024 15:43:47 -0700 > "Ho-Ren (Jack) Chuang" wrote: > > > On Fri, Apr 5, 2024 at 7:03 AM Jonathan Cameron > > wrote: > > > > > > On Fri, 5 Apr 202

Re: [External] Re: [PATCH v11 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

2024-04-09 Thread Ho-Ren (Jack) Chuang
Hi Jonathan, On Fri, Apr 5, 2024 at 6:56 AM Jonathan Cameron wrote: > > On Fri, 5 Apr 2024 00:07:05 +0000 > "Ho-Ren (Jack) Chuang" wrote: > > > Since different memory devices require finding, allocating, and putting > > memory types, these common

Re: [PATCH v11 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-04-05 Thread Ho-Ren (Jack) Chuang
On Fri, Apr 5, 2024 at 7:03 AM Jonathan Cameron wrote: > > On Fri, 5 Apr 2024 00:07:06 +0000 > "Ho-Ren (Jack) Chuang" wrote: > > > The current implementation treats emulated memory devices, such as > > CXL1.1 type3 memory, as normal DRAM when

[PATCH v11 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-04-04 Thread Ho-Ren (Jack) Chuang
to be managed, a default memory type is created for storing all memory types that are not initialized by device drivers and as a fallback. Signed-off-by: Ho-Ren (Jack) Chuang Signed-off-by: Hao Xiang Reviewed-by: "Huang, Ying" --- mm/memory-ti

[PATCH v11 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

2024-04-04 Thread Ho-Ren (Jack) Chuang
Since different memory devices require finding, allocating, and putting memory types, these common steps are abstracted in this patch, enhancing the scalability and conciseness of the code. Signed-off-by: Ho-Ren (Jack) Chuang Reviewed-by: "Huang, Ying" --- drivers/dax/kmem.c

[PATCH v11 0/2] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-04-04 Thread Ho-Ren (Jack) Chuang
997111-1-horenchu...@bytedance.com/T/#u -v1: * https://lore.kernel.org/lkml/20240301082248.3456086-1-horenchu...@bytedance.com/T/#u Ho-Ren (Jack) Chuang (2): memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types memory tier: create CPUless m

Re: [External] Re: [PATCH v10 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-04-04 Thread Ho-Ren (Jack) Chuang
r character > ruler at the top of the window. > > I wonder if you have a different tab indent size? The kernel uses 8 > characters. It might explain the few other odd indents if perhaps > you have it at 4 in your editor? > > https://www.kernel.org/doc/html/v4.10/process/coding-style.html > Got it. I was using tab=4. I will change to 8. Thanks! > Jonathan > > > > > > > + * initialized. > > > > + */ > > > > + continue; > > > > + > > > > memtier = set_node_memory_tier(node); > > > > if (IS_ERR(memtier)) > > > > /* > > > > > > > > -- Best regards, Ho-Ren (Jack) Chuang 莊賀任

Re: [PATCH v10 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-04-03 Thread Ho-Ren (Jack) Chuang
RAM); > > + default_dram_type = mt_find_alloc_memory_type(MEMTIER_ADISTANCE_DRAM, > > + > > _memory_types); > > Unusual indenting. Align with just after ( > Aligning with "(" will exceed 100 columns. Would that be acceptable? > > if (IS_ERR(default_dram_type)) > > panic("%s() failed to allocate default DRAM tier\n", > > __func__); > > > > @@ -868,6 +921,14 @@ static int __init memory_tier_init(void) > >* types assigned. > >*/ > > for_each_node_state(node, N_MEMORY) { > > + if (!node_state(node, N_CPU)) > > + /* > > + * Defer memory tier initialization on CPUless numa > > nodes. > > + * These will be initialized after firmware and > > devices are > > I think this wraps at just over 80 chars. Seems silly to wrap so tightly and > not > quite fit under 80. (this is about 83 chars. > I can fix this. I have a question. From my patch, this is <80 chars. However, in an email, this is >80 chars. Does that mean we need to count the number of chars in an email, not in a patch? Or if I missed something? like vim configuration or? > > + * initialized. > > + */ > > + continue; > > + > > memtier = set_node_memory_tier(node); > > if (IS_ERR(memtier)) > > /* > -- Best regards, Ho-Ren (Jack) Chuang 莊賀任

Re: [PATCH v10 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

2024-04-03 Thread Ho-Ren (Jack) Chuang
Hi Jonathan, Thanks for your feedback. I will fix them (inlined) in the next V11. No worries, it's never too late! On Wed, Apr 3, 2024 at 9:52 AM Jonathan Cameron wrote: > > On Tue, 2 Apr 2024 00:17:37 +0000 > "Ho-Ren (Jack) Chuang" wrote: > > > Since different me

[PATCH v10 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-04-01 Thread Ho-Ren (Jack) Chuang
to be managed, a default memory type is created for storing all memory types that are not initialized by device drivers and as a fallback. Signed-off-by: Ho-Ren (Jack) Chuang Signed-off-by: Hao Xiang Reviewed-by: "Huang, Ying" --- include/linux/memory-tiers.h | 5 +- mm/memo

[PATCH v10 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

2024-04-01 Thread Ho-Ren (Jack) Chuang
Since different memory devices require finding, allocating, and putting memory types, these common steps are abstracted in this patch, enhancing the scalability and conciseness of the code. Signed-off-by: Ho-Ren (Jack) Chuang Reviewed-by: "Huang, Ying" --- drivers/dax/kmem.c

[PATCH v10 0/2] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-04-01 Thread Ho-Ren (Jack) Chuang
#u -v1: * https://lore.kernel.org/lkml/20240301082248.3456086-1-horenchu...@bytedance.com/T/#u Ho-Ren (Jack) Chuang (2): memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types memory tier: create CPUless memory tiers after obtaining HMAT info d

Re: [External] Re: [PATCH v9 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

2024-04-01 Thread Ho-Ren (Jack) Chuang
Hi SeongJae, On Mon, Apr 1, 2024 at 11:27 AM Ho-Ren (Jack) Chuang wrote: > > Hi SeongJae, > > On Sun, Mar 31, 2024 at 12:09 PM SeongJae Park wrote: > > > > Hi Ho-Ren, > > > > On Fri, 29 Mar 2024 05:33:52 + "Ho-Ren (Jack) Chuang" > > wro

Re: [External] Re: [PATCH v9 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

2024-04-01 Thread Ho-Ren (Jack) Chuang
Hi SeongJae, On Sun, Mar 31, 2024 at 12:09 PM SeongJae Park wrote: > > Hi Ho-Ren, > > On Fri, 29 Mar 2024 05:33:52 +0000 "Ho-Ren (Jack) Chuang" > wrote: > > > Since different memory devices require finding, allocating, and putting > > memory

[PATCH v9 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

2024-03-28 Thread Ho-Ren (Jack) Chuang
Since different memory devices require finding, allocating, and putting memory types, these common steps are abstracted in this patch, enhancing the scalability and conciseness of the code. Signed-off-by: Ho-Ren (Jack) Chuang Reviewed-by: "Huang, Ying" --- drivers/dax/kmem.c

[PATCH v9 0/2] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-28 Thread Ho-Ren (Jack) Chuang
997111-1-horenchu...@bytedance.com/T/#u -v1: * https://lore.kernel.org/lkml/20240301082248.3456086-1-horenchu...@bytedance.com/T/#u Ho-Ren (Jack) Chuang (2): memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types memory tier: create CPUless memory tiers aft

[PATCH v9 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-28 Thread Ho-Ren (Jack) Chuang
to be managed, a default memory type is created for storing all memory types that are not initialized by device drivers and as a fallback. Signed-off-by: Ho-Ren (Jack) Chuang Signed-off-by: Hao Xiang Reviewed-by: "Huang, Ying" --- mm/memory-ti

Re: [External] Re: [PATCH v8 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-28 Thread Ho-Ren (Jack) Chuang
On Thu, Mar 28, 2024 at 5:59 PM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > > The current implementation treats emulated memory devices, such as > > CXL1.1 type3 memory, as normal DRAM when they are emulated as normal memory > > (E820_TYPE_RAM).

[PATCH v8 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-28 Thread Ho-Ren (Jack) Chuang
to be managed, a default memory type is created for storing all memory types that are not initialized by device drivers and as a fallback. Signed-off-by: Ho-Ren (Jack) Chuang Signed-off-by: Hao Xiang Reviewed-by: "Huang, Ying" --- mm/memory-ti

[PATCH v8 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

2024-03-28 Thread Ho-Ren (Jack) Chuang
Since different memory devices require finding, allocating, and putting memory types, these common steps are abstracted in this patch, enhancing the scalability and conciseness of the code. Signed-off-by: Ho-Ren (Jack) Chuang Reviewed-by: "Huang, Ying" --- drivers/dax/kmem.c

[PATCH v8 0/2] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-28 Thread Ho-Ren (Jack) Chuang
ted way to use set_node_memory_tier instead of modifying it * https://lore.kernel.org/lkml/20240312061729.1997111-1-horenchu...@bytedance.com/T/#u -v1: * https://lore.kernel.org/lkml/20240301082248.3456086-1-horenchu...@bytedance.com/T/#u Ho-Ren (Jack) Chuang (2): memory tier: dax/kmem: in

[PATCH v7 0/2] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-28 Thread Ho-Ren (Jack) Chuang
ry_tier instead of modifying it * https://lore.kernel.org/lkml/20240312061729.1997111-1-horenchu...@bytedance.com/T/#u -v1: * https://lore.kernel.org/lkml/20240301082248.3456086-1-horenchu...@bytedance.com/T/#u Ho-Ren (Jack) Chuang (2): memory tier: dax/kmem: introduce an abstract layer for

Re: [External] Re: [PATCH v6 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-28 Thread Ho-Ren (Jack) Chuang
On Wed, Mar 27, 2024 at 6:37 PM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > [snip] > > > @@ -655,6 +672,34 @@ void mt_put_memory_types(struct list_head > > *memory_types) > > } > > EXPORT_SYMBOL_GPL(mt_put_memory_types); >

[PATCH v6 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

2024-03-27 Thread Ho-Ren (Jack) Chuang
Since different memory devices require finding, allocating, and putting memory types, these common steps are abstracted in this patch, enhancing the scalability and conciseness of the code. Signed-off-by: Ho-Ren (Jack) Chuang --- drivers/dax/kmem.c | 20 ++-- include

[PATCH v6 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-27 Thread Ho-Ren (Jack) Chuang
to be managed, a default memory type is created for storing all memory types that are not initialized by device drivers and as a fallback. Signed-off-by: Ho-Ren (Jack) Chuang Signed-off-by: Hao Xiang --- mm/memory-tiers.c | 94 +++ 1 file changed, 78

[PATCH v6 0/2] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-27 Thread Ho-Ren (Jack) Chuang
/#u -v1: * https://lore.kernel.org/lkml/20240301082248.3456086-1-horenchu...@bytedance.com/T/#u Ho-Ren (Jack) Chuang (2): memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types memory tier: create CPUless memory tiers after obtaining HMAT info driv

Re: [External] Re: [PATCH v5 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-27 Thread Ho-Ren (Jack) Chuang
On Tue, Mar 26, 2024 at 10:52 PM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > > The current implementation treats emulated memory devices, such as > > CXL1.1 type3 memory, as normal DRAM when they are emulated as normal memory > > (E820_TYPE_

[PATCH v5 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

2024-03-26 Thread Ho-Ren (Jack) Chuang
Since different memory devices require finding, allocating, and putting memory types, these common steps are abstracted in this patch, enhancing the scalability and conciseness of the code. Signed-off-by: Ho-Ren (Jack) Chuang --- drivers/dax/kmem.c | 20 ++-- include

[PATCH v5 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-26 Thread Ho-Ren (Jack) Chuang
` Because an error path was not handled properly in `mt_perf_to_adistance`, unlock before returning the error. Signed-off-by: Ho-Ren (Jack) Chuang Signed-off-by: Hao Xiang --- mm/memory-tiers.c | 85 +++ 1 file changed, 72 insertions(+), 13 deletions

[PATCH v5 0/2] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-26 Thread Ho-Ren (Jack) Chuang
nel.org/lkml/20240312061729.1997111-1-horenchu...@bytedance.com/T/#u -v1: * https://lore.kernel.org/lkml/20240301082248.3456086-1-horenchu...@bytedance.com/T/#u Ho-Ren (Jack) Chuang (2): memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

Re: [External] Re: [PATCH v4 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-26 Thread Ho-Ren (Jack) Chuang
On Mon, Mar 25, 2024 at 8:08 PM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > > On Fri, Mar 22, 2024 at 1:41 AM Huang, Ying wrote: > >> > >> "Ho-Ren (Jack) Chuang" writes: > >> > >> > The current impleme

Re: [External] Re: [PATCH v4 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-22 Thread Ho-Ren (Jack) Chuang
On Fri, Mar 22, 2024 at 1:41 AM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > > The current implementation treats emulated memory devices, such as > > CXL1.1 type3 memory, as normal DRAM when they are emulated as normal memory > > (E820_TYPE_RAM).

[PATCH v4 0/2] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-22 Thread Ho-Ren (Jack) Chuang
97111-1-horenchu...@bytedance.com/T/#u -v1: * https://lore.kernel.org/lkml/20240301082248.3456086-1-horenchu...@bytedance.com/T/#u Ho-Ren (Jack) Chuang (2): memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types memory tier: create CPUless memor

[PATCH v4 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-22 Thread Ho-Ren (Jack) Chuang
to be managed, a default memory type is created for storing all memory types that are not initialized by device drivers and as a fallback. Signed-off-by: Ho-Ren (Jack) Chuang Signed-off-by: Hao Xiang --- mm/memory-tiers.c | 73 --- 1 file changed, 63

[PATCH v4 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

2024-03-22 Thread Ho-Ren (Jack) Chuang
Since different memory devices require finding, allocating, and putting memory types, these common steps are abstracted in this patch, enhancing the scalability and conciseness of the code. Signed-off-by: Ho-Ren (Jack) Chuang --- drivers/dax/kmem.c | 20 ++-- include

Re: [External] Re: [PATCH v3 1/2] memory tier: dax/kmem: create CPUless memory tiers after obtaining HMAT info

2024-03-20 Thread Ho-Ren (Jack) Chuang
On Wed, Mar 20, 2024 at 12:15 AM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > > The current implementation treats emulated memory devices, such as > > CXL1.1 type3 memory, as normal DRAM when they are emulated as normal memory > > (E820_TYPE_

[PATCH v3 1/2] memory tier: dax/kmem: create CPUless memory tiers after obtaining HMAT info

2024-03-20 Thread Ho-Ren (Jack) Chuang
type is created for storing all memory types that are not initialized by device drivers and as a fallback. Signed-off-by: Ho-Ren (Jack) Chuang Signed-off-by: Hao Xiang --- drivers/dax/kmem.c | 13 + include/linux/memory-tiers.h | 7 +++ mm/memory-tiers.c| 94

[PATCH v3 2/2] memory tier: dax/kmem: abstract memory types put

2024-03-20 Thread Ho-Ren (Jack) Chuang
Abstract `kmem_put_memory_types()` into `mt_put_memory_types()` to accommodate various memory types and enhance flexibility, similar to `mt_find_alloc_memory_type()`. Signed-off-by: Ho-Ren (Jack) Chuang --- drivers/dax/kmem.c | 7 +-- include/linux/memory-tiers.h | 6 ++ mm

[PATCH v3 0/2] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-20 Thread Ho-Ren (Jack) Chuang
xpected way to use set_node_memory_tier instead of modifying it * https://lore.kernel.org/lkml/20240312061729.1997111-1-horenchu...@bytedance.com/T/#u -v1: * https://lore.kernel.org/lkml/20240301082248.3456086-1-horenchu...@bytedance.com/T/#u Ho-Ren (Jack) Chuang (2): memory tier: dax/kmem:

Re: [External] Re: [PATCH v2 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

2024-03-18 Thread Ho-Ren (Jack) Chuang
I'm working on V3. Thanks for Ying's feedback. cc: sthanne...@micron.com On Thu, Mar 14, 2024 at 12:54 AM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > > On Tue, Mar 12, 2024 at 2:21 AM Huang, Ying wrote: > >> > >> "Ho-Ren

Re: [External] Re: [PATCH v2 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

2024-03-13 Thread Ho-Ren (Jack) Chuang
On Tue, Mar 12, 2024 at 2:21 AM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > > The current implementation treats emulated memory devices, such as > > CXL1.1 type3 memory, as normal DRAM when they are emulated as normal memory > > (E820_TYPE_RAM).

[PATCH v2 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

2024-03-12 Thread Ho-Ren (Jack) Chuang
but also prevents holding a large lock simultaneously. Signed-off-by: Ho-Ren (Jack) Chuang Signed-off-by: Hao Xiang --- drivers/acpi/numa/hmat.c | 11 ++ drivers/dax/kmem.c | 13 +-- include/linux/acpi.h | 6 include/linux/memory-tiers.h | 8 + mm/memory

[PATCH v2 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-12 Thread Ho-Ren (Jack) Chuang
tead of modifying it -v1: * https://lore.kernel.org/linux-mm/20240301082248.3456086-1-horenchu...@bytedance.com/T/ Ho-Ren (Jack) Chuang (1): memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info drivers/acpi/numa/hmat.c | 11 ++ drivers/dax/kmem.c

Re: [External] Re: [PATCH v1 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

2024-03-05 Thread Ho-Ren (Jack) Chuang
On Tue, Mar 5, 2024 at 6:27 PM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > > On Sun, Mar 3, 2024 at 6:42 PM Huang, Ying wrote: > >> > >> Hi, Jack, > >> > >> "Ho-Ren (Jack) Chuang" writes: > >> >

Re: [External] Re: [PATCH v1 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

2024-03-05 Thread Ho-Ren (Jack) Chuang
On Sun, Mar 3, 2024 at 6:42 PM Huang, Ying wrote: > > Hi, Jack, > > "Ho-Ren (Jack) Chuang" writes: > > > * Introduce `mt_init_with_hmat()` > > We defer memory tier initialization for those CPUless NUMA nodes > > until acquiring HMAT info. `mt_init_wi

Re: [External] Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-04 Thread Ho-Ren (Jack) Chuang
On Mon, Mar 4, 2024 at 10:36 PM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > > On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying wrote: > >> > >> "Ho-Ren (Jack) Chuang" writes: > >> > >> > The memory tiering com

Re: [External] Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-04 Thread Ho-Ren (Jack) Chuang
On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > > The memory tiering component in the kernel is functionally useless for > > CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes > > are lumped

Re: [External] Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-04 Thread Ho-Ren (Jack) Chuang
On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying wrote: > > "Ho-Ren (Jack) Chuang" writes: > > > The memory tiering component in the kernel is functionally useless for > > CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes > > are lumped

[PATCH v1 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

2024-03-01 Thread Ho-Ren (Jack) Chuang
holding a large lock simultaneously. Signed-off-by: Ho-Ren (Jack) Chuang Signed-off-by: Hao Xiang --- drivers/acpi/numa/hmat.c | 3 ++ include/linux/memory-tiers.h | 6 +++ mm/memory-tiers.c| 76 3 files changed, 77 insertions(+), 8 deletions

[PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-01 Thread Ho-Ren (Jack) Chuang
the correct memory tiering for the memory nodes. Ho-Ren (Jack) Chuang (1): memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info drivers/acpi/numa/hmat.c | 3 ++ include/linux/memory-tiers.h | 6 +++ mm/memory-tiers.c| 76

[QEMU-devel][RFC PATCH 1/1] backends/hostmem: qapi/qom: Add an ObjectOption for memory-backend-* called HostMemType and its arg 'cxlram'

2023-12-31 Thread Ho-Ren (Jack) Chuang
\ -M cxl-fmw.0.targets.0=cxl.1,cxl-fmw.0.size=19G,cxl-fmw.0.interleave-granularity=8k \ In v1, we plan to move most of the implementations to util and break down this patch into different smaller patches. Signed-off-by: Ho-Ren (Jack) Chuang Signed-off-by: Hao Xiang --- backends/hostmem.c