On Sun, Sep 26, 2010 at 02:46:51PM +0200, Michael S. Tsirkin wrote:
+static inline void pcie_aer_errmsg(PCIDevice *dev, const
PCIE_AERErrMsg *msg)
+{
+assert(pci_is_express(dev));
+assert(dev-exp.aer_errmsg);
+dev-exp.aer_errmsg(dev, msg);
Why do we want
On Sun, Sep 26, 2010 at 02:50:42PM +0200, Michael S. Tsirkin wrote:
On Fri, Sep 24, 2010 at 02:38:09PM +0900, Isaku Yamahata wrote:
On Wed, Sep 22, 2010 at 01:25:59PM +0200, Michael S. Tsirkin wrote:
+PCIESlot *pcie_root_init(PCIBus *bus, int devfn, bool multifunction
On Sun, Sep 26, 2010 at 02:49:40PM +0200, Michael S. Tsirkin wrote:
On Fri, Sep 24, 2010 at 02:38:09PM +0900, Isaku Yamahata wrote:
On Wed, Sep 22, 2010 at 01:25:59PM +0200, Michael S. Tsirkin wrote:
+PCIESlot *pcie_root_init(PCIBus *bus, int devfn, bool multifunction
On Mon, Sep 27, 2010 at 12:40:12PM +0200, Michael S. Tsirkin wrote:
On Mon, Sep 27, 2010 at 03:22:43PM +0900, Isaku Yamahata wrote:
On Sun, Sep 26, 2010 at 02:50:42PM +0200, Michael S. Tsirkin wrote:
On Fri, Sep 24, 2010 at 02:38:09PM +0900, Isaku Yamahata wrote:
On Wed, Sep 22, 2010
On Sun, Sep 19, 2010 at 01:45:33PM +0200, Michael S. Tsirkin wrote:
On Sun, Sep 19, 2010 at 01:56:23PM +0900, Isaku Yamahata wrote:
On Wed, Sep 15, 2010 at 02:43:10PM +0200, Michael S. Tsirkin wrote:
+/***
+ * pci
On Wed, Sep 22, 2010 at 01:50:16PM +0200, Michael S. Tsirkin wrote:
+}
+
+/* capability control */
+if (ranges_overlap(addr, len, pos + PCI_ERR_CAP, 4)) {
+uint32_t err_cap = pci_get_long(dev-config + pos + PCI_ERR_CAP);
+if (!(err_cap PCI_ERR_CAP_MHRE))
On Fri, Sep 17, 2010 at 12:14:59PM +0100, anthony.per...@citrix.com wrote:
+static int xen_platform_initfn(PCIDevice *dev)
+{
+PCIXenPlatformState *d = DO_UPCAST(PCIXenPlatformState, pci_dev, dev);
+uint8_t *pci_conf;
+
+pci_conf = d-pci_dev.config;
+
+
On Fri, Sep 17, 2010 at 12:15:00PM +0100, anthony.per...@citrix.com wrote:
From: Anthony PERARD anthony.per...@citrix.com
This patch introduces Xen specific call in piix_pci.
The specific part for Xen is in write_config, set_irq and get_pirq.
Signed-off-by: Anthony PERARD
On Wed, Sep 22, 2010 at 01:25:59PM +0200, Michael S. Tsirkin wrote:
+PCIESlot *pcie_root_init(PCIBus *bus, int devfn, bool multifunction,
+ const char *bus_name, pci_map_irq_fn map_irq,
+ uint8_t port, uint8_t chassis, uint16_t slot);
+
I
On Fri, Sep 17, 2010 at 12:14:59PM +0100, anthony.per...@citrix.com wrote:
+static uint32_t platform_mmio_read(void *opaque, target_phys_addr_t addr)
+{
+static int warnings = 0;
+
+if (warnings 5) {
+DPRINTF(Warning: attempted read from physical address
+
On Wed, Sep 15, 2010 at 03:05:13PM +0200, Michael S. Tsirkin wrote:
On Wed, Sep 15, 2010 at 02:50:01PM +0900, Isaku Yamahata wrote:
On Wed, Sep 08, 2010 at 01:31:22PM +0300, Michael S. Tsirkin wrote:
+
+static void pcie_notify(PCIDevice *dev, uint16_t vector
On Wed, Sep 15, 2010 at 02:49:50PM +0200, Michael S. Tsirkin wrote:
On Wed, Sep 15, 2010 at 02:38:16PM +0900, Isaku Yamahata wrote:
introduce helper function pci_shift_{word, long}() which returns
returns shifted word/long of given position and range.
They will be used later.
Signed
On Wed, Sep 15, 2010 at 02:43:10PM +0200, Michael S. Tsirkin wrote:
+/***
+ * pci express capability helper functions
+ */
+void pcie_notify(PCIDevice *dev, uint16_t vector, bool trigger, int level)
Why is this not
This patch implements helper functions for pci express capability
and pci express extended capability allocation.
NOTE: presence detection depends on pci_qdev_init() change.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v2 - v3:
- don't use 0b gcc extension. use 0x instead
This patch implements helper functions for pcie aer capability
which will be used later.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v2 - v3:
- split out from pcie.[ch] to pcie_aer.[ch] to make the files sorter.
- embeded PCIExpressDevice into PCIDevice.
- CodingStyle fix
On Wed, Sep 08, 2010 at 01:31:22PM +0300, Michael S. Tsirkin wrote:
+
+static void pcie_notify(PCIDevice *dev, uint16_t vector,
+bool trigger, int level)
+{
+/* masking/masking interrupt is handled by upper layer.
+ * i.e. msix_notify() for MSI-X
+
On Wed, Sep 08, 2010 at 01:31:22PM +0300, Michael S. Tsirkin wrote:
+/*
+ * RW1C: Write-1-to-clear
+ * regiger written valresult
+ * 00 = 0
+ * 10 = 1
+ * 01 = 0
+ * 11
introduce helper function pci_shift_{word, long}() which returns
returns shifted word/long of given position and range.
They will be used later.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.h | 19 +++
1 files changed, 19 insertions(+), 0 deletions(-)
diff
pcie switch downstream port.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v2 - v3:
- compilation adjustment.
---
Makefile.objs|1 +
hw/pcie_downstream.c | 218 ++
hw/pcie_downstream.h | 33
3 files
glue aer error injection into qemu monitor.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v2 - v3:
- compilation adjustment.
---
hw/pcie_aer.c | 85 +++
qemu-monitor.hx | 22 ++
sysemu.h|5 +++
3
.) and helper functions for it.
helper functions for chassis, slot - PCIESlot conversion.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v2 - v3:
- static'fy chassis.
- compilation adjustment.
---
Makefile.objs |2 +-
hw/pcie_port.c | 106
add pcie constants to pcie_regs.h.
Those constants should go to Linux pci_regs.h and then the file should
go away eventually.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v2 - v3:
- moved out pcie constants from pcie.c to pcie_regs.h.
- removed unused macros
---
hw
pci express switch upstream port.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v2 - v3:
- compilation adjustment.
---
Makefile.objs |2 +-
hw/pcie_upstream.c | 200
hw/pcie_upstream.h | 32
3 files
glue to pcie_abp monitor command.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pcie_port.c | 82 +++
qemu-monitor.hx | 14 +
sysemu.h|4 +++
3 files changed, 100 insertions(+), 0 deletions(-)
diff --git
Implement RW1C register framework.
With this patch, it would be easy to implement
W1C(Write 1 to Clear) register by just setting w1cmask.
Later RW1C register will be used by pcie.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |5 +
hw/pci.h |3 +++
2 files changed
clear not only INTA, but all INTx when MSI-X is enabled.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/msix.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/hw/msix.c b/hw/msix.c
index 7ce63eb..b202ff7 100644
--- a/hw/msix.c
+++ b/hw/msix.c
@@ -158,6
pcie root port.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v2 - v3:
- compilation adjustment.
---
Makefile.objs |2 +-
hw/pcie_root.c | 240
hw/pcie_root.h | 32
3 files changed, 273 insertions(+), 1
implemented msi support functions.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v2 - v3:
- improved comment wording.
- simplified shift/ffs dance.
Changes v1 - v2:
- opencode some oneline helper function/macros for readability
- use ffs where appropriate
- rename some
shift/ffs dance
- pci w1c config register framework
- split pcie.[ch] into pcie_regs.h, pcie.[ch] and pcie_aer.[ch]
- pcie, aer: many changes by following reviews.
changes v1 - v2:
- update msi
- dropped already pushed out patches.
- added msix patches.
Isaku Yamahata (13):
msi: implemented msi
overflow checking that you
wrote which isn't merged with the seabios git source I downloaded from you.
I'm
assuming this is not the one you're talking about correct?
━
From: Isaku Yamahata [mailto:yamah...@valinux.co.jp]
To: Adnan Khaleel
.
Isaku Yamahata (9):
msi: implemented msi.
pcie: helper functions for pcie extended capability.
pcie port: define struct PCIEPort/PCIESlot and helper functions
pcie root port: implement pcie root port.
pcie upstream port: pci express switch upstream port.
pcie downstream port: pci
glue aer error injection into qemu monitor.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Conflicts:
hw/pcie.c
---
hw/pcie.c | 85 +++
qemu-monitor.hx | 22 ++
sysemu.h|5 +++
3 files changed
.) and helper functions for it.
helper functions for chassis, slot - PCIESlot conversion.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Makefile.objs |2 +-
hw/pcie_port.c | 106
hw/pcie_port.h | 51 +++
qemu
pci express switch upstream port.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Makefile.objs |2 +-
hw/pcie_upstream.c | 207
hw/pcie_upstream.h | 32
3 files changed, 240 insertions(+), 1 deletions(-)
create
clear not only INTA, but all INTx when MSI-X is enabled.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/msix.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/hw/msix.c b/hw/msix.c
index 7ce63eb..b202ff7 100644
--- a/hw/msix.c
+++ b/hw/msix.c
@@ -158,6
implemented msi support functions.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v1 - v2:
- opencode some oneline helper function/macros for readability
- use ffs where appropriate
- rename some functions/variables as suggested.
- added assert()
- 1 - 1U
- clear INTx# when MSI
Thank you for through review.
On Mon, Sep 06, 2010 at 12:44:16PM +0300, Michael S. Tsirkin wrote:
+uint32_t pending =
+pci_get_long(dev-config + msi_pending_reg(dev, is64bit));
+uint8_t vector;
+
+/* deliver pending interrupts which are unmasked */
pcie switch downstream port.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Makefile.objs|1 +
hw/pcie_downstream.c | 225 ++
hw/pcie_downstream.h | 33
3 files changed, 259 insertions(+), 0 deletions(-)
create
glue to pcie_abp monitor command.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pcie_port.c | 82 +++
qemu-monitor.hx | 14 +
sysemu.h|4 +++
3 files changed, 100 insertions(+), 0 deletions(-)
diff --git
On Wed, Sep 08, 2010 at 12:13:44PM +0300, Michael S. Tsirkin wrote:
On Wed, Sep 08, 2010 at 04:39:34PM +0900, Isaku Yamahata wrote:
implemented msi support functions.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Good stuff. Some minor corrections mostly to the comments.
It's up
This patch set cleans up pci_register_bar() a bit.
Isaku Yamahata (3):
pci: sorting out type confusion in pci_register_bar().
pci: don't ignore invalid parameter for pci_register_bar().
pci: improve signature of pci_register_bar().
hw/pci.c | 11 +--
hw/pci.h |2 +-
2 files
Abort when invalid value for region_num is passed to pci_register_bar.
That is caller's bug. Abort instead of silently ignoring invalid value.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/pci.c b
Make type uint8_t from int because PCIIORegion::type is uint8_t.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |2 +-
hw/pci.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index 31eba9a..ceee291 100644
--- a/hw/pci.c
+++ b
where
necessary.
Maybe for strict type safety conversion functions would
be desirable. Something like pcibus_to_uintN(), uintN_to_pcibus().
But conversions are done only a few place, so it wouldn't be
worthwhile.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |4 ++--
1
On Wed, Sep 08, 2010 at 01:34:23PM +0300, Michael S. Tsirkin wrote:
On Wed, Sep 08, 2010 at 04:39:40PM +0900, Isaku Yamahata wrote:
glue to pcie_abp monitor command.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
We also need to glue the LED so it's status both is reported
that
enabled pci bus reset will be sent.
- vid/did
there are arbitrariness for pcie port switch. I just choose
Intel and IT one to model them.
thanks,
Isaku Yamahata (14):
RESEND apb: fix typo.
pci: consolidate pci_add_capability_at_offset() into
pci_add_capability().
pci bridge: add
fix typo.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/apb_pci.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index 10a5baa..c619112 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -362,7 +362,7 @@ PCIBus *pci_apb_init
add vendor id of Texus Intesruments.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci_ids.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/hw/pci_ids.h b/hw/pci_ids.h
index 39e9f1d..82cba7e 100644
--- a/hw/pci_ids.h
+++ b/hw/pci_ids.h
@@ -57,6 +57,8
glue aer error injection into qemu monitor.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Conflicts:
hw/pcie.c
---
hw/pcie.c | 85 +++
qemu-monitor.hx | 22 ++
sysemu.h|5 +++
3 files changed
call hotplug callback even when not hotplug case for later use.
And move hotplug check into hotplug callback.
PCIE slot needs this for card presence detection.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/acpi_piix4.c |3 +++
hw/pci.c|3 ++-
2 files changed, 5
By making pci_add_capability() the special case of
pci_add_capability_at_offset() of offset = 0,
consolidate pci_add_capability_at_offset() into pci_add_capability().
Cc: Stefan Weil w...@mail.berlios.de
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
helper function to add ssvid capability.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci_bridge.c | 19 +++
hw/pci_bridge.h |3 +++
2 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/hw/pci_bridge.c b/hw/pci_bridge.c
index 198c3c7..638e3b3
make pci_parse_devfn() aware of func. With func = NULL it behave as before.
This will be used later.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c | 34 ++
hw/pci.h |2 ++
2 files changed, 28 insertions(+), 8 deletions(-)
diff --git a/hw
pci express switch upstream port.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Makefile.objs |2 +-
hw/pcie_upstream.c | 206
hw/pcie_upstream.h | 32
3 files changed, 239 insertions(+), 1 deletions(-)
create
implemented msi support functions.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Makefile.objs |2 +-
hw/msi.c | 362 +
hw/msi.h | 41 +++
hw/pci.h |5 +
4 files changed, 409 insertions(+), 1
glue to pcie_abp monitor command.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pcie_port.c | 82 +++
qemu-monitor.hx | 14 +
sysemu.h|4 +++
3 files changed, 100 insertions(+), 0 deletions(-)
diff --git
pcie switch downstream port.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Makefile.objs|1 +
hw/pcie_downstream.c | 224 ++
hw/pcie_downstream.h | 33
3 files changed, 258 insertions(+), 0 deletions(-)
create
.) and helper functions for it.
helper functions for chassis, slot - PCIESlot conversion.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Makefile.objs |2 +-
hw/pcie_port.c | 106
hw/pcie_port.h | 51 +++
qemu
On Sun, Sep 05, 2010 at 08:09:18PM -0700, Adhyas Avasthi wrote:
Hi Isaku
I believe you were working on the Q35 chipset and PCIe emulation for
the same, and planned to check your code in to the main git. I can use
some of that work for something I am working on.
I have not been too active on
On Mon, Sep 06, 2010 at 10:55:19PM +0300, Michael S. Tsirkin wrote:
On Mon, Sep 06, 2010 at 05:54:25PM +, Blue Swirl wrote:
On Mon, Sep 6, 2010 at 9:46 AM, Michael S. Tsirkin m...@redhat.com wrote:
On Mon, Sep 06, 2010 at 04:46:15PM +0900, Isaku Yamahata wrote:
fix typo.
Signed
implement secondary bus reset.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c | 13 -
1 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index e23ac1b..183f595 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1626,6 +1626,9 @@ static void
make pci reset use qdev reset frame work.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c | 38 ++
hw/pci.h |2 ++
2 files changed, 36 insertions(+), 4 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index 655fead..4c99390 100644
teach pci devices that have reset callback how to reset common registers.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/e1000.c |1 +
hw/lsi53c895a.c |2 ++
hw/pci.c|6 --
hw/pcnet.c |1 +
hw/rtl8139.c|2 ++
hw/virtio-pci.c |1 +
6
of busfn, qbus_find_child_bus(), isn't affected by this.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/qdev-core.h |2 ++
hw/qdev.c | 51 ++-
2 files changed, 32 insertions(+), 21 deletions(-)
diff --git a/hw/qdev-core.h b/hw/qdev
On Thu, Sep 02, 2010 at 12:42:42PM -0500, Adnan Khaleel wrote:
I've tried everything you mentioned and I still get the same problem. The only
thing that seems to avoid that issue is if I reduce the aperture size from
0x20ull to 0x200ull.
I suppose that Cam is seeing the same issue.
Given the usage of 3/4, u32 pci_find_capability(bdf, cap) would be more direct.
Maybe this is a matter of taste, though.
On Sat, Aug 28, 2010 at 06:02:56PM +0300, Eduard - Gabriel Munteanu wrote:
This iterates over capabilities exposed by PCI devices. It's needed by
IOMMU initialization code
How about the following approach?
Although I'm not sure how much multiple iommus is wanted,
it wouldn't pose single iommu limit and global variables in 3/4
would be unnecessary.
In stead of ACPI_INIT_TABLE(build_ivrs()),
something like
foreachpci() {
if (class ==
I think those global variables are unnecessary.
Please see the comment on 4/4.
thanks,
On Sat, Aug 28, 2010 at 06:02:57PM +0300, Eduard - Gabriel Munteanu wrote:
The AMD IOMMU must be discovered and initialized by the BIOS if present.
Signed-off-by: Eduard - Gabriel Munteanu
) {
return rc;
}
PRINT_DEBUG(%s: Init done\n, __FUNCTION__);
return 0;
}
Thanks
AK
━
From: Cam Macdonell [mailto:c...@cs.ualberta.ca]
To: ad...@khaleel.us
Cc: Isaku Yamahata [mailto:yamah...@valinux.co.jp], qemu-devel
and shouldn't be.
If the direction is okay, The next step would be a patch(set) for qdev which
would introduce qdev_cold_reset(), qdev_warm_reset(),
DeviceInfo::cold_reset and DeviceInfo::warm_reset
and would obsolete qdev_reset() and DeviceInfo::reset.
Isaku Yamahata (5):
sysemu.h, vl.c: static'fy
don't repeat same logic in qemu_system_xxx_request() logic.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
vl.c | 25 -
1 files changed, 16 insertions(+), 9 deletions(-)
diff --git a/vl.c b/vl.c
index aba3786..2a89f4f 100644
--- a/vl.c
+++ b/vl.c
@@ -1195,26
Make qemu_xxx_requested() helper function static
because they aren't used outside from vl.c.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
sysemu.h |4
vl.c |8
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/sysemu.h b/sysemu.h
index a1f6466
factor out qemu_reguster/unregister_reset() for later use.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
vl.c | 34 ++
1 files changed, 26 insertions(+), 8 deletions(-)
diff --git a/vl.c b/vl.c
index 2a89f4f..a919a32 100644
--- a/vl.c
+++ b/vl.c
Distinguish warm reset from cold reset by introducing
cold/warm reset helper function instead of single reset routines.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/hw.h |7 +
sysemu.h |4 +++
vl.c | 89
Don't repeat same logic in qemu_xxx_requested().
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
vl.c | 27 ---
1 files changed, 12 insertions(+), 15 deletions(-)
diff --git a/vl.c b/vl.c
index a77a171..aba3786 100644
--- a/vl.c
+++ b/vl.c
@@ -1129,39 +1129,36
On Mon, Aug 30, 2010 at 10:59:19AM +0300, Avi Kivity wrote:
On 08/30/2010 10:49 AM, Isaku Yamahata wrote:
This patch set distinguish warm reset from cold reset by
introducing warm reset callback handler.
The first 4 patches are trivial clean up patches. The last patch of 5/5
is RFC patch
Thank you for comments.
On Mon, Aug 30, 2010 at 10:50:47AM +0200, Paolo Bonzini wrote:
On 08/30/2010 09:49 AM, Isaku Yamahata wrote:
+/* those two functions are obsoleted by cold/warm reset API. */
[qemu_register_reset/qemu_unregister_reset]
Are they?
They have a _lot_ of callers and most
On Mon, Aug 30, 2010 at 07:59:22AM -0500, Anthony Liguori wrote:
On 08/30/2010 02:49 AM, Isaku Yamahata wrote:
Distinguish warm reset from cold reset by introducing
cold/warm reset helper function instead of single reset routines.
Signed-off-by: Isaku Yamahatayamah...@valinux.co.jp
---
hw
old_addr is initialized, but not used.
remove the useless variable.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
src/pciinit.c |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/src/pciinit.c b/src/pciinit.c
index f75e552..0346423 100644
--- a/src/pciinit.c
On Fri, Aug 27, 2010 at 01:35:23PM -0600, Cam Macdonell wrote:
In upstream seabios.git, the c040 is not written, but the device
returns from 0x1c (only reads and writes to 0x18 and 0x1c are
shown below)
pci_read_config: (val) 0x4 - 0x18 (addr)
pci_write_config: (val) 0x -
On Sat, Aug 28, 2010 at 05:54:54PM +0300, Eduard - Gabriel Munteanu wrote:
diff --git a/hw/pc.c b/hw/pc.c
index a96187f..e2456b0 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -1068,6 +1068,8 @@ void pc_pci_device_init(PCIBus *pci_bus)
int max_bus;
int bus;
+
On Thu, Aug 26, 2010 at 01:17:38PM -0500, Adnan Khaleel wrote:
You also want to catch up pci api clean up.
pci_{set, get}_{byte, word, long, quad}(),
pci_config_set_vendor() ...
Are you referring to the setting up of the config registers where we pass on
the vendor id and device
On Wed, Aug 25, 2010 at 11:49:19AM -0500, Anthony Liguori wrote:
On 08/25/2010 10:17 AM, Isaku Yamahata wrote:
On Wed, Aug 25, 2010 at 07:55:27AM -0500, Anthony Liguori wrote:
Maybe we can merge the patches.
As for your patch, I have some comment.
- bus itself may want its own handler
like to
achieve in your environment.
━
From: Isaku Yamahata [mailto:yamah...@valinux.co.jp]
To: Adnan Khaleel [mailto:ad...@khaleel.us]
Cc: qemu-devel@nongnu.org
Sent: Wed, 18 Aug 2010 22:19:04 -0500
Subject: Re: [Qemu-devel
I added CC for those who might be interested in this discussion.
On Thu, Aug 26, 2010 at 08:02:38AM -0500, Anthony Liguori wrote:
On 08/26/2010 03:38 AM, Isaku Yamahata wrote:
I think that starts by understanding exactly what's guaranteed and
understanding what the use cases
On Wed, Aug 25, 2010 at 07:55:27AM -0500, Anthony Liguori wrote:
Maybe we can merge the patches.
As for your patch, I have some comment.
- bus itself may want its own handler. At lease pci bus needs it.
And propagating reset signal to children is up to the bus controller.
I disagree.
Add Cc: m...@redhat.com.
MAX_PCI_SLOTS should be in pci.h instead of qdev.h?
And the name should be start with PCI_ prefix for consistency?
Except that, the patches look okay.
thanks,
On Tue, Aug 24, 2010 at 02:49:27PM +0800, Ken CC wrote:
Define MAX_PCI_SLOTS as 0x1f, if pci addr provided
On Tue, Aug 24, 2010 at 02:42:18PM +0300, Avi Kivity wrote:
On 08/24/2010 02:35 PM, Isaku Yamahata wrote:
Add Cc: m...@redhat.com.
MAX_PCI_SLOTS should be in pci.h instead of qdev.h?
And the name should be start with PCI_ prefix for consistency?
Except that, the patches look okay
On Tue, Aug 24, 2010 at 03:04:44PM +0300, Avi Kivity wrote:
On 08/24/2010 03:07 PM, Isaku Yamahata wrote:
On Tue, Aug 24, 2010 at 02:42:18PM +0300, Avi Kivity wrote:
On 08/24/2010 02:35 PM, Isaku Yamahata wrote:
Add Cc: m...@redhat.com.
MAX_PCI_SLOTS should be in pci.h instead of qdev.h
On Tue, Aug 24, 2010 at 10:52:36AM -0600, Cam Macdonell wrote:
Hi, 64-bit BARs still do not seem to be working.
When using the latest seabios the guest does not hit a BUG:
statement, but booting still fails
HPET: 1 timers in total, 0 timers will be used for per-cpu timer
divide error:
On Fri, Aug 20, 2010 at 10:56:57AM -0500, Anthony Liguori wrote:
The real problem is how we do reset. We shouldn't register a reset
handler for every qdev device but rather register a single reset handler
that walks the device tree and calls reset on every reachable device.
Then we can
How did you trigger the bug?
I suppose parse_pci_devfn() in qdev-properties should check the error.
Although I'm not objecting this patch itself, it's caller's bug.
Just assert(devfn PCIBUS_MAX_DEVICES)?
On Mon, Aug 23, 2010 at 01:56:31PM +0800, Ken CC wrote:
Check before trying subindexing.
On Tue, Aug 24, 2010 at 09:43:25AM +0800, Ken CC wrote:
On Mon, Aug 23, 2010 at 06:56:56PM +0900, Isaku Yamahata wrote:
How did you trigger the bug?
I suppose parse_pci_devfn() in qdev-properties should check the error.
Although I'm not objecting this patch itself, it's caller's bug
ping.
On Thu, Jul 29, 2010 at 06:08:42PM +0900, Isaku Yamahata wrote:
acpi table file can be modified during load so file size check
should be more strict.
pointer calculation should be after qemu_realloc(). not before realloc().
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Ping.
On Wed, Aug 04, 2010 at 05:43:20PM +0900, Isaku Yamahata wrote:
https://bugs.launchpad.net/bugs/611646
reports that ./i386-softmmu/qemu -M isapc segfaults.
This patch fixes the segfault introduced by
f885f1eaa8711c06033ceb1599e3750fb37c306f
It's because i440fx_state in pc_init1
On Thu, Aug 19, 2010 at 12:01:40PM -0500, Adnan Khaleel wrote:
Hi Isaku, thank you very much for your very detailed response. I have a few
questions, see below.
Thanks again,
Adnan
Qemu doesn't support pcie at the moment.
Only partial patches have been merged, still more
, there is a requirement for bcc. Is that borland C compiler?
No. Most Linux destro has bcc package. Just you need to install it like
yum install bcc or something.
Thanks,
Thanks
Adnan
━
From: Isaku Yamahata [mailto:yamah...@valinux.co.jp
On Tue, Aug 17, 2010 at 08:08:23PM -0400, Kevin O'Connor wrote:
On Fri, Jul 30, 2010 at 11:51:58AM +0900, Isaku Yamahata wrote:
add mcfg table.
mcfg isn't populated at the moment. dev-q35 will use it later.
This patch slipped through the cracks - sorry.
This patch doesn't seem to do
On Wed, Aug 18, 2010 at 02:10:10PM -0500, Adnan Khaleel wrote:
Hello Qemu developers,
I'm interested in developing a device model that plugs into Qemu that is based
on a PCIe interface and uses MSI-X. My goal is to ultimately attach a GPU
simulator to this PCIe interface and use the entire
This function seems same to ranges_overlap().
Please use ranges_overlap().
On Sun, Aug 15, 2010 at 10:27:16PM +0300, Eduard - Gabriel Munteanu wrote:
This helper function allows map invalidation code to determine which
maps must be invalidated.
Signed-off-by: Eduard - Gabriel Munteanu
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