[Qemu-devel] [PATCH 1/1] AArch64: Fix single stepping of ERET instruction

ned-off-by: Jaroslaw Pelczar --- target/arm/translate-a64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 9017e30510..1bc12d93ca 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -11348,6 +11348,7 @@ s

[Qemu-devel] [PATCH 1/1] AArch64: Fix single stepping of ERET instruction

ned-off-by: Jaroslaw Pelczar --- target/arm/translate-a64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 9017e30510..1bc12d93ca 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -11348,6 +11348,7 @@ s

[Qemu-devel] [PATCH 1/1] tcg/tci: Remove unnecessary TODO() for INDEX_op_bswap16_i64

() (...)/qemu/tcg/tci.c:1049: tcg fatal error Aborted (core dumped) After investigation it turns out that TCG generates bswap16_i64 opcode, which looks fine in the implementation. Signed-off-by: Jaroslaw Pelczar --- tcg/tci.c | 1 - 1 file changed, 1 deletion(-) diff --git a/tcg/tci.c b/tcg/tci.c index

[Qemu-devel] [PATCH 1/1] tcg/tci: Remove unnecessary TODO() for INDEX_op_bswap16_i64

: tcg_qemu_tb_exec() (...)/qemu/tcg/tci.c:1049: tcg fatal error Aborted (core dumped) After investigation it turns out that TCG generates bswap16_i64 opcode, which looks fine in the implementation. Signed-off-by: Jaroslaw Pelczar --- tcg/tci.c | 1 - 1 file changed, 1 deletion(-) diff --git a

[Qemu-devel] target/arm: Fix abort on exception return from AArch64 to AArch32

e called which trigger access cpu->pc to fetch next opcode At this point cpu->pc will have EL3's PC value. Signed-off-by: Jaroslaw Pelczar --- target/arm/op_helper.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index 2a85666