ping:
http://patchwork.ozlabs.org/patch/204306/
Petar
From: Petar Jovanovic [petar.jovano...@rt-rk.com]
Sent: Thursday, December 06, 2012 8:30 PM
To: qemu-devel@nongnu.org
Cc: Jovanovic, Petar; aurel...@aurel32.net
Subject: [PATCH] target-mips: Fix
ping
http://patchwork.ozlabs.org/patch/204941/
Petar
From: Petar Jovanovic [petar.jovano...@rt-rk.com]
Sent: Monday, December 10, 2012 4:28 PM
To: qemu-devel@nongnu.org
Cc: Jovanovic, Petar; aurel...@aurel32.net
Subject: [PATCH] target-mips: Fix
;
}
Petar
p.s. +cc Aurelien J.
From: Dongxue Zhang [elta@gmail.com]
Sent: Wednesday, December 12, 2012 7:43 AM
To: Andreas Färber
Cc: Markus Armbruster; Jovanovic, Petar; qemu-devel@nongnu.org; 陳韋任;
r...@twiddle.net
Subject: Re: [Qemu-devel] [PATCH 2/3]
Make
lgtm, though I wish there was a test for this in repl_ph.c.
+ cc Aurelien J.
Petar
From: Dongxue Zhang [elta@gmail.com]
Sent: Tuesday, December 11, 2012 3:28 PM
To: qemu-devel@nongnu.org
Cc: che...@iis.sinica.edu.tw; Jovanovic, Petar; r...@twiddle.net
0002-Make-repl_ph-to-sign-extended-to-target_long.patch
0003-Fix-gen_HILO-to-make-it-adapt-each-arch-which-use-ac.patch
Can you send examples/tests for the issues that you fix?
It makes easier to review if you provide a simple example of a failing test.
Petar
) INSV patch on your branch
that creates an issue for you when you run 'git am'.
Petar
From: Johnson, Eric
Sent: Wednesday, December 05, 2012 10:36 PM
To: Jovanovic, Petar; qemu-devel@nongnu.org
Cc: blauwir...@gmail.com; rth7...@gmail.com; afaer...@suse.de
diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c
index e7949c2..f8a7a9f 100644
--- a/target-mips/dsp_helper.c
+++ b/target-mips/dsp_helper.c
@@ -3814,17 +3814,17 @@ void helper_shilo(target_ulong ac, target_ulong rs,
CPUMIPSState *env)
rs5_0 = rs 0x3F;
rs5_0 =
From: Andreas Färber [afaer...@suse.de]
FWIW you could use our unlikely() macro then to aid branch prediction.
Just did. Thanks.
Petar
; Peter Maydell; Jovanovic, Petar; qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v12 09/14] target-mips: Add ASE DSP
bit/manipulation instructions
Hi Aurelien,
On Thu, Nov 1, 2012 at 3:20 AM, Aurelien Jarno aurel...@aurel32.net wrote:
On Wed, Oct 31, 2012 at 09:29:30PM +0800, Jia Liu
To: Jovanovic, Petar
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v12 09/14] target-mips: Add ASE DSP
bit/manipulation instructions
Hi Petar,
On Sun, Oct 28, 2012 at 6:58 AM, Jovanovic, Petar pet...@mips.com wrote:
+case OPC_REPL_PH:
+check_dsp(ctx
+case OPC_REPL_PH:
+check_dsp(ctx);
+{
+imm = (ctx-opcode 16) 0x03FF;
+tcg_gen_movi_tl(cpu_gpr[ret], \
+(target_long)((int32_t)imm 16 | \
+(uint32_t)(uint16_t)imm));
+
diff --git a/tests/tcg/mips/mips32-dspr2/dpaqx_sa_w_ph.c
b/tests/tcg/mips/mips32-dspr2/dpaqx_sa_w_ph.c
new file mode 100644
index 000..65d3993
--- /dev/null
+++ b/tests/tcg/mips/mips32-dspr2/dpaqx_sa_w_ph.c
@@ -0,0 +1,31 @@
+#includestdio.h
+#includeassert.h
+
+int main()
+{
+
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