Re: QEMU 6.2.0: Segfault while calling address_space_init from emulated device

17, 2022 at 12:40 AM Peter Maydell wrote: > > On Tue, 17 May 2022 at 04:39, Karthik Poduval > wrote: > > Ok digging deeper, there was a compiler warning about a missing > > prototype of get_system_memory but I never thought it would lead to > > this sort of an issue.

Re: QEMU 6.2.0: Segfault while calling address_space_init from emulated device

/620dba22bf389c6f9b9f039ad01fc5e1365d8216 I always thought that compilers figured things out about function prototypes but in this case it caused a very serious issue that almost seemed like memory corruption. Lesson learned, never miss function prototypes. On Mon, May 16, 2022 at 8:31 PM Karthik Poduval wrote: >

Re: QEMU 6.2.0: Segfault while calling address_space_init from emulated device

/karthikpoduval/qemu/commit/00580c9f3c60a7d9c3bb43bc9589f76e663197e4 On Mon, May 16, 2022 at 7:13 PM Karthik Poduval wrote: > > Hi All, > > I still need help, any help would be greatly appreciated. Turned on > address sanitizers (config option --enable-sanitizers). > It pointed

Re: QEMU 6.2.0: Segfault while calling address_space_init from emulated device

:26 AM Karthik Poduval wrote: > > Hi All, > > I am trying to create a virtual mem2mem scaler device in QEMU (for the > purposes of writing a mem2mem driver tutorial). I created the mem2mem > device as shown here. > https://github.com/karthikpoduval/qemu/blob/scaler-bringup/hw/mi

QEMU 6.2.0: Segfault while calling address_space_init from emulated device

ave access to the entire DDR memory). -- Regards, Karthik Poduval

Re: Heterogeneous/AMP example in mainline?

Thanks Peter, I will go through the Xilinx example. -- Regards, Karthik Poduval On Fri, Sep 18, 2020 at 8:08 AM Peter Maydell wrote: > On Fri, 18 Sep 2020 at 14:15, karthik poduval > wrote: > > Was sifting through the heterogeneous QEMU effort in archives here > > htt

Heterogeneous/AMP example in mainline?

Hi All, Was sifting through the heterogeneous QEMU effort in archives here https://lists.gnu.org/archive/html/qemu-devel/2015-10/msg06256.html Did this effort make it to the mainline ? Are there any examples of AMP SoC's in the mainline ? -- Regards, Karthik Poduval

Re: [Qemu-devel] GUI for peripherals

Thank you. I will check that out. Best regards, Karthik On Wed, Jun 1, 2016 at 5:59 PM, Liviu Ionescu <i...@livius.net> wrote: > > > On 01 Jun 2016, at 12:28, KONRAD Frederic <fred.kon...@greensocs.com> > wrote: > > > > ... I think Liviu did something ab

[Qemu-devel] GUI for peripherals

it be possible to write the GUI separately and use QMP to communicate with my custom driver to control peripherals? or is there an better way to do this? Best regards, Karthik

Re: [Qemu-devel] ARM IRQ Generation

Okay. Thank you. Best regards, Karthik On Wed, May 25, 2016 at 6:18 PM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 25 May 2016 at 13:42, Karthik <karthikshanmu...@gmail.com> wrote: > > Okay, understood. I`ll hold the IRQ line until CPU acknowled

Re: [Qemu-devel] ARM IRQ Generation

Okay, understood. I`ll hold the IRQ line until CPU acknowledges the interrupt. By the way, is there a distinction between edge and level triggered interrupt in the qemu or it is up to the emulation implementation? Best regards, Karthik On Wed, May 25, 2016 at 6:04 PM, Peter Maydell

Re: [Qemu-devel] ARM invalid co-processor register

Understood. Thank you for the clarifications. Best regards, Karthik On Wed, May 25, 2016 at 6:05 PM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 25 May 2016 at 13:33, Karthik <karthikshanmu...@gmail.com> wrote: > > Does the qemu implements cache emulation? > &

Re: [Qemu-devel] ARM invalid co-processor register

Does the qemu implements cache emulation? I did see some comments saying otherwise. Best regards, Karthik On Wed, May 25, 2016 at 5:57 PM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 25 May 2016 at 06:44, Karthik <karthikshanmu...@gmail.com> wrote: > > Hi, &g

[Qemu-devel] ARM IRQ Generation

is lowered before the CPU is interrupted. There is a delay between qemu_set_irq() and the ARM CPU getting interrupted. I don't see any delay between timer and interrupt controller. Any help will be much appreciated. Thank you. Best regards, Karthik

[Qemu-devel] ARM invalid co-processor register

ature(>env, ARM_FEATURE_DUMMY_C15_REGS); So, which option is recommended? Best regards, Karthik

Re: [Qemu-devel] ARM Cortex R5 + VFP3

Hi, Added enabling VFP co-processor in the bootrom emulation code. Works like a charm. Many thanks. Best regards, Karthik On Tue, May 24, 2016 at 7:52 PM, Karthik <karthikshanmu...@gmail.com> wrote: > Yeah, the micro had a secure boot ROM which we don't have access to. &

Re: [Qemu-devel] ARM Cortex R5 + VFP3

, Karthik On May 24, 2016 7:31 PM, "Peter Maydell" <peter.mayd...@linaro.org> wrote: > On 24 May 2016 at 14:49, Karthik <karthikshanmu...@gmail.com> wrote: > > ahh okay. The code I don't think writes to CPACR_EL1 register, but it > runs > > on the hardware anywa

Re: [Qemu-devel] ARM Cortex R5 + VFP3

ahh okay. The code I don't think writes to CPACR_EL1 register, but it runs on the hardware anywary. I`ll double check. Thanks for the tip. Best regards, Karthik On Tue, May 24, 2016 at 7:07 PM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 24 May 2016 at 14:07, Karthik <k

[Qemu-devel] ARM Cortex R5 + VFP3

qemu. Any help will be much appreciated. Thank you. Best regards, Karthik

[Qemu-devel] Newbie to Q

Dear All             I am trying Q emulator on Mac OS X 10.4.8. It works fine and well. I am also downloaded the source code.             I couldn't connect the network through this emulator. I am running Linux from this. But I couldn't connect to internet while I am inside the emulation.