** Changed in: qemu
Status: In Progress = Fix Committed
--
SMC91C111 failed when booting Linux/ARM(Mainstone) since 0.10.0
https://bugs.launchpad.net/bugs/586424
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
Status in QEMU:
Fixed in e03c22a98cf5deffd0dec2f9ff88a600aa330bc4
** Changed in: qemu
Status: New = Fix Committed
--
Linux on ARM/Mainstone machine fails at bootstrap
https://bugs.launchpad.net/bugs/586221
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed
On Fri, May 28, 2010 at 9:24 PM, Aurelien Jarno aurel...@aurel32.net wrote:
On Sat, May 08, 2010 at 10:43:35PM +0200, Lars Munch wrote:
Booting an arm kernel has been broken a while when booting from non zero
start
address. This is due to the order of events: board init loads the kernel
On Sat, May 29, 2010 at 8:51 PM, Aurelien Jarno aurel...@aurel32.net wrote:
On Sat, May 29, 2010 at 08:42:52PM +0200, Lars Munch wrote:
On Fri, May 28, 2010 at 9:24 PM, Aurelien Jarno aurel...@aurel32.net wrote:
On Sat, May 08, 2010 at 10:43:35PM +0200, Lars Munch wrote:
Booting an arm
This was fixed some time ago in commit
3b4b86aace17ef07fc4f85a9662c991efbc83e15
--
SMC91C111 failed when booting Linux/ARM(Mainstone) since 0.10.0
https://bugs.launchpad.net/bugs/586424
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
There are already patches pending to solve these issues:
http://article.gmane.org/gmane.comp.emulators.qemu/69598
and
http://article.gmane.org/gmane.comp.emulators.qemu/69597
Hopefully they will be reviewed/applied soon.
--
Linux on ARM/Mainstone machine fails at bootstrap
This prevent coprocessor IO structure from being reset on cpu reset. This was
a problem for PXA which uses coprocessor 6 and 14.
Signed-off-by: Lars Munch l...@segv.dk
---
target-arm/cpu.h | 14 +++---
1 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/target-arm/cpu.h b
of the register 15 start address trick in
combination with arm_load_kernel.
Signed-off-by: Lars Munch l...@segv.dk
---
hw/arm_boot.c |1 +
hw/gumstix.c|4
hw/mainstone.c |3 ---
hw/nseries.c|7 ---
hw/omap_sx1.c |5 -
hw/palm.c
CP0 and/or CP1 needs to be accessible when using linux-user for emulating a
pxa270 cpu with code using iwmmxt instructions. This patch inits the cpu to
have CP0 and/or CP1 accessible if in linux-user mode.
Signed-off-by: Lars Munch l...@segv.dk
---
target-arm/helper.c |6 ++
1 files
Use arm features based on cpu model. The hardcoded feature list gave problems
in the setjmp/longjmp functions of glibc since it tried to use VFP instructions
even though I specified a pxa270 as cpu model.
This is similar to the PPC get_elf_hwcap function.
Signed-off-by: Lars Munch l...@segv.dk
This fixes a copy/paste bug introduced in commit
2d48377a8531de63ec1d0c4b9b1959dc4b78356c that pushed TARGET_WORDS_BIGENDIAN
dependency to board level.
Signed-off-by: Lars Munch l...@segv.dk
---
hw/pxa2xx.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/pxa2xx.c b
Use arm features based on cpu model. The hardcoded feature list gave
problems in the setjmp/longjmp functions of glibc since it tried to use
VFP instructions even though I specified a pxa270 as cpu model.
Signed-off-by: Lars Munch l...@segv.dk
---
linux-user/elfload.c | 10 ++
1 files
When using linux-user for emulating an pxa270 we cannot generate an illegal
instruction trap to the kernel to save/load the iwmmxt registers.
Signed-off-by: Lars Munch l...@segv.dk
---
target-arm/translate.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/target-arm
is a different fix. Hopefully I am on the right track this time. This
patch inits the cpu to have CP0 and/or CP1 accessible from the beginning if in
linux-user mode.
Signed-off-by: Lars Munch l...@segv.dk
---
target-arm/helper.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff
get_elf_hwcap function. I am unsure if I have too
many or too few features as I do not know the details on all the capability
flags, so comments are more than welcome.
Signed-off-by: Lars Munch l...@segv.dk
---
linux-user/elfload.c | 24
1 files changed, 20 insertions
This patch fixes few resource leaks in the iwmmxt disassemble.
Signed-off-by: Lars Munch l...@segv.dk
---
target-arm/translate.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index cdfe946..2ab7881 100644
--- a/target
Hi
The pl110 controller do not update all rows correctly if you set a
resolution where src_width TARGET_PAGE_SIZE. I ran into this problem
at the resolution 480x640x16. The attached patch fixes this problem.
-- Lars Munch
Index: hw/pl110.c
2004 :-)
http://lists.gnu.org/archive/html/qemu-devel/2004-11/msg00454.html
-- Lars Munch
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
,
and 1m35s with the PCNET card.
Does anyone know why pcnet is so much faster than ne2000? is it easier
to emulate? or is there room for improvements on the ne2000?
-- Lars Munch
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http
19 matches
Mail list logo
