On 18/04/2014 16:44, Richard Henderson wrote:
On 04/18/2014 07:00 AM, Mian M. Hamayun wrote:
Hello Peter & All,
I am trying to figure out a problem in qemu on aarch64 (with kvm enabled). I
have found this problem in many different versions of qemu
(v2.0.0-rc3/rc2/rc1/rc0, master 2d03b49),
Hello Peter & All,
I am trying to figure out a problem in qemu on aarch64 (with kvm
enabled). I have found this problem in many different versions of qemu
(v2.0.0-rc3/rc2/rc1/rc0, master 2d03b49), and I believe that either I am
missing something common in all of these versions or its a genuine
From: Antonios Motakis
At runtime vhost-user netdev will detect if the vhost backend is up or down.
Upon disconnection it will set link_down accordingly and notify virtio-net.
Signed-off-by: Antonios Motakis
Signed-off-by: Nikolay Nikolaev
---
hw/net/vhost_net.c| 16 ++
From: Antonios Motakis
Add structures for passing vhost-user messages over a unix domain socket.
This is the equivalent to the existing vhost-kernel ioctls.
Connect to the named unix domain socket. The system call sendmsg
is used for communication. To be able to pass file descriptors
between pro
From: Antonios Motakis
Each ioctl request of vhost-kernel has a vhost-user message equivalent,
which is sent over the control socket.
The general approach is to copy the data from the supplied argument
pointer to a designated field in the message. If a file descriptor is
to be passed, it should
From: Antonios Motakis
Extend -mem-path with additional properties:
- prealloc=on|off - default off, same as -mem-prealloc
- share=on|off - default off, memory is mmapped with MAP_SHARED flag
- unlink=on|off - default on, inlink the file after openinng it
Signed-off-by: Antonios Motakis
Sig
From: Antonios Motakis
Add empty vhost_call, init and cleanup for the vhost-user backend.
Signed-off-by: Antonios Motakis
Signed-off-by: Nikolay Nikolaev
---
hw/net/vhost_net.c| 57 ++-
hw/virtio/vhost-backend.c | 35
From: Antonios Motakis
Add a new QEMU netdev backend that is intended to invoke vhost_net
with the vhost-user backend. Also decouple virtio-net from the tap
backend.
Signed-off-by: Antonios Motakis
Signed-off-by: Nikolay Nikolaev
---
hmp-commands.hx | 4 +-
hw/net/vhost_net.c
From: "Mian M. Hamayun"
In this patch series we would like to introduce our approach for putting a
virtio-net backend in an external userspace process. Our eventual target is to
run the network backend in the Snabbswitch ethernet switch, while receiving
traffic from a guest inside QEMU
From: Antonios Motakis
We introduce the concept of vhost-backend, which can be either vhost-kernel
or vhost-user. The existing vhost interface to the kernel is abstracted
behind the vhost-kernel backend.
We replace all direct ioctls to the kernel with a vhost_call to the backend.
vhost dev->cont
On 28/09/2013 02:16, Peter Maydell wrote:
On 28 September 2013 00:53, Andreas Färber wrote:
Hi,
Am 27.09.2013 12:10, schrieb Mian M. Hamayun:
From: John Rigby
Just an copy of a15 with a57 substituting a15 for now.
I had previously gently nack'ed this patch - conversions are still
q
From: "Mian M. Hamayun"
Introduce the A57 cpu to the default AArch64 configuration and enable KVM for
64-bit guests only.
Signed-off-by: Mian M. Hamayun
---
configure | 2 +-
default-configs/aarch64-softmmu.mak | 1 +
2 files changed, 2 insertions(+),
From: "Mian M. Hamayun"
The cpu init function tries to initialize with all possible cpu types, as
KVM does not provide a means to detect the real cpu type and simply refuses
to initialize on cpu type mis-match. By using the loop based init function,
we avoid the need to modify c
From: "Mian M. Hamayun"
This commit separates the 32-bit (ARMv7) specific KVM hooks from
the common code. It also adds the stub functions for 64-bit (ARMv8).
The makefile objects are also tweaked accordingly to compile code
either of ARMv7 or ARMv8 depending on the AARCH64 variable.
From: John Rigby
Just an copy of a15 with a57 substituting a15 for now.
Signed-off-by: John Rigby
Signed-off-by: Mian M. Hamayun
---
hw/cpu/Makefile.objs | 1 +
hw/cpu/a57mpcore.c | 122 +++
target-arm/cpu.c | 9
3 files changed
From: "Mian M. Hamayun"
This is the v3 of patch series that implements KVM support in QEMU for the ARMv8
Cortex A57 CPU. It depends on the recently mainlined AArch64 preparation patch
series and machvirt patches version v7, and uses the already available KVM
in-kernel GIC supp
From: "Mian M. Hamayun"
This commit adds the necessary flags and kernel load address to enable
booting of 32-bit guests on AArch64 processors.
The actual enable/disable mechanism is not included in this commit,
which should tweak the value of env->aarch64 variable for this purpose
From: "Mian M. Hamayun"
Signed-off-by: Mian M. Hamayun
---
configure | 1 +
1 file changed, 1 insertion(+)
diff --git a/configure b/configure
index 7298b69..dbaf56f 100755
--- a/configure
+++ b/configure
@@ -4485,6 +4485,7 @@ case "$target_name" in
# Make sure the
From: "Mian M. Hamayun"
We enable SMP support for aarch64 processors using the PSCI method,
by setting the appropriate CPU feature flags at initilializtion time.
Secondary boot code for non-aarch64 processors is disabled in case
of compilation for aarch64.
Signed-off-by: Mian
From: "Mian M. Hamayun"
This commit replaces the constant indices used in bootloaders, such as for
specifying the Board ID and kernel arguments with variable parameters.
This change is used as mechanism to minimize code changes for different
bootloaders, for example different bootloade
From: "Mian M. Hamayun"
This commit adds support for booting a single AArch64 CPU by setting
appropriate registers. The bootloader includes placehoders for Board-ID
that are used to implement uniform indexing across different bootloaders.
We also introduce Cortex-A57 to virt platfor
From: "Mian M. Hamayun"
This commit introduces a commandline argument to select the
AARCH64 or AARCH32 mode for processor initilization.
Signed-off-by: Mian M. Hamayun
---
qemu-options.hx | 8
target-arm/cpu.c | 9 +++--
vl.c | 4
3 files changed, 19
From: John Rigby
Also add the KVM_REG_ARM64 register type to linux/kvm header file.
Signed-off-by: John Rigby
Signed-off-by: Mian M. Hamayun
---
linux-headers/asm-arm64/kvm.h | 168 +
linux-headers/asm-arm64/kvm_para.h | 1 +
linux-headers/linux
On 09/08/2013 16:34, Peter Maydell wrote:
On 23 July 2013 10:33, Mian M. Hamayun wrote:
From: "Mian M. Hamayun"
As the SMP bootloader uses a spin-table to wait for the cpu_release_addr, we
disable the PSCI method for AArch64 in machvirt and use spin-table instead.
Marc Z says we
On 09/08/2013 15:24, Peter Maydell wrote:
On 23 July 2013 10:33, Mian M. Hamayun wrote:
From: "Mian M. Hamayun"
The cpu init function tries to initialize with all possible cpu types, as
KVM does not provide a means to detect the real cpu type and simply refuses
to initialize on cp
From: "Mian M. Hamayun"
As the SMP bootloader uses a spin-table to wait for the cpu_release_addr, we
disable the PSCI method for AArch64 in machvirt and use spin-table instead.
The CPU_RELEASE_OFFSET is introduced in machvirt and is to calculate the
cpu_release_addr by addition of thi
From: "Mian M. Hamayun"
The cpu init function tries to initialize with all possible cpu types, as
KVM does not provide a means to detect the real cpu type and simply refuses
to initialize on cpu type mis-match. By using the loop based init function,
we avoid the need to modify c
From: "Mian M. Hamayun"
This commit disables the co-processor registers reset code for KVM, when
compiling for AArch64 cpus.
Signed-off-by: Mian M. Hamayun
---
target-arm/kvm.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/target-arm/kvm.c b/target-arm/kvm.c
index c96b87
From: "Mian M. Hamayun"
This version supports booting of a single Aarch64 CPU by setting appropriate
registers. The bootloader includes placehoders for Board-ID that are used to
implementing uniform indexing across different bootloaders. The same macro
names are used with different v
From: Alexander Spyridakis
AArch64 uses a cpu-release-addr memory location (defined in the dts) as
a way to inform secondary CPUs where to jump to and enter their holding
pen. Inject a very simple bootloader that polls this memory location,
until the primary CPU sets it to the right address.
Sig
From: "Mian M. Hamayun"
This is the v2 of patch series that implements KVM support in QEMU for the ARMv8
Cortex A57 CPU. It depends on the previously submitted AArch64 preparation patch
series v5 and machvirt patches, and uses the already available KVM in-kernel GIC
suppor
From: "Mian M. Hamayun"
The memory region init calls require an additional parent parameter, so
introduce a null parent parameter to make it happy.
Signed-off-by: Mian M. Hamayun
---
hw/arm/virt.c |2 +-
hw/cpu/a57mpcore.c |2 +-
2 files changed, 2 insertions(+), 2
From: "Mian M. Hamayun"
Introduce the A57 cpu to the default AArch64 configuration and enable KVM for
64-bit guests only.
Signed-off-by: Mian M. Hamayun
---
configure |2 +-
default-configs/aarch64-softmmu.mak |3 ++-
2 files changed, 3 insert
At the time we started working on AArch64, we were not certain that our
implementation would be published in near future. Now that this is
cleared up we are more than happy to coordinate together.
On 28 June 2013 14:04, Andreas Färber wrote:
I had been looking into that tree myself, and apart
On 06/28/2013 02:43 PM, Alexander Graf wrote:
On 28.06.2013, at 14:11, Mian M. Hamayun wrote:
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index c614070..4df5292 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -783,6 +783,7 @@ struct
From: "Mian M. Hamayun"
The init function tries to initialize with Foundation models first and on
failure retries initializing on Fast Models.
Get and Put Registers deal with the basic state of Aarch64 CPUs for the moment.
Signed-off-by: Mian M. Hamayun
---
linux-headers/linux/kv
This patch series implements KVM support in QEMU for the ARMv8 Cortex
A57 CPU.
It depends on the previously submitted AArch64 Preparation Patchset V4,
and uses
as a base, the existing Versatile Express machine model and the already
available KVM in-kernel GIC support.
As a reference, KVM Tool a
From: Alexander Spyridakis
AArch64 uses a cpu-release-addr memory location (defined in the dts) as
a way to inform secondary CPUs where to jump to and enter their holding
pen. Inject a very simple bootloader that polls this memory location,
until the primary CPU sets it to the right address.
Sig
From: "Mian M. Hamayun"
This version supports booting of a single Aarch64 CPU by setting appropriate
registers. The bootloader includes placehoders for Board-ID that are used to
implementing uniform indexing across different bootloaders.
The same macro names are used with different v
From: "Mian M. Hamayun"
The vexpress model for A57 is based on the A15 machine model with a few
changes in the daughterboard initialization (using a subset of A15
functionality). The A57 daughterboard init also shares the A15MPCore
private memory region with A15 daughterboard ini
From: "Mian M. Hamayun"
Signed-off-by: Mian M. Hamayun
---
linux-headers/asm-arm64/kvm.h | 168
linux-headers/asm-arm64/kvm_para.h |1 +
2 files changed, 169 insertions(+)
create mode 100644 linux-headers/asm-arm64/kvm.h
create mode 10
From: "Mian M. Hamayun"
Signed-off-by: Mian M. Hamayun
---
configure |3 +-
default-configs/aarch64-softmmu.mak | 83 +++
2 files changed, 85 insertions(+), 1 deletion(-)
create mode 100644 default-configs/aarch64-s
Hello Everyone,
I am currently trying to compile qemu for Aarch64 but so far I haven't
been able to configure qemu for this purpose.
My first objective is to just configure and cross-compile qemu for
Aarch64, which is currently blocked by the qemu's dependency on
cross-compiled "glib-2.12".
F
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