Am 2018-09-17 18:30, schrieb Emilio G. Cota:
From: Paolo Bonzini
Cc: Michael Walle
Signed-off-by: Paolo Bonzini
Signed-off-by: Emilio G. Cota
---
target/lm32/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c
index b7499cb627
Am 2018-10-31 11:19, schrieb Paolo Bonzini:
On 18/07/2018 12:48, Michael Walle wrote:
/**
+ * get_irq_latched:
+ * @num: Interrupt to observe.
+ *
+ * Returns: The latched level of the @num interrupt.
+ */
+static inline bool get_irq_latched(int num)
+{
+return qtest_get_irq_latched
Am 2018-10-01 08:37, schrieb Cédric Le Goater:
Cc: Michael Walle
Signed-off-by: Cédric Le Goater
Reviewed-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
---
hw/net/milkymist-minimac2.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/hw/net/milkymist
Acked-by: Michael Walle
Will this go through the qemu-trivial queue?
-michael
Emulate write collisions, stray writes and microcode which has no VECTOUT
opcode. Although the latter was supported before, the emulation was
incorrect.
Signed-off-by: Michael Walle
---
hw/misc/milkymist-pfpu.c | 105 +--
1 file changed, 75 insertions
It is only possible to retrieve the current state of an interrupt line. But
there are devices which just pulses the interrupt line. Introduce a latch
which is set by qtest and which can be cleared by the test case.
Signed-off-by: Michael Walle
Cc: Paolo Bonzini
Cc: Andreas Färber
---
tests
Add initial tests which check basic computations and error cases on the
PFPU.
Signed-off-by: Michael Walle
---
MAINTAINERS | 1 +
hw/lm32/lm32.h | 2 +
tests/Makefile.include | 4 +
tests/milkymist-pfpu-test.c | 193
: xiaoqiang zhao
Tested-by: Michael Walle
Acked-by: Michael Walle
Am 2016-05-23 12:24, schrieb xiaoqiang zhao:
* Drop the old SysBus init function
* Call qemu_chr_add_handlers in the realize callback
* Use qdev chardev prop instead of qemu_char_get_next_serial
Signed-off-by: xiaoqiang zhao
---
hw/char/lm32_juart.c | 17 -
hw/lm32/lm32.h
Am 2016-05-25 08:39, schrieb xiaoqiang zhao:
drop the qemu_char_get_next_serial and use chardev prop instead
Signed-off-by: xiaoqiang zhao
Tested-by: Michael Walle
Acked-by: Michael Walle
Am 2016-05-25 08:39, schrieb xiaoqiang zhao:
* Drop the old SysBus init function
* Call qemu_chr_add_handlers in the realize callback
* Use qdev chardev prop instead of qemu_char_get_next_serial
Signed-off-by: xiaoqiang zhao
Tested-by: Michael Walle
Acked-by: Michael Walle
Am 2016-05-25 08:38, schrieb xiaoqiang zhao:
This patch set trys to QOM'ify hw/char files, see commit messages
for more details
Thanks Paolo for your suggestions.
Note:
* CRIS axis_dev88 broad related test is passed and looks ok.
* lm32 test cases by Michael is passed and looks
good.
* lm32
hi,
im planning to, please bear with me, as i'm on vacation.
-michael
Am 2. Juni 2016 16:10:40 GMT+06:00, schrieb "赵小强" :
>
>
>At 2016-05-09 17:24:04, mich...@walle.cc wrote:
>>Hi Peter,
>>
>>Am 2016-05-04 16:56, schrieb Peter Maydell:
>>
>>> SPARC, lm32, CRIS maintainers: do you want to take
Am 2016-07-22 17:57, schrieb Alexander Graf:
On 07/22/2016 05:18 PM, Michael Walle wrote:
64 bit user mode doesn't work for the e5500 core because the MSR_CM
bit is
not set which enables the 64 bit mode for this MMU model. Memory
addresses
are truncated to 32 bit, which results in &qu
Only the POWER[789] CPUs should have the ARCH_206 bit set. This is what the
linux kernel does. I guess this was also the intention of commit 0e019746.
We have to make sure all *206 bits are set.
Signed-off-by: Michael Walle
---
checkpatch.pl flags one warning, but I think this is a false
Am 2016-08-16 15:41, schrieb Riku Voipio:
On Tue, Aug 16, 2016 at 03:32:56PM +0200, Michael Walle wrote:
Am 2016-07-22 17:57, schrieb Alexander Graf:
>On 07/22/2016 05:18 PM, Michael Walle wrote:
>>64 bit user mode doesn't work for the e5500 core because the MSR_CM bit
>&g
Am 2016-09-20 04:23, schrieb David Gibson:
On Tue, Aug 16, 2016 at 03:40:50PM +0200, Michael Walle wrote:
Only the POWER[789] CPUs should have the ARCH_206 bit set. This is
what the
linux kernel does. I guess this was also the intention of commit
0e019746.
We have to make sure all *206 bits
worked well as long as there was only one bit
set in the 'flag' parameter. But as explained before, we have to make sure
all bits in the 'flag' parameter are set.
Signed-off-by: Michael Walle
---
v2:
- rename flag to flags
- use normal indent style in macro (also makes
Am 2016-08-16 15:56, schrieb Michael Walle:
Am 2016-08-16 15:41, schrieb Riku Voipio:
On Tue, Aug 16, 2016 at 03:32:56PM +0200, Michael Walle wrote:
Am 2016-07-22 17:57, schrieb Alexander Graf:
>On 07/22/2016 05:18 PM, Michael Walle wrote:
>>64 bit user mode doesn't work for
some qomifying
--------
Michael Walle (1):
milkymist: update specification URLs
xiaoqiang zhao (5):
hw/timer: QOM'ify lm32_timer
hw/timer: QOM'ify milkymist_sysctl
hw/display: QOM'ify milkymist-tmu2.c
hw/display: QOM'ify milkymist-vgafb.c
hw/intc: QOM&
From: xiaoqiang zhao
* Drop the old SysBus init function and use instance_init
* Move tmu2_glx_init into realize stage
Signed-off-by: xiaoqiang zhao
Reviewed-by: Peter Maydell
Acked-by: Michael Walle
Tested-by: Michael Walle
Signed-off-by: Michael Walle
---
hw/display/milkymist-tmu2.c
From: xiaoqiang zhao
Drop the old SysBus init function and use instance_init
Signed-off-by: xiaoqiang zhao
Acked-by: Michael Walle
Tested-by: Michael Walle
Signed-off-by: Michael Walle
---
hw/intc/lm32_pic.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a
From: xiaoqiang zhao
* split the old SysBus init function into an instance_init
and a Device realize function
* use DeviceClass::realize instead of SysBusDeviceClass::init
Reviewed-by: Peter Maydell
Signed-off-by: xiaoqiang zhao
Acked-by: Michael Walle
Tested-by: Michael Walle
Signed-off
From: xiaoqiang zhao
* split the old SysBus init function into an instance_init
and a Device realize function
* use DeviceClass::realize instead of SysBusDeviceClass::init
Reviewed-by: Peter Maydell
Signed-off-by: xiaoqiang zhao
Acked-by: Michael Walle
Tested-by: Michael Walle
Signed-off
From: xiaoqiang zhao
* Drop the old SysBus init function and use instance_init
* Move graphic_console_init into realize stage
Signed-off-by: xiaoqiang zhao
Reviewed-by: Peter Maydell
Acked-by: Michael Walle
Tested-by: Michael Walle
Signed-off-by: Michael Walle
---
hw/display/milkymist
The old milkymist.org domain just forwards to mm-labs.hk nowadays. I've
created a mirror of the documents.
Signed-off-by: Michael Walle
---
hw/audio/milkymist-ac97.c| 2 +-
hw/char/milkymist-uart.c | 2 +-
hw/display/milkymist-tmu2.c | 2 +-
hw/display/milkymist-vgafb.c | 2 +-
hw
Am 2016-06-21 12:11, schrieb Gerd Hoffmann:
Signed-off-by: Gerd Hoffmann
Ouch, sorry. Must haved missed the opengl feature yesterday.
Acked-by: Michael Walle
---
hw/display/milkymist-tmu2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/display/milkymist-tmu2.c b/hw/display
Am 2017-07-14 15:52, schrieb Igor Mammedov:
it's just a wrapper, drop it and use cpu_generic_init() directly
Signed-off-by: Igor Mammedov
Acked-by: Michael Walle
Am 2017-07-09 17:39, schrieb Programmingkid:
I just made a documentation page for the LatticeMicro32 target. I need
to know its current status, how much of this system is implemented,
what software runs on it. If anyone could supply more information that
would be appreciated. Pictures of this tar
Am 2017-07-18 08:09, schrieb Philippe Mathieu-Daudé:
Applied using the Coccinelle semantic patch
scripts/coccinelle/use_osdep.cocci
Signed-off-by: Philippe Mathieu-Daudé
QEMU_IS_ALIGNED() sounds like it is used to check if a memory access is
aligned. Although it does the same, the line in q
Am 2017-07-17 17:18, schrieb Programmingkid:
On Jul 17, 2017, at 10:56 AM, Programmingkid
wrote:
On Jul 17, 2017, at 1:40 AM, Michael Walle wrote:
Am 2017-07-09 17:39, schrieb Programmingkid:
I just made a documentation page for the LatticeMicro32 target. I
need
to know its current
+++
target/lm32/cpu.c | 74
+--
2 files changed, 25 insertions(+), 52 deletions(-)
Acked-by: Michael Walle
Am 2017-10-02 11:07, schrieb Igor Mammedov:
Signed-off-by: Igor Mammedov
---
CC: mich...@walle.cc
---
hw/lm32/lm32_boards.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
Acked-by: Michael Walle
Am 2017-10-02 11:07, schrieb Igor Mammedov:
Signed-off-by: Igor Mammedov
---
CC: mich...@walle.cc
---
hw/lm32/milkymist.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
Acked-by: Michael Walle
Am 2019-03-12 18:36, schrieb Markus Armbruster:
= hw/lm32/lm32_boards.c =
Michael Walle (maintainer:LM32)
= hw/lm32/milkymist.c =
Michael Walle (maintainer:milkymist)
Hi folks,
I guess it is time to pull the plug. Mainly, because I have no time for
this anymore. I&#x
[resend because my mobile client messed up the message and gmail
rejected it]
Am 2019-03-18 09:15, schrieb Markus Armbruster:
Michael Walle writes:
Am 2019-03-12 18:36, schrieb Markus Armbruster:
= hw/lm32/lm32_boards.c =
Michael Walle (maintainer:LM32)
= hw/lm32/milkymist.c
Am 2018-04-10 18:19, schrieb Emilio G. Cota:
If the PC is in the last page of the address space, next_page_start
overflows to 0. Fix it.
Cc: Michael Walle
Signed-off-by: Emilio G. Cota
Acked-by: Michael Walle
Am 2018-04-16 01:42, schrieb Philippe Mathieu-Daudé:
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/
include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Michael Walle
Hi,
Am 2018-05-09 13:51, schrieb Paolo Bonzini:
On 08/05/2018 03:49, Philippe Mathieu-Daudé wrote:
#2 0x7fe17d5eefa5 in g_assertion_message () at
/usr/lib/x86_64-linux-gnu/libglib-2.0.so.0
#3 0x7fe17d5ef00a in g_assertion_message_expr () at
/usr/lib/x86_64-linux-gnu/libglib-2.0.so.0
#
Changing the IP/IM registers may cause interrupts, so hold the BQL.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Michael Walle
---
target/lm32/gdbstub.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/lm32/gdbstub.c b/target/lm32/gdbstub.c
index cf929dd392..2cdeef8f5e 100644
--- a
I'll send a pull request next week if there are no comments on the
patches.
Michael Walle (2):
lm32: take BQL before writing IP/IM register
target/lm32: hold BQL in gdbstub
target/lm32/gdbstub.c | 4
target/lm32/op_helper.c | 4
2 files changed, 8 insertions(+)
--
2.11.0
Writing to these registers may raise an interrupt request. Actually,
this prevents the milkymist board from starting.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Michael Walle
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
---
target/lm32/op_helper.c | 4
1 file changed, 4
Changing the IP/IM registers may cause interrupts, so hold the BQL.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Michael Walle
---
target/lm32/gdbstub.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target/lm32/gdbstub.c b/target/lm32/gdbstub.c
index cf929dd392..dac9418a2b 100644
--- a
Writing to these registers may raise an interrupt request. Actually,
this prevents the milkymist board from starting.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Michael Walle
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
---
target/lm32/op_helper.c | 4
1 file changed, 4
Whoops, forget the include patch chunk for the second patch.
I'll send a pull request next week if there are no comments on the
patches.
since v1:
add missing #include
Michael Walle (2):
lm32: take BQL before writing IP/IM register
target/lm32: hold BQL in gdbstub
target/lm32/gdbs
:
"Code block is unreachable because of the syntactic structure of the
code (CWE-561)"
and fixes the following issue:
- CID1005332 (hw/sd/sd.c::sd_req_crc_validate) Structurally dead code
Signed-off-by: Philippe Mathieu-Daudé
Tested-by: Michael Walle
-michael
Am 2018-05-21 14:25, schrieb Peter Maydell:
On 21 May 2018 at 13:21, Michael Walle wrote:
Changing the IP/IM registers may cause interrupts, so hold the BQL.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Michael Walle
---
target/lm32/gdbstub.c | 5 +
1 file changed, 5 insertions(+)
diff
Writing to these registers may raise an interrupt request. Actually,
this prevents the milkymist board from starting.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Michael Walle
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
---
target/lm32/op_helper.c | 4
1 file changed, 4
81e9cbd0ca1131012b058df6804b1f626a6b730c:
lm32: take BQL before writing IP/IM register (2018-05-21 13:37:12 +0200)
Michael Walle (1):
lm32: take BQL before writing IP/IM register
target/lm32/op_helper.c | 4
1 file changed, 4
Am 2018-05-22 12:01, schrieb Peter Maydell:
On 21 May 2018 at 16:49, Michael Walle wrote:
The following changes since commit
81e9cbd0ca1131012b058df6804b1f626a6b730c:
lm32: take BQL before writing IP/IM register (2018-05-21 13:37:12
+0200)
are available in the git repository at:
git
half of the fix for
>coverity CID 1167561.
>
>Signed-off-by: Peter Maydell
Acked-by: Michael Walle
>---
> hw/display/milkymist-tmu2.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/hw/display/milkymist-tmu2.c b/hw/display/milkymist-tmu2.c
>index 5c66
Am 2018-01-23 04:58, schrieb Philippe Mathieu-Daudé:
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Michael Walle
---
hw/sd/milkymist-memcard.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/hw/sd/milkymist-memcard.c b/hw/sd/milkymist-memcard.c
Am 2018-01-23 04:58, schrieb Philippe Mathieu-Daudé:
using the sdbus_*() API.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Michael Walle
---
hw/sd/milkymist-memcard.c | 38 +-
1 file changed, 21 insertions(+), 17 deletions(-)
diff --git a/hw/sd
Am 2018-01-23 04:58, schrieb Philippe Mathieu-Daudé:
Create the SDCard in the realize() function.
Suggested-by: Michael Walle
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Michael Walle
---
hw/sd/milkymist-memcard.c | 28
1 file changed, 16 insertions
Hi Peter,
do you apply this patch? Or do I have to send a pull request?
-michael
Am 2018-01-09 18:01, schrieb Michael Walle:
Writing to these registers may raise an interrupt request. Actually,
this prevents the milkymist board from starting.
Cc: qemu-sta...@nongnu.org
Signed-off-by
Hey Philippe,
Am 2018-01-03 17:23, schrieb Philippe Mathieu-Daudé:
Create the SDCard in the realize() function.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/milkymist-memcard.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/hw/sd/milkymist-mem
Am 2018-01-09 12:58, schrieb Peter Maydell:
I just fell over this, it looks like this fix never made it into
master.
Michael, could you submit this as a full patch with a commit message
and signed-off-by, please? cc: qemu-sta...@nongnu.org as well, since
it fixes a "breaks the board completely"
Writing to these registers may raise an interrupt request. Actually,
this prevents the milkymist board from starting.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Michael Walle
---
target/lm32/op_helper.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/lm32/op_helper.c b/target/lm32
Hi Philippe,
Am 2018-01-09 19:16, schrieb Philippe Mathieu-Daudé:
Hi Michael,
Am 2018-01-03 17:23, schrieb Philippe Mathieu-Daudé:
Create the SDCard in the realize() function.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/milkymist-memcard.c | 24 +++-
1 file changed
Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N;N; {s|fprintf(stderr,
"\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \
{} +
find ./* -type f -exec sed -i \
'N;N; {s|fprintf(stderr,
"\(.*\)\\n"\(.*\));|error_report("\1&q
Am 2018-10-30 18:00, schrieb Peter Maydell:
Check the return value from load_image_targphys(), which tells us
whether our attempt to load the BIOS image into RAM failed.
(Spotted by Coverity, CID 1190305.)
Signed-off-by: Peter Maydell
Acked-by: Michael Walle
Will you put it in your queue
Am 2018-07-18 12:48, schrieb Michael Walle:
It is only possible to retrieve the current state of an interrupt line.
But
there are devices which just pulses the interrupt line. Introduce a
latch
which is set by qtest and which can be cleared by the test case.
Signed-off-by: Michael Walle
Cc
Am 1. Februar 2019 18:31:46 MEZ schrieb "Alex Bennée" :
>
>Michael Walle writes:
>
>> The lm32 architecture doesn't need the complete compiler. In fact,
>only
>> the building of GCC is skipped to make building the docker image
>faster.
>>
>&
Unfortunately, there is no debian package for the lm32 toolchain. To
keep the build times short, only build the binutils from scratch.
Signed-off-by: Michael Walle
---
tests/docker/Makefile.include | 5 ++--
tests/docker/dockerfiles/debian-lm32-cross.docker | 31
Convert the existing to the new common cross build infrastructure.
Signed-off-by: Michael Walle
---
tests/tcg/lm32/Makefile| 106 -
tests/tcg/lm32/Makefile.include| 8 +++
tests/tcg/lm32/Makefile.softmmu-target | 33 ++
3 files
The lm32 architecture doesn't need the complete compiler. In fact, only
the building of GCC is skipped to make building the docker image faster.
Signed-off-by: Michael Walle
---
tests/tcg/Makefile.include | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/
t work with the
native host cross toolchain - unless we'll probe for the assembler and
linker, too.
Any ideas?
Michael Walle (3):
tests/docker: add debian-lm32-cross image
tests/tcg: also pass AS and LD variables
tests/tcg/lm32: enable system tests
tests/docker/Makefile.include
Hi,
Am 2020-03-16 13:26, schrieb Philippe Mathieu-Daudé:
Michael Walle expressed his desire to orphan the lm32 target [*]:
I guess it is time to pull the plug. Mainly, because I have
no time for this anymore. I've always worked on this on my
spare time and life changed. And second
Am 2020-03-16 13:26, schrieb Philippe Mathieu-Daudé:
Michael Walle expressed his desire to orphan the lm32 target [*]:
I guess it is time to pull the plug. Mainly, because I have
no time for this anymore. I've always worked on this on my
spare time and life changed. And secondly, I
Hi Anthony, Hi Gerd,
the GTK frontend does not respect the the "chr_can_read" hook. The
frontend just writes characters to the device using qemu_chr_be_write()
without checking if the device can receive any input
(qemu_chr_be_can_write()).
At least for my device model (hw/char/milkymist-uart
Hi Gerd,
i have another issue. This time with the hid keyboard rework (commit
1ff5eedd). Before this commit, a press of, for example the windows key,
resulted in two calls of the hs->event() callback. Eg. there were two
events queued and two callbacks. But after your commit, two events are
qu
Am 2014-10-01 16:17, schrieb Gerd Hoffmann:
Hi,
My input device model (milkymist-softusb.c) polls
(hid_keyboard_poll())
exactly once per event callback. Actually, i don't see any other way
to
do it because the hid_keyboard_poll() always succeeds even if there is
no event in the queue.
You c
Am Freitag, 12. September 2014, 19:04:17 schrieb Peter Maydell:
> GDB assumes that watchpoint set via the gdbstub remote protocol will
> behave in the same way as hardware watchpoints for the target. In
> particular, whether the CPU stops with the PC before or after the insn
> which triggers the wa
Keys which send more than one scancode (esp. windows key) weren't handled
correctly since commit 1ff5eedd. Two events were put into the input event
queue but only one was processed. Fixes this by fetching all pending
events in the callback handler.
Signed-off-by: Michael Walle
Cc: Gerd Hof
Am Sonntag, 5. Oktober 2014, 22:48:05 schrieb Peter Maydell:
> On 5 October 2014 22:36, Peter Maydell wrote:
> > On 5 October 2014 22:00, Michael Walle wrote:
> >> I can confirm that your patch makes qemu stop one instruction earlier.
> >> Without your patch the prog
Am Samstag, 13. September 2014, 09:45:31 schrieb Richard Henderson:
> Cc: Michael Walle
> Signed-off-by: Richard Henderson
Acked-by: Michael Walle
> ---
> cpu-exec.c| 7 ---
> target-lm32/cpu-qom.h | 1 +
> target-lm32/cpu.c | 1 +
> targe
Add myself to lm32 and milkymist files.
Signed-off-by: Michael Walle
---
MAINTAINERS | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 94366ef..584a174 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -98,8 +98,12 @@ LM32
M: Michael Walle
S
19:43:52 +0200)
--------
Michael Walle (4):
test: lm32: make test cases independent
target-lm32: add semihosting support
test: lm32: use semihosting for testing
lm32: remove lm32_sys
hw/misc/Makefile.objs |
Make test cases independent from from each other. Eg. if a test case needs
a specific value in register A, don't rely on the fact that it is already
set by the preceding test case.
Signed-off-by: Michael Walle
---
tests/tcg/lm32/test_lb.S |4
tests/tcg/lm32/test_lbu.S |
Instead of the lm32-sys device, use semihosting to print to the host
console and exit the test.
Signed-off-by: Michael Walle
---
tests/tcg/lm32/Makefile | 15 +-
tests/tcg/lm32/crt.S|4 +--
tests/tcg/lm32/helper.S | 65
Intercept certain system calls if semihosting is enabled. This should
behave like the GDB simulator.
Signed-off-by: Michael Walle
---
qemu-options.hx |3 +-
target-lm32/Makefile.objs |1 +
target-lm32/README|9 ++
target-lm32/cpu.h |1 +
target-lm32
Since we have now semihosting on the lm32 target, this device is no longer
needed. Remove it.
Signed-off-by: Michael Walle
---
hw/misc/Makefile.objs |1 -
hw/misc/lm32_sys.c| 179 -
target-lm32/README| 10 ---
trace-events
Am Donnerstag 09 August 2012, 15:31:14 schrieb Markus Armbruster:
> Cc: Michael Walle
>
> Suppress default floppy and CD-ROM drives for machines lm32-evr,
> lm32-uclinux, milkymist.
>
> Suppress default SD card drive for machines lm32-evr, lm32-uclinux.
>
> Signed-o
Probe for GL and GLX symbols and X11 library. This fixes a build error
where the header files are available but the libraries are not.
Signed-off-by: Michael Walle
---
configure |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/configure b/configure
index 994f731
As the probe now actually checks for the availability of GLX, rename it
accordingly. The only user of this feature is the milkymist-tmu2 model.
Signed-off-by: Michael Walle
---
configure | 30 +++---
hw/lm32/Makefile.objs |2 +-
hw/milkymist-hw.h
Am Freitag 30 November 2012, 23:24:11 schrieben Sie:
> Probe for GL and GLX symbols and X11 library. This fixes a build error
> where the header files are available but the libraries are not.
>
> Signed-off-by: Michael Walle
> ---
> configure |6 +++---
> 1 files change
nly once, with
> target_phys_addr_t unconditionally typedefed to uint64_t.
>
> Signed-off-by: Avi Kivity
> ---
>
> v2: no changes, but copied the maintainers of architectures that will
> see their target_phys_addr_t changed as a result. Please view and/or
> test.
For
e available in the git repository at:
git://git.serverraum.org/git/mw/qemu-lm32.git for-upstream
Michael Walle (3):
lm32: add missing qemu_init_vcpu() call
milkymist_uart: support new core version
milkymist: new interrupt map
hw/milkymist-hw.h|5 +--
hw/milkymist-uar
Am Donnerstag 02 Februar 2012, 22:12:48 schrieb Stefan Weil:
> config.h was missing in cpu.h.
>
> Cc: Michael Walle
> Signed-off-by: Stefan Weil
> ---
> target-lm32/cpu.h |1 +
> target-lm32/helper.c|5 -
> target-lm32/translate.c |8 --
uint32_t tmp = rgb_to_pixel24(r, g, b); \
> > *(to++) = tmp & 0xff; \
> > *(to++) = (tmp >> 8) & 0xff; \
> > *(to++) = (tmp >> 16) & 0xff; \
>
> This change breaks the ot
Signed-off-by: Michael Walle
---
configure |4 +++-
tests/tcg/lm32/Makefile | 13 -
2 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/configure b/configure
index 467e87b..168be85 100755
--- a/configure
+++ b/configure
@@ -3775,7 +3775,8 @@ echo
On Fri, January 13, 2012 19:32, Anthony Liguori wrote:
> diff --git a/qtest.c b/qtest.c
> new file mode 100644
> index 000..f41a9c3
> --- /dev/null
> +++ b/qtest.c
> @@ -0,0 +1,357 @@
> +/*
> + * Test Server
> + *
> + * Copyright IBM, Corp. 2011
> + *
> + * Authors:
> + * Anthony Liguori
>
Once qtest support for target-lm32 arrives, tcg may be disabled.
Signed-off-by: Michael Walle
---
target-lm32/helper.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-lm32/helper.c b/target-lm32/helper.c
index fc0b444..d6f38bf 100644
--- a/target-lm32/helper.c
Am Montag 17 Oktober 2011, 19:46:11 schrieb Stefan Weil:
> So let's start. For any of my contributions, I agree to GPL v2 or later.
> Later generations should have the possibility to replace GPL v2 by
> something which matches future requirements.
I agree to GPL v2 or later.
--
Michael
atticeMico32 CPU.
> + */
> +typedef struct LM32CPU {
> +/*< private >*/
> +CPUState parent_obj;
> +/*< public >*/
> +
> +CPULM32State env;
> +} LM32CPU;
> +
> +static inline LM32CPU *cris_env_get_cpu(CPULM32State *env)
cris? :)
&
Because binutils disassembler is based on libopcode, this is a rewrite from
scratch.
Signed-off-by: Michael Walle
---
Makefile.objs |1 +
configure |4 +
dis-asm.h |3 +
disas.c |6 +
lm32-dis.c| 351 +
5
Once qtest support for target-lm32 arrives, tcg may be disabled.
Signed-off-by: Michael Walle
---
target-lm32/helper.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-lm32/helper.c b/target-lm32/helper.c
index 5db8f8d..78076e4 100644
--- a/target-lm32/helper.c
The new version introduces the following new registers:
- SoC clock frequency: read-only of system clock used on the SoC
- debug scratchpad: 8 bit scratchpad register
- debug write lock: write once register, without any function on QEMU
Signed-off-by: Michael Walle
---
hw/milkymist-sysctl.c
This bug existed since the first commit. Fortunately, the affected
registers have no functionality in qemu. This will only prevent the
following warning:
milkymist_vgafb: write access to unknown register 0x0034
Signed-off-by: Michael Walle
---
hw/milkymist-vgafb.c |5 -
1 files
in the git repository at:
git://github.com/mwalle/qemu.git for-upstream
Michael Walle (5):
tests: fix out-of-tree building for lm32 target
target-lm32: init tcg only if available
milkymist-sysctl: support for new core version
target-lm32: add simple disassembler
milky
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