Re: Question: SiFive U SPI and SD

2020-02-12 Thread Nikita Ermakov
Hello, Bin, Alistair, Thank you for the answers! On Thu, 13 Feb 2020 at 00:16, Alistair Francis wrote: > I had a crack at this awhile ago and you can see the patches here (I > just rebased them): > https://github.com/alistair23/qemu/tree/mainline/alistair/sifive_spi.next > > Debugging failures

Question: SiFive U SPI and SD

2020-02-09 Thread Nikita Ermakov
Hello! I am trying to make an SD card working on the sifive_u (hw/riscv/sifive_u.c) SoC machine. As far as I understand there is no way to connect an SD card to the SoC with cmdline for now. So, I started to dig in to the QEMU internals and especially sifive_u SoC implementation to try to

Re: Debugging heterogeneous SoC

2020-01-28 Thread Nikita Ermakov
On Wed, 29 Jan 2020 at 03:43, Alistair Francis wrote: > Use these commands to attach GDB to QEMU: > > target extended-remote :1234 > add-inferior > inferior 2 > attach 2 > set schedule-multiple > info threads > > Alistair > Thank you! It is worked!

Debugging heterogeneous SoC

2020-01-28 Thread Nikita Ermakov
Hello, I am trying to debug the sifive_u SoC in the QEMU with GDB. SiFive Unleashed contains one E51 core and four U54 cores. In the hw/riscv/sifve_u.c E51 and U54 cores are placed in the different CPU clusters. In the gdbstub.c, it is searches only the first cluster and it always finds cluster