X",
2024-06-11)
Signed-off-by: Paolo Bonzini
---
target/i386/cpu-dump.c | 101 +
1 file changed, 51 insertions(+), 50 deletions(-)
diff --git a/target/i386/cpu-dump.c b/target/i386/cpu-dump.c
index 40697064d92..3bb8e440916 100644
--- a/target/i386/cpu
of the unification, the gen_lea_modrm() name is now free,
so rename gen_load_ea() to gen_lea_modrm(). This is as good a name
and it makes the changes to translate.c easier to review.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 14 ++-
target/i386/tcg
Treat it as a MIPS64 machine.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Signed-off-by: Paolo Bonzini
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index 5ad1674ca5f..8b6a2f16ceb 100755
--- a/configure
+++ b/configure
This reverts commit 433cd6d94a8256af70a5200f236dc8047c3c1468.
The x86-64 instruction set can now be tuned down to x86-64 v1
or i386 Pentium Pro.
Signed-off-by: Paolo Bonzini
---
util/cpuinfo-i386.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/util/cpuinfo-i386.c b
From: Roman Kiryanov
to use the QEMU headers with a C++ compiler.
Signed-off-by: Roman Kiryanov
Link: https://lore.kernel.org/r/20240618224553.878869-1-r...@google.com
Signed-off-by: Paolo Bonzini
---
include/exec/memory.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Group them so that it is easier to figure out which two-byte opcodes to
tackle together.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 31 +++
1 file changed, 31 insertions(+)
diff --git a/target/i386/tcg/decode
Handle it like the other arithmetic cc_ops. This simplifies a
bit the implementation of bit test instructions.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 13 +++--
target/i386/tcg/translate.c | 3 +--
2 files changed, 12 insertions
: decode address before going back to translate.c
* meson: allow configuring the x86-64 baseline
* meson: remove dead optimization option
* exec: small changes to allow compilation with C++ in Android emulator
Paolo Bonzini (21
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 3 +
target/i386/tcg/translate.c | 147 +-
target/i386/tcg/decode-new.c.inc | 40 ++---
target/i386/tcg/emit.c.inc | 149
to be done is removing the
gen_lea_modrm() call.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 2 +
target/i386/tcg/translate.c | 121 +--
target/i386/tcg/decode-new.c.inc | 34 ++---
target/i386/tcg
From: Roman Kiryanov
void* pointer arithmetic is a GCC extentension which could not be
available in other build tools (e.g. C++). This changes removes this
assumption.
Signed-off-by: Roman Kiryanov
Suggested-by: Paolo Bonzini
Link: https://lore.kernel.org/r/20240620201654.598024-1-r
bdrv_file_open and bdrv_open are completely equivalent, they are
never checked except to see which one to invoke. So merge them
into a single one.
Signed-off-by: Paolo Bonzini
---
include/block/block_int-common.h | 3 ---
block.c | 4 +---
block/blkdebug.c
The set of BlockDrivers that have .bdrv_file_open coincides with those
that have .protocol_name and guess what---checking drv->bdrv_file_open
is done to see if the driver is a protocol. So check drv->protocol_name
instead.
Signed-off-by: Paolo Bonzini
---
block.c | 11 +--
.bdrv_needs_filename is only set for drivers that also set bdrv_file_open,
i.e. protocol drivers.
So we can make the assertion always, it will always pass for those drivers
that use bdrv_open.
Signed-off-by: Paolo Bonzini
---
block.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
e creation of a useless
temporary. This can be done in the only place where it matters, which is
gen_op_j_ecx.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 41 +++--
1 file changed, 17 insertions(+), 24 deletions(-)
.
Acked-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
meson.build | 41 ---
meson_options.txt | 3 +++
scripts/meson-buildoptions.sh | 3 +++
3 files changed, 39 insertions(+), 8 deletions(-)
diff --git a/meson.build b
This reverts commit 45ccdbcb24baf99667997fac5cf60318e5e7db51.
The x86-64 instruction set can now be tuned down to x86-64 v1
or i386 Pentium Pro.
Signed-off-by: Paolo Bonzini
---
host/include/i386/host/cpuinfo.h | 1 +
tcg/i386/tcg-target.h| 5 +++--
util/cpuinfo-i386.c
It is already checked before getting there.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 26 --
1 file changed, 8 insertions(+), 18 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
It is the only CCOp, among those that compute ZF from one of the cc_op_*
registers, that uses cpu_cc_src. Do not make it the odd one off,
instead use cpu_cc_dst like the others.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 2 +-
target/i386/tcg
Now all decoding has been done before any code generation.
There is no need anymore to save and restore cc_op* and
pc_save but, for the time being, assert that this is indeed
the case.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 12
When computing the "other" flag (CF for CC_OP_ADOX, OF for CC_OP_ADCX),
take into account that it is already in the right position of cpu_cc_src,
just like for CC_OP_EFLAGS. There is no need to call gen_compute_eflags().
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
-
Suggested-by: Paolo Bonzini
---
v2: renamed from "use char* for pointer arithmetic"
and removed all explicit extra cast with
one typedef in memory.h.
include/exec/memory.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/exec/memory.h b/in
Il gio 20 giu 2024, 20:13 Manos Pitsidianakis <
manos.pitsidiana...@linaro.org> ha scritto:
> On Thu, 20 Jun 2024 16:21, Paolo Bonzini wrote:
> >On 6/19/24 22:13, Manos Pitsidianakis wrote:
> >> Add options for Rust in meson_options.txt, meson.build, configure to
>
On Thu, Jun 20, 2024 at 8:14 PM Richard Henderson
wrote:
>
> On 6/20/24 11:06, Paolo Bonzini wrote:
> > On 6/19/24 00:46, Roman Kiryanov wrote:
> >> void* pointer arithmetic is not in the
> >> C standard. This change allows using
> >> the QEMU headers with
On 6/19/24 00:46, Roman Kiryanov wrote:
void* pointer arithmetic is not in the
C standard. This change allows using
the QEMU headers with a C++ compiler.
Google-Bug-Id: 331190993
Change-Id: I5a064853429f627c17a9213910811dea4ced6174
Signed-off-by: Roman Kiryanov
Would it work instead to
On 6/19/24 00:45, Roman Kiryanov wrote:
to use the QEMU headers with a C++ compiler.
Google-Bug-Id: 331190993
Change-Id: Ic4e49b9c791616bb22c973922772b0494706092c
Signed-off-by: Roman Kiryanov
---
include/exec/memory.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
On Thu, Jun 20, 2024 at 7:22 PM Richard Henderson
wrote:
> > I'm not sure this makes sense. The CONFIG_AVX* options are used only
> > to validate whether the toolchain has support for this. The QEMU
> > code then has a runtime, so it automagically uses AVX2/AVX512
> > if-and-only-if running on a
On Thu, Jun 20, 2024 at 5:01 PM Daniel P. Berrangé wrote:
> > config_host_data.set('CONFIG_AVX2_OPT', get_option('avx2') \
> > + .enable_auto_if(get_option('x86_version') >= '3') \
> >.require(have_cpuid_h, error_message: 'cpuid.h not available, cannot
> > enable AVX2') \
> >
On Thu, Jun 20, 2024 at 4:55 PM Daniel P. Berrangé wrote:
> Any particular reason you chose to list various instructions individually
> rather than just ask GCC for the full ABI ? I'd think all of the above
> condences down to just
To avoid that the default ('1') forces a lower level than the
On 6/19/24 22:13, Manos Pitsidianakis wrote:
Add options for Rust in meson_options.txt, meson.build, configure to
prepare for adding Rust code in the followup commits.
`rust` is a reserved meson name, so we have to use an alternative.
`with_rust` was chosen.
A cargo_wrapper.py script is added
This reverts commit b18236897ca15c3db1506d8edb9a191dfe51429c.
The x86-64 instruction set can now be tuned down to x86-64 v1
or i386 Pentium Pro.
Signed-off-by: Paolo Bonzini
---
host/include/i386/host/cpuinfo.h | 1 +
util/bufferiszero.c | 4 ++--
util/cpuinfo-i386.c
This reverts commit 45ccdbcb24baf99667997fac5cf60318e5e7db51.
The x86-64 instruction set can now be tuned down to x86-64 v1
or i386 Pentium Pro.
Signed-off-by: Paolo Bonzini
---
host/include/i386/host/cpuinfo.h | 1 +
tcg/i386/tcg-target.h| 5 +++--
util/cpuinfo-i386.c
Signed-off-by: Paolo Bonzini
---
meson.build | 2 ++
1 file changed, 2 insertions(+)
diff --git a/meson.build b/meson.build
index 54e6b09f4fb..c5360fbd299 100644
--- a/meson.build
+++ b/meson.build
@@ -2863,6 +2863,7 @@ have_cpuid_h = cc.links('''
config_host_data.set('CONFIG_CPUID_H
Signed-off-by: Paolo Bonzini
---
meson.build | 13 -
meson_options.txt | 2 --
2 files changed, 15 deletions(-)
diff --git a/meson.build b/meson.build
index 6e694ecd9fe..54e6b09f4fb 100644
--- a/meson.build
+++ b/meson.build
@@ -2874,18 +2874,6 @@ config_host_data.set
Signed-off-by: Paolo Bonzini
---
meson.build | 41 ---
meson_options.txt | 3 +++
scripts/meson-buildoptions.sh | 3 +++
3 files changed, 39 insertions(+), 8 deletions(-)
diff --git a/meson.build b/meson.build
index 97e00d6f59b
This reverts commit 433cd6d94a8256af70a5200f236dc8047c3c1468.
The x86-64 instruction set can now be tuned down to x86-64 v1
or i386 Pentium Pro.
Signed-off-by: Paolo Bonzini
---
util/cpuinfo-i386.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/util/cpuinfo-i386.c b
as desired.
Patch "host/i386: assume presence of CMOV" is not reverted because
CMOV appeared first in the Pentium Pro.
Paolo
Paolo Bonzini (6):
Revert "host/i386: assume presence of POPCNT"
Revert "host/i386: assume presence of SSSE3"
Revert "host/i38
On Thu, Jun 20, 2024 at 1:10 PM Alex Bennée wrote:
> > +# FIXME: These are the latest stable versions, refine to actual minimum
> > ones.
> > +msrv = {
> > + 'rustc': '1.79.0',
> > + 'cargo': '1.79.0',
> > + 'bindgen': '0.69.4',
> > +}
>
> So for Debian Bookworm this comes out as:
>
> msrv
ct.
Sneak in a couple cleanups for CC_OP_POPCNT. They don't really make
the generated code any more efficient, but they simplify a bit the
logic for the BT/BTS/BTR/BTC flags.
Supersedes: <20240608084113.2770363-1-pbonz...@redhat.com>
Paolo Bonzini (10):
target/i386: use cpu_cc_dst
It is already checked before getting there.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 26 --
1 file changed, 8 insertions(+), 18 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
Handle it like the other arithmetic cc_ops. This simplifies a
bit the implementation of bit test instructions.
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 13 +++--
target/i386/tcg/translate.c | 3 +--
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git
of the unification, the gen_lea_modrm() name is now free,
so rename gen_load_ea() to gen_lea_modrm(). This is as good a name
and it makes the changes to translate.c easier to review.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 14 ++-
target/i386/tcg
e creation of a useless
temporary. This can be done in the only place where it matters, which is
gen_op_j_ecx.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 41 +++--
1 file changed, 17 insertions(+), 24 deletions(-)
Now all decoding has been done before any code generation.
There is no need anymore to save and restore cc_op* and
pc_save but, for the time being, assert that this is indeed
the case.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 12
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 3 +
target/i386/tcg/translate.c | 147 +-
target/i386/tcg/decode-new.c.inc | 40 ++---
target/i386/tcg/emit.c.inc | 149 ++-
4 files changed, 181
When computing the "other" flag (CF for CC_OP_ADOX, OF for CC_OP_ADCX),
take into account that it is already in the right position of cpu_cc_src,
just like for CC_OP_EFLAGS. There is no need to call gen_compute_eflags().
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c |
Group them so that it is easier to figure out which two-byte opcodes to
tackle together.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 31 +++
1 file changed, 31 insertions(+)
diff --git a/target/i386/tcg/decode
to be done is removing the
gen_lea_modrm() call.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 2 +
target/i386/tcg/translate.c | 121 +--
target/i386/tcg/decode-new.c.inc | 34 ++---
target/i386/tcg/emit.c.inc | 96
It is the only POPCNT that computes ZF from one of the cc_op_* registers,
but it uses cpu_cc_src instead of cpu_cc_dst like the others. Do not
make it the odd one off.
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 2 +-
target/i386/tcg/cc_helper.c | 2 +-
target/i386/tcg
Il mer 19 giu 2024, 18:54 Daniel P. Berrangé ha
scritto:
> >build/
> > rust/
> >.cargo/
> > config.toml # generated by configure or meson.build
> >Cargo.toml # workspace generated by configure or meson.build
> >Cargo.lock # can be either
On 6/19/24 07:34, Richard Henderson wrote:
First silly question: how much of this is boiler plate that gets moved
the moment that the second rust subdirectory is added?
If my suggestion at
https://lore.kernel.org/qemu-devel/CABgObfaP7DRD8dbSKNmUzhZNyxeHWO0MztaW3_EFYt=vf6s...@mail.gmail.com/
On Wed, Jun 19, 2024 at 2:49 PM Thomas Huth wrote:
>
> On 19/06/2024 13.46, Paolo Bonzini wrote:
> > Treat it as a MIPS64 machine.
>
> Where did you encounter it?
It is handled by "config.sub" (the GNU script to canonicalize target
triples). and is also in the lis
Treat it as a MIPS64 machine.
Signed-off-by: Paolo Bonzini
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index d0703ea279d..3669eec86e5 100755
--- a/configure
+++ b/configure
@@ -452,7 +452,7 @@ case "$cpu" in
linux_arch
On Wed, Jun 12, 2024 at 3:13 PM Philippe Mathieu-Daudé
wrote:
> Building qemu-system-mips configured with --without-default-devices:
>
> Undefined symbols for architecture arm64:
>"_qemu_semihosting_console_write", referenced from:
>_mips_semihosting in
s390x: Use s390_skeys_get|set() helper
Reviewed-by: Paolo Bonzini
include/hw/s390x/storage-keys.h | 10 ++
hw/s390x/s390-skeys.c | 27 +++
target/s390x/mmu_helper.c | 11 ++-
target/s390x/tcg/mem_helper.c | 16
hw/s
On Tue, Jun 18, 2024 at 11:13 AM Daniel P. Berrangé wrote:
> I wonder if starting with a device implementation is perhaps the
> wrong idea, in terms of a practical yet simple first step.
>
> As devices go, the pl011 device is simple, but compared to other
> QOM impls in QEMU, devices are still
Il lun 17 giu 2024, 23:45 Manos Pitsidianakis
ha scritto:
> Secondly, are you implying that these callbacks are not operated under
> the BQL?
No, I'm implying that if you had the following nested calls:
unsafe read callback receives the opaque point
-> cast to to call safe read callback
On Tue, Jun 18, 2024 at 1:33 AM Pierrick Bouvier
wrote:
>
> On 6/17/24 14:04, Manos Pitsidianakis wrote:
> > On Mon, 17 Jun 2024 17:32, Paolo Bonzini wrote:
> >> On Mon, Jun 17, 2024 at 4:04 PM Manos Pitsidianakis
> >> wrote:
> >>> I respectfully
Just one somewhat larger request, otherwise just a collection of ideas.
On Tue, Jun 11, 2024 at 12:34 PM Manos Pitsidianakis
wrote:
> diff --git a/rust/meson.build b/rust/meson.build
> new file mode 100644
> index 00..e9660a3045
> --- /dev/null
> +++ b/rust/meson.build
> @@ -0,0 +1,91 @@
On Mon, Jun 17, 2024 at 6:12 PM Richard Henderson
wrote:
>
> Hi Paolo,
>
> Thanks for offering to do the work to fix the memory access issues
> identified by Robert.
>
> Here is a code dump from this weekend that I noodled with -- it is
> prep work only, not intending to change any semantics, but
On Mon, Jun 17, 2024 at 4:04 PM Manos Pitsidianakis
wrote:
> I respectfully disagree and recommend taking another look at the code.
>
> The device actually performs all logic in non-unsafe methods and is
> typed instead of operating on raw integers as fields/state. The C stuff
> is the FFI
Il lun 17 giu 2024, 10:59 Manos Pitsidianakis <
manos.pitsidiana...@linaro.org> ha scritto:
> >qdev_define_type!(c"test-device", TestDevice);
> >impl ObjectImpl for TestDevice {}
> >impl DeviceImpl for TestDevice {}
> >
> >fn main() {
> >let d = TestDevice::new();
> >d.cold_reset();
> >}
On Mon, Jun 17, 2024 at 12:45 AM Robert Henry wrote:
> I do not think I will have the time or focus to work on improving this patch
> this summer, as I will retire in 2 weeks and need to make a clean break to
> focus on other things (health, for one) for a while.
> If anyone wants to put into
Complete implementation of C and D operand types, then the operations
are just MOVs.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 1 +
target/i386/tcg/translate.c | 79
target/i386/tcg/decode-new.c.inc | 61
n when sev_common is null
Paolo Bonzini (20):
target/i386: remove CPUX86State argument from generator functions
target/i386: rewrite flags writeback for ADCX/ADOX
target/i386: put BLS* input in T1, use generic flag writeback
target/i386: change X86_ENTRYr to use T0
targe
On Fri, Jun 14, 2024 at 9:04 AM Manos Pitsidianakis
wrote:
>
> On Thu, 13 Jun 2024 23:57, Paolo Bonzini wrote:
> >On Thu, Jun 13, 2024 at 11:16 AM Daniel P. Berrangé
> >wrote:
> >> I guess there's a balance to be had somewhere on the spectrum between doing
> &
On Thu, Jun 13, 2024 at 11:16 AM Daniel P. Berrangé wrote:
> I guess there's a balance to be had somewhere on the spectrum between doing
> everything against the raw C binding, vs everything against a perfectly
> idiomatic Rust API wrapping the C bniding. The latter might be the ideal,
> but from
On Thu, Jun 13, 2024 at 6:06 PM Zhao Liu wrote:
> I think deeper and higher level bindings will have more opens and will
> likely require more discussion and exploration. So could we explore this
> direction on another reference Rust device?
>
> I also think there won’t be too many Rust devices
Il gio 13 giu 2024, 09:13 Daniel P. Berrangé ha
scritto:
> On Wed, Jun 12, 2024 at 11:27:04PM +0200, Paolo Bonzini wrote:
> > Il mer 12 giu 2024, 22:58 Manos Pitsidianakis <
> > manos.pitsidiana...@linaro.org> ha scritto:
> >
> > > In any case, it is ou
Il mer 12 giu 2024, 22:58 Manos Pitsidianakis <
manos.pitsidiana...@linaro.org> ha scritto:
> In any case, it is out of scope for this RFC. Introducing wrappers would
> be a gradual process.
>
Sure, how would you feel about such bindings being developed on list, and
maintained in a (somewhat)
On Wed, Jun 12, 2024 at 7:00 PM Daniel P. Berrangé wrote:
> > I guess that, because these helpers are called by TCG, you wouldn't
> > pay the price of the indirect call. However, adding all this
> > infrastructure for 13-15 year old CPUs is not very enthralling.
>
> Rather than re-introducing a
On Wed, Jun 12, 2024 at 5:09 PM Daniel P. Berrangé wrote:
> This might suggest we could put a runtime feature check in main(),
> print a warning and then exit(1), however, QEMU has alot of code
> that is triggered from ELF constructors. If we're building the
> entire of QEMU codebase with extra
On Wed, Jun 12, 2024 at 4:42 PM Manos Pitsidianakis
wrote:
> There was consensus in the community call that we won't be writing Rust
> APIs for internal C QEMU interfaces; or at least, that's not the goal
I disagree with that. We need _some_ kind of bindings, otherwise we
have too much unsafe
On Wed, Jun 12, 2024 at 3:34 PM Alexander Monakov wrote:
> On Wed, 12 Jun 2024, Paolo Bonzini wrote:
> > > I found out from the mailing list. My Core2-based desktop would be
> > > affected.
> >
> > Do you run QEMU on it? With KVM or TCG?
>
> Excuse
I think this is extremely useful to show where we could go in the task
of creating more idiomatic bindings.
On Tue, Jun 11, 2024 at 12:34 PM Manos Pitsidianakis
wrote:
> +fn main() {
> +println!("cargo::rerun-if-env-changed=MESON_BUILD_DIR");
> +
On Wed, Jun 12, 2024 at 2:11 PM Alexander Monakov wrote:
>
>
> On Wed, 12 Jun 2024, Paolo Bonzini wrote:
>
> > Ahah, nice. :) I'm pretty sure that, when I tested "pf =
> > (__builtin_popcount(x) & 1) * 4;", it was generating a call to
> > __builtin_popc
On Wed, Jun 12, 2024 at 1:46 PM Alexander Monakov wrote:
>
>
> On Wed, 12 Jun 2024, Paolo Bonzini wrote:
>
> > On Wed, Jun 12, 2024 at 1:19 PM Alexander Monakov
> > wrote:
> > > On Wed, 12 Jun 2024, Paolo Bonzini wrote:
> > > > I didn't do this
On Wed, Jun 12, 2024 at 1:38 PM Daniel P. Berrangé wrote:
> This isn't anything to do with the distro installer. The use case is that
> the distro wants all its software to be able to run on the x86_64 baseline
> it has chosen to build with.
Sure, and they can patch the packages if their wish is
On Wed, Jun 12, 2024 at 1:19 PM Alexander Monakov wrote:
> On Wed, 12 Jun 2024, Paolo Bonzini wrote:
> > I didn't do this because of RHEL9, I did it because it's silly that
> > QEMU cannot use POPCNT and has to waste 2% of the L1 d-cache to
> > compute the x86 pa
On Wed, Jun 12, 2024 at 1:04 PM Daniel P. Berrangé wrote:
>
> On Wed, Jun 12, 2024 at 01:55:20PM +0300, Alexander Monakov wrote:
> > Hello,
> >
> > I'm sending straightforward reverts to recent patches that bumped minimum
> > required x86 instruction set to SSE4.2. The older chips did not stop
>
This is already partly implemented due to VLDMXCSR and VSTMXCSR; finish
the job.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 7 ++
target/i386/tcg/translate.c | 188 ---
target/i386/tcg/decode-new.c.inc
These have very simple generators and no need for complex group
decoding. Apart from LAR/LSL which are simplified to use
gen_op_deposit_reg_v and movcond, the code is generally lifted
from translate.c into the generators.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target
Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/emit.c.inc | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index 92635f53cf4..156ea282af4 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/ta
Complete implementation of C and D operand types, then the operations
are just MOVs.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 79
target/i386/tcg/decode-new.c.inc | 53 +++--
target/i386
This makes for easier cpu_cc_* setup, and not using set_cc_op()
should come in handy if QEMU ever implements APX.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 4 ++--
target/i386/tcg/emit.c.inc | 24 +---
2 files
tions are both false for CC_OP_EFLAGS, both true for CC_OP_ADCOX,
and one each true for CC_OP_ADCX/ADOX.
The new logic also makes it easy to drop usage of tmp0.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 9 +++---
target/i386
fix it, inflight emulated SCSI request be migrated during live migration,
similar to the DMA SCSI request.
Signed-off-by: Hyman Huang
Message-ID:
<878c8f093f3fc2f584b5c31cb2490d9f6a12131a.1716531409.git.yong.hu...@smartx.com>
[Do not bump migration version, introduce compat property instead.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 48
target/i386/tcg/emit.c.inc | 2 +-
2 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index f9d3e2577b2
CPUX86State argument would only be used to fetch bytes, but that has to be
done before the generator function is called. So remove it, and all
temptation together with it.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 2 +-
target/i386
I am not sure why I made it use T1. It is a bit more symmetric with
respect to X86_ENTRYwr (which uses T0 for the "w"ritten operand
and T1 for the "r"ead operand), but it is also less flexible because it
does not let you apply zextT0/sextT0.
Reviewed-by: Richard Henderson
Fix crash for VM configured with USB CDROM after live migration
Pankaj Gupta (3):
i386/sev: fix unreachable code coverity issue
i386/sev: Move SEV_COMMON null check before dereferencing
i386/sev: Return when sev_common is null
Paolo Bonzini (20):
target/i386: remove CPUX86St
There can be other confidential computing classes that are not derived
from sev-common. Avoid aborting when encountering them.
Signed-off-by: Paolo Bonzini
---
target/i386/sev.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/i386/sev.c b/target/i386/sev.c
index
This is a bit more generic, as it can be applied to MPX as well.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 5 +++--
target/i386/tcg/decode-new.c.inc | 12
target/i386/tcg/emit.c.inc | 3 ++-
3 files changed, 9
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 79
target/i386/tcg/decode-new.c.inc | 3 +-
target/i386/tcg/emit.c.inc | 51 +
3 files changed, 53 insertions(+), 80 deletions(-)
diff
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 1 +
target/i386/tcg/decode-new.c.inc | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/i386/tcg/decode-new.h b/target/i386/tcg/decode-new.h
index 46a96b220d0
e used by opcodes in the 0F 3A table
works fine.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 84 +---
target/i386/tcg/decode-new.c.inc | 8 ++-
target/i386/tcg/emit.c.inc | 42
3 files chang
Use gen_ld_modrm/gen_st_modrm, moving them and gen_shift_flags to the
caller. This way, gen_shiftd_rm_T1 becomes something that the new
decoder can call.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 55 ++---
1
Aesthetic change only.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 93
1 file changed, 46 insertions(+), 47 deletions(-)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 1 +
target/i386/tcg/translate.c | 74
target/i386/tcg/decode-new.c.inc | 52 +++-
target/i386/tcg/emit.c.inc | 82
SYSENTER is allowed in VM86 mode, but not in real mode. Split the check
so that PE and !VM86 are covered by separate bits.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 8 ++--
target/i386/tcg/decode-new.c.inc | 9 +++--
2 files
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