verted to something which KVM thinks must be. IIRC it is 16 CPUs per cluster,
starting from 0:0. So, currently you can do whatever you want only for TCG.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
ld be nice if we upstream this
too. I will post my patches as RFC as soon as master gets updated. RFC only
because kernel API isn't there yet.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
Hello!
Thank you very much for your support and cooperation. I am back from my
vacation and continuing my
work on live migration. Actually i already have working code, but need to
settle down kernel API
first.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center
Hello everybody! Just want to inform that i'm leaving for 2 weeks long
vacation, so i won't respond
during this time.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: qemu-devel-bounces+p.fedin=samsun
happens
inside arm_gic_common_realize().
ITS region is added to the memory map too, however currently it not used,
just reserved.
Signed-off-by: Pavel Fedin
Tested-by: Ashok kumar
---
hw/arm/virt-acpi-build.c | 54 ++---
hw/arm/virt.c| 124
ble GICs, but it would contain
only three variables (dev_fd, cpu_num and irq_num), and accessing them through
the rest of the code would be again tedious (either ugly casts or qemu-style
separate object pointer). So i disliked it too.
Signed-off-by: Pavel Fedin
Tested-by: Ashok kumar
---
hw/in
tible with GICv2 one. This is
done in order to simplify integration with existing code.
Signed-off-by: Shlomo Pongratz
Signed-off-by: Pavel Fedin
Reviewed-by: Eric Auger
Tested-by: Ashok kumar
Reviewed-by: Peter Maydell
---
hw/intc/Makefile.objs | 1 +
hw/intc/arm_gicv3_com
This is the initial version of KVM-accelerated GICv3 support.
State load and save are not yet supported, live migration is
not possible.
In order to get correct class name in a simpler way, gicv3_class_name()
function is implemented, similar to gic_class_name().
Signed-off-by: Pavel Fedin
This allows us to use different GIC types from v2. There are no kernels
which could advertise KVM_CAP_DEVICE_CTRL without the actual ability to
create GIC with it.
GIC version probe code moved to kvm_arm_vgic_probe() which will be used
later.
Signed-off-by: Pavel Fedin
Reviewed-by: Eric Auger
o number 3.
- Removed reserved regions for MBI and ITS (except for 'virt' machine
memory map). These should go to separate classes when implemented.
- Improved commit messages
- vGIC patches restructured
- Use 'gicversion' option instead of virt-v3 mac
er. I
> assume the idea is to take hw/arm/pxa2xx.c as an example.
Ok, well, my patch was just a suggestion. If you want to do in in other way, i
do not insist.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
upport. But need to test it
first.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
This allows us to use different GIC types from v2. There are no kernels
which could advertise KVM_CAP_DEVICE_CTRL without the actual ability to
create GIC with it.
GIC version probe code moved to kvm_arm_vgic_probe() which will be used
later.
Signed-off-by: Pavel Fedin
Reviewed-by: Eric Auger
This is the initial version of KVM-accelerated GICv3 support.
State load and save are not yet supported, live migration is
not possible.
In order to get correct class name in a simpler way, gicv3_class_name()
function is implemented, similar to gic_class_name().
Signed-off-by: Pavel Fedin
tible with GICv2 one. This is
done in order to simplify integration with existing code.
Signed-off-by: Shlomo Pongratz
Signed-off-by: Pavel Fedin
Reviewed-by: Eric Auger
Tested-by: Ashok kumar
Reviewed-by: Peter Maydell
---
hw/intc/Makefile.objs | 1 +
hw/intc/arm_gicv3_com
happens
inside arm_gic_common_realize().
ITS region is added to the memory map too, however currently it not used,
just reserved.
Signed-off-by: Pavel Fedin
Tested-by: Ashok kumar
---
dtc | 2 +-
hw/arm/virt-acpi-build.c | 54 ++---
hw/arm
x27; machine
memory map). These should go to separate classes when implemented.
- Improved commit messages
- vGIC patches restructured
- Use 'gicversion' option instead of virt-v3 machine
Pavel Fedin (4):
intc/gic: Extract some reusable vGIC code
arm_kvm: Do not assume particul
ble GICs, but it would contain
only three variables (dev_fd, cpu_num and irq_num), and accessing them through
the rest of the code would be again tedious (either ugly casts or qemu-style
separate object pointer). So i disliked it too.
Signed-off-by: Pavel Fedin
Tested-by: Ashok kumar
---
hw/in
DT?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
LPIs. It can be interesting for
any of you if you want to continue this work. It is very preliminary but i got
it to the point where it injects an LPI into the GIC. I wrote it when there was
no in-kernel ITS patches, i supposed to implement raw LPIs in kernel and ITS in
userspace, similar to GIC
I have mistaken 4K for page. Just ignore this :)
My manual is IHI0069A "ARM® Generic Interrupt Controller Architecture
Specification GIC architecture version 3.0 and version 4.0". And i'm really not
very careful in reading it...
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
ndamentally bad here?
Well, if you just don't want, then you don't want, i'm fine with this. My
arguments end here.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
Hello! Long time has passed, i do not see any movements. Was it forgotten?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: qemu-devel-bounces+p.fedin=samsung@nongnu.org [mailto:qemu-devel-
> bounces+p.fedi
day...
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
has an offset of 0x1, and it's 17 pages instead of 2.
Do we want to waste our precious address space?
But, well, i have calculated that we would have 124 maximum CPUs instead of
126. So - your final word on this?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
At least with KVM, currently there's no reason why qemu would not be
capable of handling Aff3 != 0. This commit fixes up FDT creation in such
a case.
Signed-off-by: Pavel Fedin
---
hw/arm/virt.c | 32 ++--
1 file changed, 30 insertions(+), 2 deletions(-)
diff
e any assumptions about
particular affinity layout in non-TCG code, i don't see why this would not
work with KVM.
In order to avoid using magic numbers i refactored out some useful
affinity-related constants.
Pavel Fedin (2):
target-arm: Refactor CPU affinity handling
arm/virt: Add full-sized CP
Introduces reusable definitions for CPU affinity masks/shifts and gets rid
of hardcoded magic numbers.
Signed-off-by: Pavel Fedin
---
target-arm/cpu-qom.h | 12
target-arm/cpu.c | 2 +-
target-arm/kvm32.c | 3 +--
target-arm/kvm64.c | 3 +--
4 files changed, 15
ut ---
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
se
> I'll have to drop it from target-arm again.
Ok, will test it hopefully today.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
t's the same amount of arithmetic, actually. What would you prefer?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
at the moment.
> Anyway, applied to target-arm.next.
Thank you very much.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
ersions, but you disliked it because
inline functions would require dev_fd instead of 's', because 's' is different
in GICv2 and GICv3. Macro approach allowed to work around this difference. Or
do you mean you strictly don't want them to be reusable?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
version of GICv3.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: qemu-devel-bounces+p.fedin=samsung@nongnu.org [mailto:qemu-devel-
> bounces+p.fedin=samsung@nongnu.org] On Behalf Of Pavel Fedin
> Sent: Tue
Knock-knock!
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: qemu-devel-bounces+p.fedin=samsung@nongnu.org [mailto:qemu-devel-
> bounces+p.fedin=samsung@nongnu.org] On Behalf Of Pavel Fedin
> Sen
ly casts or qemu-style
separate object pointer). So i disliked it too.
Signed-off-by: Pavel Fedin
Tested-by: Ashok kumar
---
hw/intc/arm_gic_kvm.c | 84 ++-
hw/intc/vgic_common.h | 49 ++
include/sysemu/kvm.h | 26 +
happens
inside arm_gic_common_realize().
ITS regions are added to the memory map too, however currently they
are not used, just reserved.
Signed-off-by: Pavel Fedin
Tested-by: Ashok kumar
---
hw/arm/virt.c | 118 --
include/hw/arm/virt.h
This is the initial version of KVM-accelerated GICv3 support.
State load and save are not yet supported, live migration is
not possible.
In order to get correct class name in a simpler way, gicv3_class_name()
function is implemented, similar to gic_class_name().
Signed-off-by: Pavel Fedin
This allows to use different GIC types from v2. There are no kernels which
could advertise KVM_CAP_DEVICE_CTRL without the actual ability to create
GIC with it.
Signed-off-by: Pavel Fedin
Reviewed-by: Eric Auger
Tested-by: Ashok kumar
---
target-arm/kvm.c | 10 +-
1 file changed, 1
rt' machine
memory map). These should go to separate classes when implemented.
- Improved commit messages
- vGIC patches restructured
- Use 'gicversion' option instead of virt-v3 machine
Pavel Fedin (4):
intc/gic: Extract some reusable vGIC code
arm_kvm: Do not assume particu
tible with GICv2 one. This is
done in order to simplify integration with existing code.
Signed-off-by: Shlomo Pongratz
Signed-off-by: Pavel Fedin
Reviewed-by: Eric Auger
Tested-by: Ashok kumar
---
hw/intc/Makefile.objs | 1 +
hw/intc/arm_gicv3_common.c
t;virt" machine for being too flexible...
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
implementation.
v1 => v2:
- Set link to nvic after it has been initialized
- Changed object type to "sys-bus-device" because GICv2 and GICv3 do not
share common ancestors above that.
Pavel Fedin (2):
cpu_arm: Rename 'nvic' to 'irqchip'
armv7m: Use irqchip prop
This name seems to be more appropriate because ARMv8 also needs a link
with GICv3 for CPU interface to work
Signed-off-by: Pavel Fedin
---
hw/arm/armv7m.c | 2 +-
target-arm/cpu.h| 5 -
target-arm/helper.c | 12 ++--
3 files changed, 11 insertions(+), 8 deletions(-)
diff
Implement property instead of direct assignment of cpu->env.irqchip
Signed-off-by: Pavel Fedin
---
hw/arm/armv7m.c | 5 ++---
target-arm/cpu.c | 6 ++
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 19742b7..8905e97 100644
--- a/hw/
introduced. It
defaults to on on, but can be manually set to off in order to be able to run
those old 32-bit guests.
Signed-off-by: Pavel Fedin
---
v7 => v8:
- Split up between region and FDT creation
- Renamed alias variable to high_mmio_alias
v6 => v7:
- Renamed alias variable to mmio6
introduced. It
defaults to on on, but can be manually set to off in order to be able to run
those old 32-bit guests.
Signed-off-by: Pavel Fedin
---
v6 => v7:
- Renamed alias variable to mmio64_alias
v5 => v6:
- Specify correct FDT_PCI_RANGE_MMIO_64BIT type for the region, the bug
was disco
ARMv7m CPU needs a link to NVIC instance for processing interrupts. Similarly
ARMv8 needs a link to GICv3 for its CPU interface.
This series builds upon existing mechanism for linking irqchip and
CPU, bringing the code up to date and making it reusable.
Pavel Fedin (2):
cpu_arm: Rename '
rywhere.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
This name seems to be more appropriate because ARMv8 also needs a link
with GICv3 for its CPU interface.
Signed-off-by: Pavel Fedin
---
hw/arm/armv7m.c | 2 +-
target-arm/cpu.h| 5 -
target-arm/helper.c | 12 ++--
3 files changed, 11 insertions(+), 8 deletions(-)
diff
Implement property instead of direct assignment of cpu->env.irqchip
Signed-off-by: Pavel Fedin
---
hw/arm/armv7m.c | 5 ++---
target-arm/cpu.c | 6 ++
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 19742b7..782fd3e 100644
--- a/hw/
Extract common code for virtio-mmio creation and FDT node addition and
put it into reusable functions. Use new functions in vexpress and virt
machines.
Signed-off-by: Pavel Fedin
---
hw/arm/sysbus-fdt.c | 51 +++
hw/arm/vexpress.c | 55
PING
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: qemu-devel-bounces+p.fedin=samsung@nongnu.org [mailto:qemu-devel-
> bounces+p.fedin=samsung@nongnu.org] On Behalf Of Pavel Fedin
> Sent: Wednesda
This is the initial version of KVM-accelerated GICv3 support.
State load and save are not yet supported, live migration is
not possible.
In order to get correct class name in a simpler way, gicv3_class_name()
function is implemented, similar to gic_class_name().
Signed-off-by: Pavel Fedin
tible with GICv2 one. This is
done in order to simplify integration with existing code.
Signed-off-by: Shlomo Pongratz
Signed-off-by: Pavel Fedin
Reviewed-by: Eric Auger
---
hw/intc/Makefile.objs | 1 +
hw/intc/arm_gicv3_common.c
disliked it too.
Signed-off-by: Pavel Fedin
---
hw/intc/arm_gic_kvm.c | 46 +++---
hw/intc/vgic_common.h | 55 +++
include/sysemu/kvm.h | 12 +++
kvm-all.c | 11 +++
4 files change
happens
inside arm_gic_common_realize().
ITS regions are added to the memory map too, however currently they
are not used, just reserved.
Signed-off-by: Pavel Fedin
---
hw/arm/virt.c | 111 +-
include/hw/arm/fdt.h | 2 +-
include/hw/arm
This allows to use different GIC types from v2. There are no kernels which
could advertise KVM_CAP_DEVICE_CTRL without the actual ability to create
GIC with it.
Signed-off-by: Pavel Fedin
Reviewed-by: Eric Auger
---
target-arm/kvm.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions
r MBI and ITS (except for 'virt' machine
memory map). These should go to separate classes when implemented.
- Improved commit messages
- vGIC patches restructured
- Use 'gicversion' option instead of virt-v3 machine
Pavel Fedin (4):
intc/gic: Extract some reusable v
Hello!
> > Signed-off-by: Pavel Fedin
> in v8 you got Peter's R-b. Did you omit it willingly or did you make any
> changes since that. A changelog would ease the review in any case.
Oops, i just forgot it. Thanks. Will fixup your notes and add it in v11.
Kind regards,
P
t to keep a single style for both.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
tible with GICv2 one. This is
done in order to simplify integration with existing code.
Signed-off-by: Shlomo Pongratz
Signed-off-by: Pavel Fedin
---
hw/intc/Makefile.objs | 1 +
hw/intc/arm_gicv3_common.c | 140 +
include/hw
happens
inside arm_gic_common_realize().
ITS regions are added to the memory map too, however currently they
are not used, just reserved.
Signed-off-by: Pavel Fedin
---
hw/arm/virt.c | 111 +-
include/hw/arm/fdt.h | 2 +-
include/hw/arm
This allows to use different GIC types from v2. There are no kernels which
could advertise KVM_CAP_DEVICE_CTRL without the actual ability to create
GIC with it.
Signed-off-by: Pavel Fedin
---
target-arm/kvm.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/target
it does
not add any meaning to number 3.
- Removed reserved regions for MBI and ITS (except for 'virt' machine
memory map). These should go to separate classes when implemented.
- Improved commit messages
- vGIC patches restructured
- Use 'gicversion' option instead of
he code would be again tedious (either ugly casts or qemu-style
separate object pointer). So i disliked it too.
Signed-off-by: Pavel Fedin
---
hw/intc/arm_gic_kvm.c | 42 +--
hw/intc/vgic_common.h | 55 +++
2 f
This is the initial version of KVM-accelerated GICv3 support.
State load and save are not yet supported, live migration is
not possible.
In order to get correct class name in a simpler way, gicv3_class_name()
function is implemented, similar to gic_class_name().
Signed-off-by: Pavel Fedin
inks CRT's stderr with Windows
console stream. It is a well known hack.
More info here:
http://stackoverflow.com/questions/9020790/using-stdin-with-an-allocconsole
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
tible with GICv2 one. This is
done in order to simplify integration with existing code.
Signed-off-by: Shlomo Pongratz
Signed-off-by: Pavel Fedin
---
hw/intc/Makefile.objs | 1 +
hw/intc/arm_gicv3_common.c | 140 +
include/hw
he code would be again tedious (either ugly casts or qemu-style
separate object pointer). So i disliked it too.
Signed-off-by: Pavel Fedin
---
hw/intc/arm_gic_kvm.c | 40 -
hw/intc/vgic_common.h | 55 +++
2 f
AL_MSI ioctl. Therefore two
regions are more convenient to use.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
This is the initial version of KVM-accelerated GICv3 support.
State load and save are not yet supported, live migration is
not possible.
In order to get correct class name in a simpler way, gicv3_class_name()
function is implemented, similar to gic_class_name().
Signed-off-by: Pavel Fedin
happens
inside arm_gic_common_realize().
ITS regions are added to the memory map too, however currently they
are not used, just reserved.
Signed-off-by: Pavel Fedin
---
hw/arm/virt.c | 111 +-
include/hw/arm/fdt.h | 2 +-
include/hw/arm
This allows to use different GIC types from v2. There are no kernels which
could advertise KVM_CAP_DEVICE_CTRL without the actual ability to create
GIC with it.
Signed-off-by: Pavel Fedin
---
target-arm/kvm.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/target
separate classes when implemented.
- Improved commit messages
- vGIC patches restructured
- Use 'gicversion' option instead of virt-v3 machine
Pavel Fedin (4):
intc/gic: Extract some reusable vGIC code
arm_kvm: Do not assume particular GIC type in
kvm_arch_irqchip_create()
hw/intc
ly try to create GICv3. If it fails for some reason, we will see
error message anyway. So would it be OK just not to touch
kvm_arch_irqchip_create() at all?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
introduced. It
defaults to on on, but can be manually set to off in order to be able to run
those old 32-bit guests.
Signed-off-by: Pavel Fedin
---
v5 => v6:
- Specify correct FDT_PCI_RANGE_MMIO_64BIT type for the region, the bug
was discovered by running UEFI
v4 => v5:
- Removed machine-de
Hello!
> I still think this is the wrong approach -- see my remarks
> in the previous round of patch review.
Christoffer did not reply anything to your question back then. So - what to
do? Probe for all possible GICs? Remove the probe at all?
Kind regards,
Pavel Fedin
Expert Engineer
S
gth state
structures supported?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
3 arch
manual from beginning to end. Do you want to tell me that GICv3 architecture
puts no limit at all on CPU number, so i could have 128, 1024, 134435242, etc ?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
it on NCPUs.
These arrays are just placeholders, so we reserve the maximum possible space
for them. When we initialize the actual objects, of course we use only
'num_cpu' slots in each of the array.
sizeof(qemu_irq) is rather small (IIRC it's a pointer accompanied by number).
D
mapping
> from multiple different sets of interrupts into a single
> integer space.
No no, not now. I believe this would require lots if changes in all machne
models, i'm not ready for this...
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
he code would be again tedious (either ugly casts or qemu-style
separate object pointer). So i disliked it too.
Signed-off-by: Pavel Fedin
---
hw/intc/arm_gic_kvm.c | 84 ---
hw/intc/vgic_common.h | 43 ++
2 files changed, 82 i
Get/put routines are missing, live migration is not possible.
Signed-off-by: Pavel Fedin
---
hw/intc/Makefile.objs | 1 +
hw/intc/arm_gicv3_kvm.c | 143
2 files changed, 144 insertions(+)
create mode 100644 hw/intc/arm_gicv3_kvm.c
diff
potential future uses by other architectures.
Signed-off-by: Pavel Fedin
---
hw/arm/vexpress.c | 3 +++
hw/arm/virt.c | 3 +++
include/hw/boards.h | 1 +
include/sysemu/kvm.h| 3 ++-
kvm-all.c | 2 +-
stubs/kvm.c | 2 +-
target-arm/kvm
Set kernel_irqchip_type according to value of the option and pass it
around where necessary. Instantiate devices and fdt nodes according
to the choice.
max_cpus for virt machine increased to 64. GICv2 compatibility check
happens inside arm_gic_common_realize().
Signed-off-by: Pavel Fedin
- vGIC patches restructured
- Use 'gicversion' option instead of virt-v3 machine
Pavel Fedin (4):
Extract some reusable vGIC code
Introduce irqchip type specification for KVM
Initial implementation of vGICv3
Add gicversion option to virt machine
Shlomo Pongratz
ff-by: Pavel Fedin
---
hw/intc/Makefile.objs | 1 +
hw/intc/arm_gicv3_common.c | 147 +
include/hw/intc/arm_gicv3_common.h | 70 ++
3 files changed, 218 insertions(+)
create mode 100644 hw/intc/arm_gicv3_common.c
create
This small inline returns correct GIC class name depending on whether we
use KVM acceleration or not. Avoids duplicating the condition everywhere.
Signed-off-by: Pavel Fedin
Reviewed-by: Peter Maydell
---
hw/arm/virt.c| 7 +++
hw/cpu/a15mpcore.c | 8 ++--
target-arm/kvm_arm.h
Extracted duplicated initialization code from SW-emulated and KVM GIC
implementations and put into gic_init_irqs_and_mmio()
Signed-off-by: Pavel Fedin
---
hw/intc/arm_gic.c| 64
hw/intc/arm_gic_common.c | 41
Just speficying ops = NULL in some cases can be more convenient than having
two functions.
Signed-off-by: Pavel Fedin
Acked-by: Paolo Bonzini
Reviewed-by: Peter Maydell
---
include/exec/memory.h | 14 +++---
memory.c | 10 +-
2 files changed, 12 insertions(+), 12
contains no functional enhancements. Only cleanup and refactor.
v1 -> v2:
- Use correct size of CPU interface region for pre-v2 GICs
- Improved comments
Pavel Fedin (3):
Merge memory_region_init_reservation() into memory_region_init_io()
hw/arm/gic: Kill code duplication
Introd
lt). So will it be OK if i rely on revision here ?
I mean: "s->revision == 2 ? 0x1000 : 0x100". Revision == 2 is also used by
ZynqMP model, which seems to have a9 CPU (according to some 'a9' names in the
code), but its memory layout actually can accommodate this, they say that
introduced. It
defaults to on on, but can be manually set to off in order to be able to run
those old 32-bit guests.
Signed-off-by: Pavel Fedin
---
Changes since v4:
- Removed machine-dependent "highmem" default, now always ON
Changes since v3:
- Added "highmem" option which co
VM config?
I forgot to reply to this. Yes, it does, because KVM_VGIC_V3_ADDR_TYPE_xxx
definitions are available only for 64 bits.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
uld have a migration information struct which says
> "not migratable".
Ok. I am wating for my GICv2 refactor review which includes memory API change.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
introduced. It
defaults to on on 64-bit machines and to off on 32-bit machines for backwards
compatibility.
Signed-off-by: Pavel Fedin
---
Changes since v3:
- Added "highmem" option which controls presence of this region. Default
value is on for 64-bit CPUs and off for 32-bit CP
n which will be rejected. What
behavior for 32 bits would you prefer?
a) Enable high MMIO by default, owners of old guests will have to add an option
to disable it.
b) Disable it by default. If somebody wants to use it on 32 bits, enable it
explicitly.
Kind regards,
Pavel Fedin
Expert Engineer
Sams
its pre-existing kernel cannot work around the inaccessible PCI region.
In order to keep this guest working, we need a possibility to disable the new
MMIO region in qemu. At least to omit it from the device tree.
Is this clear enough now ?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
But, actually, this is currently only for TCG, which needs it in order to
forward system register accesses to GICv3 code. Would it be OK if i just omit
this assignment ?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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