Re: [Qemu-devel] [PATCH 4/7] m25p80: add a m25p80_set_rom_storage() routine

On Mon, Jul 4, 2016 at 10:57 AM, mar.krzeminski wrote: > > > W dniu 04.07.2016 o 14:18, Cédric Le Goater pisze: >> >> Some SPI controllers, such as the Aspeed AST2400, have a mode in which >> accesses to the flash content are no different than doing MMIOs. The >>

Re: [Qemu-devel] how should a device implement an array of link(?) properties?

On Tue, Apr 26, 2016 at 5:45 AM, Peter Maydell wrote: > Hi; I have what seems like a fairly straightforward requirement for > a QOM device but no idea how to implement it, so I'm looking for > advice on the right "modern" way to do it... > > Specifically, this is the

Re: [Qemu-devel] [Qemu-arm] [PATCH] bcm2835_property: use cached values when querying framebuffer

On Fri, Apr 22, 2016 at 4:44 AM, Andrew Baumann <andrew.baum...@microsoft.com> wrote: > Hi all, > >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com] >> Sent: Friday, 22 April 2016 09:18 >> >> On Thu, Apr 21, 2016 at 9:06 AM, Stephen Warren >>

Re: [Qemu-devel] [Qemu-arm] [PATCH] bcm2835_property: use cached values when querying framebuffer

On Fri, Apr 22, 2016 at 12:46 AM, Gerd Hoffmann wrote: > Hi, > >> > Ideally as was mentioned earlier this would be done by simply executing the >> > existing bootloader under emulation, rather than building all that code >> > into >> > qemu. However, in the Pi case, the

Re: [Qemu-devel] [Qemu-arm] [PATCH] bcm2835_property: use cached values when querying framebuffer

On Thu, Apr 21, 2016 at 9:06 AM, Stephen Warren wrote: > On 04/21/2016 08:07 AM, Sylvain Garrigues wrote: >> >> Le 21 avr. 2016 à 15:42, Peter Maydell a écrit >> : >>> >>> >>> There may be something we can do here to make FreeBSD's life >>>

Re: [Qemu-devel] [PATCH 2/3] i.MX: Add the Freescale SPI Controller

On Tue, Feb 16, 2016 at 9:15 AM, mar.krzeminski wrote: > > > W dniu 15.02.2016 o 23:43, Jean-Christophe DUBOIS pisze: > >> Le 15/02/2016 17:46, mar.krzeminski a écrit : >>> >>> >>> >>> W dniu 15.02.2016 o 11:18, Jean-Christophe DUBOIS pisze: Le 14/02/2016

Re: [Qemu-devel] [PATCH v4 09/11] block: m25p80: Implemented FSR register

case READ_FSR: > +s->data[0] = (1 << 7); /*Indicates flash is ready */ > +if (s->four_bytes_address_mode) { > +s->data[0] |= 0x1; > +} > +s->pos = 0; > +s->len = 1; > +s->state = STATE_READING_DATA

Re: [Qemu-devel] [PATCH v4 08/11] block: m25p80: Fast read and 4bytes commands

tatic void decode_new_cmd(Flash *s, uint32_t value) > break; > > case FAST_READ: > +case FAST_READ4: > case DOR: > +case DOR4: > case QOR: > +case QOR4: > s->needed_bytes = get_addr_length(s); > if (((s->pi-

Re: [Qemu-devel] [PATCH v4 06/11] block: m25p80: Add configuration registers

} > +/* Number of dummy cycles */ > +s->volatile_cfg |= deposit32(s->volatile_cfg, > +4, 4, extract32(s->nonvolatile_cfg, 12, 4)); > + s->enh_volatile_cfg = 0; > +/* Output driver strength */ > +s->enh_

Re: [Qemu-devel] [PATCH v4 05/11] block: m25p80: 4byte address mode

uint32_t value) > s->needed_bytes = 4; > break; > case JEDEC_NUMONYX: > +s->needed_bytes = get_addr_length(s); > + break; This change ... > default: > s->needed_bytes = 5; Should be here, with a +2

Re: [Qemu-devel] [PATCH v4 02/11] block: m25p80: RESET_ENABLE and RESET_MEMORY commnads

->size = s->pi->sector_size * s->pi->n_sectors; > s->dirty_page = -1; > > +reset_memory(s); > + This shouldn't be here, you need to add a Device::reset function. Your use case of persisting data through a warn system reset (that we discussed previously) is diffi

Re: [Qemu-devel] [PATCH v4 11/11] block: m25p80: at25128a/at25256a models

38,6 +444,11 @@ void flash_write8(Flash *s, uint64_t addr, uint8_t data) > > static inline int get_addr_length(Flash *s) > { > + /* check if eeprom is in use */ > +if (s->pi->flags == WR_1) { > + return 2; > +} > + Neat! But I think this indi

Re: [Qemu-devel] [PATCH v4 07/11] block: m25p80: Dummy cycles for N25Q256/512

32(s->volatile_cfg, 4, 4); > break; > default: > s->needed_bytes = 5; Following on from before, these defaults are NUMONYX policy based, so I think your patch is to the default. Otherwise: Reviewed-by: Peter Crosthwaite <crosthwaite.pe

Re: [Qemu-devel] [PATCH v12 8/9] hw/ptimer: Perform delayed tick instead of immediate if delta = 0

On Sat, Jan 30, 2016 at 8:43 AM, Dmitry Osipenko wrote: > It might be necessary by some emulated HW to perform the tick after one > period if delta = 0. Given that it is much less churny to implement immediate > tick by the ptimer user itself, let's make ptimer do the delayed

Re: [Qemu-devel] [PATCH v12 9/9] arm_mptimer: Convert to use ptimer

is solid, and it adds those missing features that got the whole discussion started. Reviewed-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> > --- > hw/timer/arm_mptimer.c | 133 > + > include/hw/timer/arm_mptimer.h | 5 +- &

Re: [Qemu-devel] [PATCH v12 7/9] hw/ptimer: Fix counter - 1 returned by ptimer_get_count for the active timer

On Tue, Feb 2, 2016 at 7:19 AM, Dmitry Osipenko wrote: > 30.01.2016 19:43, Dmitry Osipenko пишет: >> >> Due to rounding down performed by ptimer_get_count, it returns counter - 1 >> for >> the active timer. That's incorrect because counter should decrement only >> after >>

Re: [Qemu-devel] [PATCH 2/9] hw/arm: QOM'ify highbank.c

On Sun, Mar 6, 2016 at 11:05 PM, xiaoqiang zhao <zxq_yx_...@163.com> wrote: > Drop the use of old SysBus init function and use instance_init > > Signed-off-by: xiaoqiang zhao <zxq_yx_...@163.com> Reviewed-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> (just t

[Qemu-devel] [PATCH v2 16/18] loader: load_elf(): Add doc comment

Document the usage of load_elf() for clarity on current features. Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- include/hw/loader.h | 23 +++ 1 file changed, 23 insertions(+) diff --git a/include/hw/loader.h b/include/hw/loader.h index a626c9b..2

[Qemu-devel] [PATCH v2 17/18] loader: Add data swap option to load-elf

ed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- changed since v1: Added doc comment (PMM review) Commit message typos hw/alpha/dp264.c | 4 ++-- hw/arm/armv7m.c| 2 +- hw/arm/boot.c | 2 +- hw/core/loader.c | 9 +

[Qemu-devel] [PATCH v2 18/18] arm: boot: Support big-endian elfs

to the TARGET endianness so the ifdeffery on TARGET_WORDS_BIGENDIAN goes away. Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- Changed since v1: Factor out elf manipulation logic into static helper (PMM review) hw/arm/boot.c

[Qemu-devel] [PATCH v2 15/18] loader: add API to load elf header

Add an API to load an elf header header from a file. Populates a buffer with the header contents, as well as a boolean for whether the elf is 64b or not. Both arguments are optional. Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- Changed since v1 (PMM review): Add f

[Qemu-devel] [PATCH v2 10/18] target-arm: introduce disas flag for endianness

* Split off as new patch from original: "target-arm: introduce tbflag for CPSR.E" * Wrote commit message from scratch ] Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> --- Changed since v1: rename mo_

[Qemu-devel] [PATCH v2 05/18] arm: cpu: handle BE32 user-mode as BE

ere USER mode is BE and system is not. Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- Changed since v1: Rewrote commit subject and message formerly: arm: linux-user: don't set CPSR.E in BE32 mode target-arm/cpu.h | 17 - 1 file changed, 16 inserti

[Qemu-devel] [PATCH v2 03/18] target-arm: implement SCTLR.B, drop bswap_code

e() for disas_set_info() instead of raw sctlr_b ] Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- TEST result: 0 (log@ logs/qemu-armeb-BE32-) TEST result: 0 (log@ logs/qemu-armeb-BE8-) TEST result: 0 (log@ logs/qemu-arm-LE-) TEST result: 0 (log@ logs/qemu-system-arm-LE-) Changed sin

[Qemu-devel] [PATCH v2 13/18] target-arm: implement setend

From: Paolo Bonzini <pbonz...@redhat.com> Since this is not a high-performance path, just use a helper to flip the E bit and force a lookup in the hash table since the flags have changed. Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Signed-off-by: Peter Crosthwaite <

[Qemu-devel] [PATCH v2 12/18] target-arm: introduce tbflag for endianness

From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> Introduce a tbflags for endianness, set based upon the CPUs current endianness. This in turn propagates through to the disas endianness flag. Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> --- changed since v1: s

[Qemu-devel] [PATCH v2 09/18] target-arm: pass DisasContext to gen_aa32_ld*/st*

ed-off-by: Paolo Bonzini <pbonz...@redhat.com> [ PC changes: * Fix long lines ] Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- target-arm/translate.c | 270 ++--- 1 file

[Qemu-devel] [PATCH v2 08/18] target-arm: implement SCTLR.EE

From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> Implement SCTLR.EE bit which controls data endianess for exceptions and page table translations. SCTLR.EE is mirrored to the CPSR.E bit on exception entry. Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> ---

[Qemu-devel] [PATCH v2 04/18] target-arm: cpu: Move cpu_is_big_endian to header

From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> There is a CPU data endianness test that is used to drive the virtio_big_endian test. Move this up to the header so it can be more generally used for endian tests. The KVM specific cpu_syncronize_state call is left behind in the

[Qemu-devel] [PATCH v2 11/18] target-arm: a64: Add endianness support

From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> Set the dc->mo_endianness flag for AA64 and use it in all ldst ops. Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> --- target-arm

[Qemu-devel] [PATCH v2 07/18] linux-user: arm: handle CPSR.E correctly in strex emulation

Paolo Bonzini <pbonz...@redhat.com> [ PC changes: * Moved SCTLR/CPSR logic to arm_cpu_data_is_big_endian ] Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- Changed since v1: Removed SCTLR logic from bwap_data() linu

[Qemu-devel] [PATCH v2 02/18] linux-user: arm: pass env to get_user_code_*

From: Paolo Bonzini <pbonz...@redhat.com> This matches the idiom used by get_user_data_* later in the series, and will help when bswap_code will be replaced by SCTLR.B. Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Si

[Qemu-devel] [PATCH v2 06/18] linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode

From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> If doing big-endian linux-user mode, set both the CPSR.E and SCTLR.E0E bits. This sets big-endian mode for data accesses. Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> --- TEST result: 0 (log@ logs/qemu-armeb

[Qemu-devel] [PATCH v2 00/18] ARM big-endian and setend support

for endianness target-arm: implement setend target-arm: implement BE32 mode in system emulation Peter Crosthwaite (10): target-arm: cpu: Move cpu_is_big_endian to header arm: cpu: handle BE32 user-mode as BE linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode target-arm: implement

[Qemu-devel] [PATCH v2 01/18] linux-user: arm: fix coding style for some linux-user signal functions

From: Paolo Bonzini <pbonz...@redhat.com> Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- TEST result: 0 (log@ logs/qemu-armeb-BE32-) TEST result:

Re: [Qemu-devel] [PATCH v1 00/17] ARM big-endian and setend support

On Tue, Mar 1, 2016 at 1:34 PM, Andrew Baumann <andrew.baum...@microsoft.com> wrote: >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com] >> Sent: Tuesday, 1 March 2016 10:44 AM >> >> On Mon, Feb 29, 2016 at 9:27 PM, Stefan Weil <s...@weilnetz.de>

Re: [Qemu-devel] [PATCH v1 00/17] ARM big-endian and setend support

On Mon, Feb 29, 2016 at 9:27 PM, Stefan Weil <s...@weilnetz.de> wrote: > Am 18.01.2016 um 08:12 schrieb Peter Crosthwaite: >> Hi All, >> >> This patch series adds system-mode big-endian support for ARM. It also >> implements the setend instruction, and loa

Re: [Qemu-devel] [PATCH v1 00/17] ARM big-endian and setend support

On Mon, Feb 29, 2016 at 9:27 PM, Stefan Weil <s...@weilnetz.de> wrote: > Am 18.01.2016 um 08:12 schrieb Peter Crosthwaite: >> Hi All, >> >> This patch series adds system-mode big-endian support for ARM. It also >> implements the setend instruction, and loa

Re: [Qemu-devel] [PATCH v1 16/17] loader: Add data swap option to load-elf

On Sun, Feb 28, 2016 at 7:28 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 27 February 2016 at 23:14, Peter Crosthwaite > <crosthwaitepe...@gmail.com> wrote: >> On Tue, Jan 19, 2016 at 9:53 AM, Peter Maydell <peter.mayd...@linaro.org> >> wrote: >

Re: [Qemu-devel] [PATCH v1 17/17] arm: boot: Support big-endian elfs

On Tue, Jan 19, 2016 at 10:06 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 18 January 2016 at 07:12, Peter Crosthwaite > <crosthwaitepe...@gmail.com> wrote: >> Support ARM big-endian ELF files in system-mode emulation. When loading >> an elf, determin

Re: [Qemu-devel] [PATCH v1 16/17] loader: Add data swap option to load-elf

On Tue, Jan 19, 2016 at 9:53 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 18 January 2016 at 07:12, Peter Crosthwaite > <crosthwaitepe...@gmail.com> wrote: >> Some CPUs are of an opposite data-endianness to other components in the >> system. Sometimes elf

Re: [Qemu-devel] [PATCH v1 15/17] loader: add API to load elf header

On Tue, Jan 19, 2016 at 9:50 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 18 January 2016 at 07:12, Peter Crosthwaite > <crosthwaitepe...@gmail.com> wrote: >> Add an API to load an elf header header from a file. Populates a >> buffer with the header

Re: [Qemu-devel] [PATCH v1 13/17] arm: linux-user: don't set CPSR.E in BE32 mode

On Tue, Jan 19, 2016 at 9:35 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 19 January 2016 at 17:26, Peter Maydell <peter.mayd...@linaro.org> wrote: >> On 18 January 2016 at 07:12, Peter Crosthwaite >> <crosthwaitepe...@gmail.com> wrote: >>>

Re: [Qemu-devel] [PATCH v1 10/17] target-arm: implement setend

On Tue, Jan 19, 2016 at 8:29 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 18 January 2016 at 07:12, Peter Crosthwaite > <crosthwaitepe...@gmail.com> wrote: >> From: Paolo Bonzini <pbonz...@redhat.com> >> >> Since this is not a high-performanc

Re: [Qemu-devel] [PATCH v1 08/17] target-arm: cpu: Move cpu_is_big_endian to header

On Tue, Jan 19, 2016 at 8:11 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 18 January 2016 at 07:12, Peter Crosthwaite > <crosthwaitepe...@gmail.com> wrote: >> From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> >> >> There is a CPU

Re: [Qemu-devel] [PATCH v1 04/17] target-arm: implement SCTLR.EE

On Tue, Jan 19, 2016 at 7:58 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 18 January 2016 at 07:12, Peter Crosthwaite > <crosthwaitepe...@gmail.com> wrote: >> From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> >> >> Implement

Re: [Qemu-devel] [PATCH v2 7/9] i.MX: Add i.MX6 SOC implementation.

On Sat, Feb 20, 2016 at 10:03 AM, Jean-Christophe DUBOIS <j...@tribudubois.net> wrote: > Le 20/02/2016 16:30, Peter Crosthwaite a écrit : >> >> On Sat, Feb 20, 2016 at 2:55 AM, Jean-Christophe DUBOIS >> <j...@tribudubois.net> wrote: >>> >>> Jus

Re: [Qemu-devel] [PATCH v2 7/9] i.MX: Add i.MX6 SOC implementation.

On Sat, Feb 20, 2016 at 2:55 AM, Jean-Christophe DUBOIS wrote: > Just to compare I tried to run Linux on QEMU emulating highbank. > > For now I am unable to start in SMP mode. Only one core is activated. > This is probably due to the fact that the PSCI command encodings for

Re: [Qemu-devel] [PATCH v1 1/2] qdev-monitor.c: Register reset function if the device has one

On Thu, Feb 18, 2016 at 1:47 PM, Paolo Bonzini wrote: > > > On 18/02/2016 10:56, Markus Armbruster wrote: >> Alistair Francis writes: >> >>> If the device being added when running qdev_device_add() has >>> a reset function, register it so that it

Re: [Qemu-devel] [PATCH v3 02/16] register: Add Register API

n a data driven way. Cuts >>> down on a lot of the verbosity and repetition in the switch-case blocks >>> in the standard foo_mmio_read/write functions. >>> >>> Also useful for automated generation of device models from hardware >>> design

Re: [Qemu-devel] [Qemu-arm] Does QEMU support AArch64 Big Endian emulation on x86-64 host?

On Mon, Feb 1, 2016 at 3:25 AM, Ruslan Bilovol <ruslan.bilo...@gmail.com> wrote: > On Wed, Jan 27, 2016 at 7:39 PM, Peter Crosthwaite > <crosthwaitepe...@gmail.com> wrote: >> On Tue, Jan 26, 2016 at 4:05 AM, Ruslan Bilovol >> <ruslan.bilo...@gmail.com> wrote:

Re: [Qemu-devel] [PATCH 02/12] Added reset-pin emulation in model.

On Mon, Dec 21, 2015 at 5:39 AM, Krzeminski, Marcin (Nokia - PL/Wroclaw) <marcin.krzemin...@nokia.com> wrote: > > > W dniu 21.12.2015 o 12:04, Peter Crosthwaite pisze: >> On Wed, Dec 16, 2015 at 4:57 AM, <marcin.krzemin...@nokia.com> wrote: >>> From: Marcin Krz

Re: [Qemu-devel] [PATCH v4 8/8] raspi: add raspberry pi 2 machine

On Fri, Jan 29, 2016 at 2:28 PM, Andrew Baumann <andrew.baum...@microsoft.com> wrote: >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com] >> Sent: Friday, 29 January 2016 14:23 >> >> On Fri, Jan 29, 2016 at 1:50 PM, Andrew Baumann >> <andrew.baum

Re: [Qemu-devel] [PATCH v4 8/8] raspi: add raspberry pi 2 machine

On Fri, Jan 29, 2016 at 1:50 PM, Andrew Baumann <andrew.baum...@microsoft.com> wrote: > Hi Peter, > > Thanks for all the reviews. I should have a respun version on the list > shortly. There's one minor change to this last patch: > >> From: Peter Crosthwaite [mailto

Re: [Qemu-devel] [PATCH v4 7/8] arm/boot: move highbank secure board setup code to common routine

; -} > -rom_add_blob_fixed("board-setup", board_setup_blob, > - sizeof(board_setup_blob), MVBAR_ADDR); > +arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); > } > > static void hb_write_secondary(ARMCPU *cpu, const struct a

Re: [Qemu-devel] [PATCH v4 8/8] raspi: add raspberry pi 2 machine

;soc.pi2), TYPE_BCM2836); > +object_property_add_child(OBJECT(machine), "soc", OBJECT(>soc), > + _abort); > + > +/* Allocate and map RAM */ > +memory_region_allocate_system_memory(>ram, OBJECT(machine), "ram", > +

Re: [Qemu-devel] [PATCH v4 5/8] bcm2836_control: add bcm2836 ARM control logic

836ControlState, (obj), TYPE_BCM2836_CONTROL) > + > +typedef struct BCM2836ControlState { > +/*< private >*/ > +SysBusDevice busdev; > +/*< public >*/ > +MemoryRegion iomem; > + > +/* interrupt status registers (not directly visible to

Re: [Qemu-devel] [PATCH v4 6/8] bcm2836: add bcm2836 soc device

_info); > +} > + > +type_init(bcm2836_register_types) > diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h > new file mode 100644 > index 000..cd0fd02 > --- /dev/null > +++ b/include/hw/arm/bcm2836.h > @@ -0,0 +1,34 @@ > +/* > + * Raspberry Pi emulation (c) 2012 Gregory Estrade > + * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous > + * > + * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft > + * Written by Andrew Baumann > + * > + * This code is licensed under the GNU GPLv2 and later. > + */ > + > +#ifndef BCM2836_H > +#define BCM2836_H > + > +#include "hw/arm/arm.h" > +#include "hw/arm/bcm2835_peripherals.h" > +#include "hw/intc/bcm2836_control.h" > + > +#define TYPE_BCM2836 "bcm2836" > +#define BCM2836(obj) OBJECT_CHECK(BCM2836State, (obj), TYPE_BCM2836) > + > +#define BCM2836_NCPUS 4 > + > +typedef struct BCM2836State { > +/*< private >*/ > +DeviceState parent_obj; > +/*< public >*/ > + > +uint32_t enabled_cpus; blank line here. Otherwise, Reviewed-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> Regards, Peter > +ARMCPU cpus[BCM2836_NCPUS]; > +BCM2836ControlState control; > +BCM2835PeripheralState peripherals; > +} BCM2836State; > + > +#endif /* BCM2836_H */ > -- > 2.5.3 >

Re: [Qemu-devel] [Qemu-arm] Does QEMU support AArch64 Big Endian emulation on x86-64 host?

-64 host? >> >> It is not currently supported, no. However there are some patches >> on the list[*] to add this support, so I expect a future QEMU version >> will do this. >> >> [*] https://lists.gnu.org/archive/html/qemu-devel/2016-01/msg03025.html > > Thank y

Re: [Qemu-devel] [PATCH v4 4/8] bcm2835_peripherals: add rollup device for bcm2835 peripherals

On Mon, Jan 25, 2016 at 10:23 PM, Andrew Baumann <andrew.baum...@microsoft.com> wrote: >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com] >> Sent: Monday, 25 January 2016 22:14 >> >> On Fri, Jan 15, 2016 at 3:58 PM, Andrew Baumann >>

Re: [Qemu-devel] [PATCH v4 2/8] bcm2835_property: add bcm2835 property channel

0); > + /* size */ > +stl_phys(>dma_as, value + 16, s->ram_size); > +resplen = 8; > +break; > +case 0x00028001: /* Set power state */ > +/* Assume that whatever device they asked for exists, > +

Re: [Qemu-devel] [PATCH v4 1/8] bcm2835_mbox: add BCM2835 mailboxes

MBOX, > +.parent= TYPE_SYS_BUS_DEVICE, > +.instance_size = sizeof(BCM2835MboxState), > +.class_init= bcm2835_mbox_class_init, > +.instance_init = bcm2835_mbox_init, > +}; > + > +static void bcm2835_mbox_register_types(void) > +{ > +type_registe

Re: [Qemu-devel] [PATCH v4 4/8] bcm2835_peripherals: add rollup device for bcm2835 peripherals

port to our parent */ > +memory_region_init_io(>peri_mr, obj, NULL, s, "bcm2835-peripherals", > + 0x100); Should this just be normal memory_region_init? > +object_property_add_child(obj, "peripheral-io", OBJECT(>peri_mr), >

Re: [Qemu-devel] [PATCH v11 2/7] hw/ptimer: Perform counter wrap around if timer already expired

o <dig...@gmail.com> Reviewed-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> > --- > hw/core/ptimer.c | 19 +-- > 1 file changed, 13 insertions(+), 6 deletions(-) > > diff --git a/hw/core/ptimer.c b/hw/core/ptimer.c > index 6dc1677..cb50

Re: [Qemu-devel] [PATCH v11 7/7] arm_mptimer: Convert to use ptimer

On Thu, Jan 21, 2016 at 11:03 AM, Dmitry Osipenko wrote: > Current ARM MPTimer implementation uses QEMUTimer for the actual timer, > this implementation isn't complete and mostly tries to duplicate of what > generic ptimer is already doing fine. > > Conversion to ptimer brings

Re: [Qemu-devel] [PATCH v11 6/7] hw/ptimer: Legalize running with delta = load = 0 and abort on period = 0

d oneshot timer when delta = 0 and remove duplicated > code from ptimer_tick(), since ptimer_reload would invoke trigger and stop > the timer. > > Signed-off-by: Dmitry Osipenko <dig...@gmail.com> Reviewed-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> > --- >

Re: [Qemu-devel] [PATCH] cadence_gem: fix buffer overflow

On Mon, Jan 18, 2016 at 12:12 AM, Jason Wang <jasow...@redhat.com> wrote: > > > On 01/18/2016 03:04 PM, Peter Crosthwaite wrote: >> On Sun, Jan 17, 2016 at 10:50 PM, Jason Wang <jasow...@redhat.com> wrote: >>> >>> On 01/14/2016 05:43 PM, Michael S. Ts

Re: [Qemu-devel] [PATCH] cadence_gem: fix buffer overflow

On Sun, Jan 17, 2016 at 10:50 PM, Jason Wang wrote: > > > On 01/14/2016 05:43 PM, Michael S. Tsirkin wrote: >> gem_receive copies a packet received from network into an rxbuf[2048] >> array on stack, with size limited by descriptor length set by guest. If >> guest is

[Qemu-devel] [PATCH v1 01/17] linux-user: arm: fix coding style for some linux-user signal functions

From: Paolo Bonzini <pbonz...@redhat.com> Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- linux-user/signal.c | 110 ++-

[Qemu-devel] [PATCH v1 02/17] linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode

From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> If doing big-endian linux-user mode, set both the CPSR.E and SCTLR.E0E bits. This sets big-endian mode for data accesses in AA32 and AA64 resp. Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> --- linux-use

[Qemu-devel] [PATCH v1 00/17] ARM big-endian and setend support

Peter Crosthwaite (9): linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode target-arm: implement SCTLR.EE target-arm: a64: Add endianness support target-arm: cpu: Move cpu_is_big_endian to header target-arm: introduce tbflag for endianness arm: linux-user: don't set CPSR.E in BE32

[Qemu-devel] [PATCH v1 04/17] target-arm: implement SCTLR.EE

From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> Implement SCTLR.EE bit which controls data endianess for exceptions and page table translations. SCTLR.EE is mirrored to the CPSR.E bit on exception entry. Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> ---

[Qemu-devel] [PATCH v1 16/17] loader: Add data swap option to load-elf

in this endianness scheme, which means the data in the elf is reversed at compile time. As QEMU loads via the system memory directly, rather than the CPU, we need a mechanism to reverse elf data endianness to implement this possibility. Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.

[Qemu-devel] [PATCH v1 13/17] arm: linux-user: don't set CPSR.E in BE32 mode

Don't set CPSR.E for BE32 linux-user mode. As linux-user mode models BE32, using normal BE (and system mode will not), a special case is needed for user-mode where if sctlr.b is set, the CPU identifies as BE. Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- linux-user/

[Qemu-devel] [PATCH v1 08/17] target-arm: cpu: Move cpu_is_big_endian to header

From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> There is a CPU data endianness test that is used to drive the virtio_big_endian test. Move this up to the header so it can be more generally used for endian tests. The KVM specific cpu_syncronize_state call is left behind in the

[Qemu-devel] [PATCH v1 07/17] target-arm: a64: Add endianness support

From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> Set the dc->mo_endianness flag for AA64 and use it in all ldst ops. Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> --- target-arm/translate-a64.c | 49 -- 1 f

[Qemu-devel] [PATCH v1 06/17] target-arm: introduce disas flag for endianness

* Split off as new patch from original: "target-arm: introduce tbflag for CPSR.E" * Wrote commit message from scratch ] Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> --- target-arm/translate-a64.c | 1 + target-arm/translate.c | 39 +++

[Qemu-devel] [PATCH v1 10/17] target-arm: implement setend

From: Paolo Bonzini <pbonz...@redhat.com> Since this is not a high-performance path, just use a helper to flip the E bit and force a lookup in the hash table since the flags have changed. Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Signed-off-by: Peter Crosthwaite <

[Qemu-devel] [PATCH v1 09/17] target-arm: introduce tbflag for endianness

From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> Introduce a tbflags for endianness, set based upon the CPUs current endianness. This in turn propagates through to the disas endianness flag. Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> --- targ

[Qemu-devel] [PATCH v1 15/17] loader: add API to load elf header

Add an API to load an elf header header from a file. Populates a buffer with the header contents, as well as a boolean for whether the elf is 64b or not. Both arguments are optional. Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- hw/core/loader.c

[Qemu-devel] [PATCH v1 14/17] target-arm: implement BE32 mode in system emulation

<pbonz...@redhat.com> [PC changes: * rebased against master (Jan 2016) ] Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- target-arm/cpu.h | 5 ++- target-arm/translate.c | 86 +- 2 files changed, 73 insertions(+), 18 deleti

[Qemu-devel] [PATCH v1 05/17] target-arm: pass DisasContext to gen_aa32_ld*/st*

ed-off-by: Paolo Bonzini <pbonz...@redhat.com> [ PC changes: * Fix long lines ] Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- target-arm/translate.c | 270 ++--- 1 file changed, 142 insertions(+), 128 deletions(-) diff

[Qemu-devel] [PATCH v1 11/17] linux-user: arm: pass env to get_user_code_*

From: Paolo Bonzini <pbonz...@redhat.com> This matches the idiom used by get_user_data_* later in the series, and will help when bswap_code will be replaced by SCTLR.B. Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> Si

[Qemu-devel] [PATCH v1 17/17] arm: boot: Support big-endian elfs

to the TARGET endianness so the ifdeffery on TARGET_WORDS_BIGENDIAN goes away. Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- hw/arm/boot.c| 96 ++-- include/hw/arm/arm.h | 9 + 2 files changed, 88 insertions(

[Qemu-devel] [PATCH v1 03/17] linux-user: arm: handle CPSR.E correctly in strex emulation

Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> [ PC changes: * Remove BE32 support ] Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- linux-user/main.c | 50 +++---

[Qemu-devel] [PATCH] misc: zynq-xadc: Fix off-by-one

This bounds check was off-by-one. Fix. Reported-by: Paolo Bonzini <pbonz...@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- hw/misc/zynq-xadc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/zynq-xadc.c b/hw/misc/zynq-

[Qemu-devel] [PATCH v1 12/17] target-arm: implement SCTLR.B, drop bswap_code

* s/TARGET_USER_ONLY/CONFIG_USER_ONLY * Use bswap_code() for disas_set_info() instead of raw sctlr_b ] Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- linux-user/main.c | 13 - target-arm/arm_ldst.h | 8 target-arm/cpu.c | 2 +- tar

Re: [Qemu-devel] [PATCH v7 1/6] qdev: get_child_bus(): Use QOM lookup if available

On Fri, Jan 15, 2016 at 2:38 PM, Alistair Francis <alistair.fran...@xilinx.com> wrote: > From: Peter Crosthwaite <crosthwaitepe...@gmail.com> > > qbus_realize() adds busses as a QOM child of the device in addition to > adding it to the qdev bus list. Change get_child_bus(

Re: [Qemu-devel] [PATCH v3 7/7] raspi: add raspberry pi 2 machine

On Thu, Jan 14, 2016 at 3:04 PM, Andrew Baumann <andrew.baum...@microsoft.com> wrote: > Hi Peter, > >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com] >> Sent: Tuesday, 12 January 2016 16:44 >> On Tue, Jan 12, 2016 at 3:53 PM, Andrew Baumann >>

Re: [Qemu-devel] [PATCH v3 7/7] raspi: add raspberry pi 2 machine

On Thu, Jan 14, 2016 at 4:43 PM, Andrew Baumann <andrew.baum...@microsoft.com> wrote: >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com] >> Sent: Thursday, 14 January 2016 15:35 >> >> On Thu, Jan 14, 2016 at 3:04 PM, Andrew Baumann >> <andrew.baum

Re: [Qemu-devel] [Qemu-arm] [PATCH v3 12/19] qom/cpu: Add MemoryRegion property

CC Andrew, This may be the missing feature for your system_memory for CPU RAM access problem. Regards, Peter On Thu, Jan 14, 2016 at 5:52 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > From: Peter Crosthwaite <peter.crosthwa...@xilinx.com> > > Add a MemoryRegion p

Re: [Qemu-devel] [Qemu-arm] [PATCH] cadence_gem: fix buffer overflow

On Thu, Jan 14, 2016 at 2:03 AM, Peter Maydell wrote: > On 14 January 2016 at 09:43, Michael S. Tsirkin wrote: >> gem_receive copies a packet received from network into an rxbuf[2048] >> array on stack, with size limited by descriptor length set by

Re: [Qemu-devel] [PATCH V6 2/8] introduce aux-bus

On Thu, Jan 14, 2016 at 1:57 AM, KONRAD Frederic <fred.kon...@greensocs.com> wrote: > > > Le 13/01/2016 22:02, Peter Crosthwaite a écrit : >> >> On Mon, Jan 4, 2016 at 10:25 AM, <fred.kon...@greensocs.com> wrote: >>> >>> From: KONRAD Frederic

Re: [Qemu-devel] [PATCH] i2c-tiny-usb: add new usb to i2c bridge

On Wed, Jan 13, 2016 at 8:07 AM, Tim Sander <t...@krieglstein.org> wrote: > Hi > Am Donnerstag, 7. Januar 2016, 02:14:23 schrieb Peter Crosthwaite: >> Patch subject prefix should contain the version number. Use the >> --subject-prefix or -v options to git format-patch. >

Re: [Qemu-devel] [PATCH V6 2/8] introduce aux-bus

On Mon, Jan 4, 2016 at 10:25 AM, wrote: > From: KONRAD Frederic > > This introduces a new bus: aux-bus. > > It contains an address space for aux slaves devices and a bridge to an I2C bus > for I2C through AUX transactions. > > Signed-off-by:

Re: [Qemu-devel] [PATCH v4 1/1] xlnx-zynqmp: Add support for high DDR memory regions

On Tue, Jan 12, 2016 at 1:59 PM, Alistair Francis wrote: > On Tue, Jan 12, 2016 at 1:01 AM, Peter Maydell > wrote: >> On 12 January 2016 at 00:24, Alistair Francis >> wrote: >>> On Mon, Jan 11, 2016 at 8:04 AM,

Re: [Qemu-devel] [PATCH v4 1/1] xlnx-zynqmp: Add support for high DDR memory regions

On Tue, Jan 12, 2016 at 2:07 PM, Alistair Francis <alistair.fran...@xilinx.com> wrote: > On Tue, Jan 12, 2016 at 2:00 PM, Peter Crosthwaite > <crosthwaitepe...@gmail.com> wrote: >> On Tue, Jan 12, 2016 at 1:59 PM, Alistair Francis >> <alistair.fran...@xilinx.com

Re: [Qemu-devel] [PATCH v3 6/7] bcm2836: add bcm2836 soc device

On Tue, Jan 12, 2016 at 2:56 PM, Andrew Baumann <andrew.baum...@microsoft.com> wrote: > Hi Peter, > > Thanks again for the reviews. > >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com] >> Sent: Monday, 11 January 2016 19:57 >> On Thu, Dec 31, 2015

Re: [Qemu-devel] [PATCH v3 7/7] raspi: add raspberry pi 2 machine

On Tue, Jan 12, 2016 at 3:53 PM, Andrew Baumann <andrew.baum...@microsoft.com> wrote: >> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com] >> Sent: Monday, 11 January 2016 19:58 > [...] >> > +static void write_board_setup(ARMCPU *cpu, const

Re: [Qemu-devel] [PATCH v10 5/7] hw/ptimer: Legalize running with delta = load = 0

On Sat, Jan 09, 2016 at 08:39:53PM +0300, Dmitry Osipenko wrote: > Currently ptimer would print error message and clear enable flag for an > arming timer that has delta = load = 0. That actually could be a valid case > for some hardware, like instant IRQ trigger for oneshot timer or continuous >

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