On 6/1/23 16:45, Alex Williamson wrote:
> A common helper implementing the realloc algorithm for handling
> capabilities.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Reviewed-by: Cédric Le Goater
> Signed-off-by: Alex Williamson
Reviewed-by: Robin Voetter
> ---
>
On 6/1/23 00:24, Alex Williamson wrote:
> On Wed, 31 May 2023 23:55:41 +0200
> Robin Voetter wrote:
>> Something that I have been thinking about, are there any implications
>> involved with enabling this feature automatically with no possibility of
>> turning it off
port device capabilities2 register are read-only, the
> PCIe spec does allow RO bits to change to reflect hardware state. We
> take advantage of that here around the realize and exit functions of
> the vfio-pci device.
>
> Signed-off-by: Alex Williamson
Reviewed-by: Robin Voetter
Test
On 5/27/23 01:15, Alex Williamson wrote:
> Report the PCIe capability version for a device
>
> Signed-off-by: Alex Williamson Reviewed-by: Robin
> Voetter
Tested-by: Robin Voetter
Kind regards,
Robin Voetter
out the host.
Thanks,
Robin Voetter, Stream HPC
n extraneous semicolon here behind the function declaration
that should be removed.
Kind regards,
Robin Voetter, Stream HPC
On 4/21/23 10:22, Michael S. Tsirkin wrote:
> On Thu, Apr 20, 2023 at 05:38:39PM +0200, ro...@streamhpc.com wrote:
>> From: Robin Voetter
>>
>> The ROCm driver for Linux uses PCIe atomics to schedule work and
>> generally communicate between the host and the device.
On 4/6/23 20:40, Alex Williamson wrote:
I think the typical approach for QEMU would be expose options in the
downstream ports that would then need to be enabled by the user or
management tool, but that's where the complication begins. At some
point we would want management tools to "do the righ
host system automatically either.
2. Is anything else required to support PCIe atomics, or did I just get
lucky that my programs work?
Thanks,
Robin Voetter, Stream HPC
