Re: [Qemu-devel] [PATCH] Ensure PCIR is aligned to 4 bytes

Andreas Färber wrote: > Same for http://patchwork.ozlabs.org/patch/273758/ - vgabios seems to > be falling through the cracks... > > Andreas > Is this patch still required? I was under the impression that no patch is needed for Win 8 after reading the thread on SeaBIOS list. Sebastian

Re: [Qemu-devel] [PATCH] Ensure PCIR is aligned to 4 bytes

Brad Smith wrote: > On 19/09/13 12:53 PM, Sebastian Herbszt wrote: > > Brad Smith wrote: > >> On 20/01/13 1:12 PM, David Woodhouse wrote: > >>> The PCI Firmware Specification apparently requires that the PCI > >>> Data Structure be DWORD-aligned. The imple

Re: [Qemu-devel] [PATCH] Ensure PCIR is aligned to 4 bytes

Brad Smith wrote: > On 20/01/13 1:12 PM, David Woodhouse wrote: >> The PCI Firmware Specification apparently requires that the PCI Data >> Structure be DWORD-aligned. The implementation in OVMF also requires >> this, so vgabios ROMs don't work there. With this fixed, I can now >> initialise the VGA

Re: [Qemu-devel] APM regression since v1.3.0-408-g9ee59f3

Gerd Hoffmann wrote: On 07/03/13 22:25, Sebastian Herbszt wrote: Commit 9ee59f3 ("pc: remove bochs bios debug ports") broke the APM interface between QEMU and Bochs BIOS/SeaBIOS. Without APM support older guests are no longer able to power off the VM. This regression also affects old

[Qemu-devel] APM regression since v1.3.0-408-g9ee59f3

Commit 9ee59f3 ("pc: remove bochs bios debug ports") broke the APM interface between QEMU and Bochs BIOS/SeaBIOS. Without APM support older guests are no longer able to power off the VM. This regression also affects older machine types like pc-1.2. Sebastian

Re: [Qemu-devel] [PATCH] Init win32 CRITICAL_SECTION before starting thread; crash when attaching disks

Stefan Weil wrote: Tested-by: Stefan Weil Hi Bogdan, I can confirm that your patch fixes a crash which otherwise makes QEMU unusable on Windows hosts. This patch likely fixes bug #922131 [1]. [1] https://bugs.launchpad.net/qemu/+bug/922131 Sebastian

[Qemu-devel] [PATCH V2] Make python mandatory

Make python mandatory. Signed-off-by: Sebastian Herbszt --- configure | 10 +++--- 1 files changed, 3 insertions(+), 7 deletions(-) diff --git a/configure b/configure index 640e815..a54439d 100755 --- a/configure +++ b/configure @@ -1185,13 +1185,9 @@ if test "$solaris" = &q

Re: [Qemu-devel] Subject: [PATCH] Make python mandatory

Peter Maydell wrote: On 30 December 2011 23:59, Sebastian Herbszt wrote: Make python mandatory. +if has $python; then + : +else + echo "Python not found. Use --python=/path/to/python" + exit 1 fi if test -z "$target_list" ; then I know you've just removed the

[Qemu-devel] Subject: [PATCH] Make python mandatory

Make python mandatory. Signed-off-by: Sebastian Herbszt --- configure | 12 +--- 1 files changed, 5 insertions(+), 7 deletions(-) diff --git a/configure b/configure index 640e815..6c2a1b4 100755 --- a/configure +++ b/configure @@ -1185,13 +1185,11 @@ if test "$solaris" = &q

Re: [Qemu-devel] Compiling without python?

Sebastian Herbszt wrote: Is it still possible to compile without python? python /v1.0-267-gda5361c/scripts/qapi-commands.py -m -o . /bin/sh: python: command not found make: *** [qmp-commands.h] Error 127 Sebastian Care to answer? Thanks, Sebastian

[Qemu-devel] Compiling without python?

Is it still possible to compile without python? python /v1.0-267-gda5361c/scripts/qapi-commands.py -m -o . /bin/sh: python: command not found make: *** [qmp-commands.h] Error 127 Sebastian

Re: [Qemu-devel] coroutine-win32.c:36: error: thread-local storage not supported for this target

Paolo Bonzini wrote: On 08/09/2011 05:53 PM, Sebastian Herbszt wrote: CC coroutine-win32.o coroutine-win32.c:36: error: thread-local storage not supported for this target coroutine-win32.c:37: error: thread-local storage not supported for this target make: *** [coroutine-win32.o] Error 1 You

[Qemu-devel] coroutine-win32.c:36: error: thread-local storage not supported for this target

CCcoroutine-win32.o coroutine-win32.c:36: error: thread-local storage not supported for this target coroutine-win32.c:37: error: thread-local storage not supported for this target make: *** [coroutine-win32.o] Error 1 Sebastian

Re: [Qemu-devel] [SeaBIOS] SeaBIOS error with Juniper FreeBSD kernel

Kevin O'Connor wrote: I investigated this a bit and I believe the Juniper OS has two SMBIOS bugs: it crashes when the table is in high memory, and when searching Are all versions based on FreeBSD 4.11? Are newer versions still affected? So, moving the SMBIOS back to the f-segment would fix th

[Qemu-devel] Re: [PATCH] piix: use pci_config_set_prog_interface()

Michael S. Tsirkin wrote: On Tue, Dec 28, 2010 at 07:48:23PM +0100, Sebastian Herbszt wrote: Michael S. Tsirkin wrote: >On Tue, Dec 28, 2010 at 05:24:06PM +0100, Sebastian Herbszt wrote: >>Michael S. Tsirkin wrote: >>>On Mon, Dec 20, 2010 at 10:18:01PM +0100, Sebastian Herb

[Qemu-devel] Re: [PATCH] piix: use pci_config_set_prog_interface()

Michael S. Tsirkin wrote: On Tue, Dec 28, 2010 at 05:24:06PM +0100, Sebastian Herbszt wrote: Michael S. Tsirkin wrote: >On Mon, Dec 20, 2010 at 10:18:01PM +0100, Sebastian Herbszt wrote: >>Use pci_config_set_prog_interface(). >> >>Signed-off-by: Sebastian Herbszt

[Qemu-devel] Re: [PATCH] piix: use pci_config_set_prog_interface()

Michael S. Tsirkin wrote: On Mon, Dec 20, 2010 at 10:18:01PM +0100, Sebastian Herbszt wrote: Use pci_config_set_prog_interface(). Signed-off-by: Sebastian Herbszt Since I was asked explicitly - I don't have a problem with these changes: both class and prog interface. However, they a

Re: [Qemu-devel] [PATCH 1/8] ahci: split ICH9 from core

Alexander Graf wrote: Am 23.12.2010 um 09:23 schrieb Stefan Hajnoczi : > On Mon, Dec 20, 2010 at 9:13 PM, Alexander Graf wrote: >> From: Sebastian Herbszt >> >> There are multiple ahci devices out there. The currently implemented ich-9 >> is only one of the many.

[Qemu-devel] [PATCH] apb_pci: use pci_config_set_revision()

Use pci_config_set_revision(). Signed-off-by: Sebastian Herbszt diff --git a/hw/apb_pci.c b/hw/apb_pci.c index 84e9af7..97b3032 100644 --- a/hw/apb_pci.c +++ b/hw/apb_pci.c @@ -321,7 +321,7 @@ static int apb_pci_bridge_initfn(PCIDevice *dev) pci_set_word(dev->config + PCI_STA

[Qemu-devel] [PATCH] dec_pci: use pci_config_set_revision()

Use pci_config_set_revision(). Signed-off-by: Sebastian Herbszt diff --git a/hw/dec_pci.c b/hw/dec_pci.c index bf88f2a..75dd373 100644 --- a/hw/dec_pci.c +++ b/hw/dec_pci.c @@ -110,7 +110,7 @@ static int dec_21154_pci_host_init(PCIDevice *d) /* PCI2PCI bridge same values as PearPC - check

[Qemu-devel] [PATCH] ioh3420: use pci_config_set_revision()

Use pci_config_set_revision(). Signed-off-by: Sebastian Herbszt diff --git a/hw/ioh3420.c b/hw/ioh3420.c index 95adf09..25ed2eb 100644 --- a/hw/ioh3420.c +++ b/hw/ioh3420.c @@ -104,7 +104,7 @@ static int ioh3420_initfn(PCIDevice *d) return rc; } -d->config[PCI_REVISION

[Qemu-devel] [PATCH] xio3130: use pci_config_set_revision()

Use pci_config_set_revision(). Signed-off-by: Sebastian Herbszt diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c index 1a2d258..fe16475 100644 --- a/hw/xio3130_downstream.c +++ b/hw/xio3130_downstream.c @@ -71,7 +71,7 @@ static int xio3130_downstream_initfn(PCIDevice *d

[Qemu-devel] [PATCH] usb-uhci: use pci_config_set_revision()

Use pci_config_set_revision(). Signed-off-by: Sebastian Herbszt diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c index b9b822f..5b3bf21 100644 --- a/hw/usb-uhci.c +++ b/hw/usb-uhci.c @@ -1106,7 +1106,7 @@ static int usb_uhci_common_initfn(UHCIState *s) uint8_t *pci_conf = s->dev.config;

[Qemu-devel] [PATCH] e1000: use pci_config_set_revision()

Use pci_config_set_revision(). Signed-off-by: Sebastian Herbszt diff --git a/hw/e1000.c b/hw/e1000.c index af101bd..7bad51a 100644 --- a/hw/e1000.c +++ b/hw/e1000.c @@ -1116,7 +1116,7 @@ static int pci_e1000_init(PCIDevice *pci_dev) pci_config_set_device_id(pci_conf, E1000_DEVID

[Qemu-devel] [PATCH] pcnet-pci: use pci_config_set_revision()

Use pci_config_set_revision(). Signed-off-by: Sebastian Herbszt diff --git a/hw/pcnet-pci.c b/hw/pcnet-pci.c index 339a401..c9811e2 100644 --- a/hw/pcnet-pci.c +++ b/hw/pcnet-pci.c @@ -282,7 +282,7 @@ static int pci_pcnet_init(PCIDevice *pci_dev) pci_config_set_device_id(pci_conf

[Qemu-devel] [PATCH] rtl8139: use pci_config_set_revision()

Use pci_config_set_revision(). Signed-off-by: Sebastian Herbszt diff --git a/hw/rtl8139.c b/hw/rtl8139.c index a8aed89..6407ce0 100644 --- a/hw/rtl8139.c +++ b/hw/rtl8139.c @@ -3346,7 +3346,7 @@ static int pci_rtl8139_init(PCIDevice *dev) pci_conf = s->dev.con

[Qemu-devel] [PATCH] cmd646: use pci_config_set_prog_interface()

Use pci_config_set_prog_interface(). Signed-off-by: Sebastian Herbszt diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c index 5d5464a..e125dfc 100644 --- a/hw/ide/cmd646.c +++ b/hw/ide/cmd646.c @@ -230,7 +230,7 @@ static int pci_cmd646_ide_initfn(PCIDevice *dev) pci_config_set_device_id

[Qemu-devel] [PATCH] piix: use pci_config_set_prog_interface()

Use pci_config_set_prog_interface(). Signed-off-by: Sebastian Herbszt diff --git a/hw/ide/piix.c b/hw/ide/piix.c index 1cad906..2772e08 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -135,7 +135,7 @@ static int pci_piix_ide_initfn(PCIIDEState *d) { uint8_t *pci_conf = d->dev.con

[Qemu-devel] Re: [SeaBIOS] [PATCHv6 00/16] boot order specification

Gleb Natapov wrote: How can we get to EDD info after device is mapped? Looking at Seabios implementation it builds EDD table on the fly when int_1348 is called and it does it only for internal devices. Can we use "disconnect vector" to connect device temporarily get EDD and then disconnect? Fr

[Qemu-devel] Re: [PATCH 14/15] megasas: LSI Megaraid SAS emulation

Hannes Reinecke wrote: +static int megasas_scsi_init(PCIDevice *dev) +{ +MPTState *s = DO_UPCAST(MPTState, dev, dev); +uint8_t *pci_conf; +int i; + +pci_conf = s->dev.config; + +/* PCI Vendor ID (word) */ +pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_LSI_LOGIC); +/

Re: [SeaBIOS] [Qemu-devel] [RFC] Passing boot order from qemu to seabios

H. Peter Anvin wrote: On 10/11/2010 01:30 PM, Anthony Liguori wrote: On 10/11/2010 02:59 PM, Gleb Natapov wrote: No boot rom should do that. extboot wreaks havoc when it is used. And since virtio is now supported by bios there is no reason to use it. You don't really have a choice. You could

[Qemu-devel] Re: [SeaBIOS] SMBIOS strings

Jes Sorensen wrote: On 06/01/10 22:26, Sebastian Herbszt wrote: Jes Sorensen wrote: Handle 0x0401, DMI type 4, 32 bytes Processor Information - Socket Designation: CPU 1 + Socket Designation: CPU01 smbios.c got snprintf((char*)start, 6, "CPU%2x", cpu_number); It sh

[Qemu-devel] Re: [SeaBIOS] SMBIOS strings

Kevin O'Connor wrote: On Tue, Jun 01, 2010 at 10:26:12PM +0200, Sebastian Herbszt wrote: Jes Sorensen wrote: >Handle 0x0401, DMI type 4, 32 bytes >Processor Information >- Socket Designation: CPU 1 >+ Socket Designation: CPU01 smbios.c got snprintf((char*)

[Qemu-devel] Re: [SeaBIOS] SMBIOS strings

Jes Sorensen wrote: Handle 0x0401, DMI type 4, 32 bytes Processor Information - Socket Designation: CPU 1 + Socket Designation: CPU01 smbios.c got snprintf((char*)start, 6, "CPU%2x", cpu_number); It should print "CPU 1" instead of "CPU01" because the padding should be done with spa

[Qemu-devel] [PATCH] ahci: drop ATA_CMD constants

Drop ATA_CMD constants and use constants from ide/internal.h. Signed-off-by: Sebastian Herbszt diff --git a/hw/ahci.c b/hw/ahci.c index 9987459..b4eafdf 100644 --- a/hw/ahci.c +++ b/hw/ahci.c @@ -153,33 +153,6 @@ do { fprintf(stderr,"ahci: " fmt , ## __VA_ARGS__); } while (0

[Qemu-devel] [PATCH] ahci: drop ATAPI_CMD constants

Drop not used ATAPI_CMD constants. Signed-off-by: Sebastian Herbszt diff --git a/hw/ahci.c b/hw/ahci.c index 9987459..a024706 100644 --- a/hw/ahci.c +++ b/hw/ahci.c @@ -179,21 +179,6 @@ do { fprintf(stderr,"ahci: " fmt , ## __VA_ARGS__); } while (0) #define ATA_CMD_WRITE_EXT

[Qemu-devel] Re: [SeaBIOS] SMBIOS strings

Gleb Natapov wrote: I don't care much as long as we will not have "CPU :". It looks like something that can change after BIOS upgrade, so it is hard to believe Windows will stop working because of this change. Maybe it could trigger the Windows activation process? Sebastian

[Qemu-devel] Re: [Qemu-ahci-devel] [PATCH] ahci: drop board_ahci constants

Alexander Graf wrote: On 31.05.2010, at 22:12, Sebastian Herbszt wrote: Drop not used board_ahci constants. Signed-off-by: Sebastian Herbszt diff --git a/hw/ahci.c b/hw/ahci.c index 3476cea..4090def 100644 --- a/hw/ahci.c +++ b/hw/ahci.c @@ -65,12 +65,6 @@ do { fprintf(stderr,"ahci:

[Qemu-devel] [PATCH] ahci: drop board_ahci constants

Drop not used board_ahci constants. Signed-off-by: Sebastian Herbszt diff --git a/hw/ahci.c b/hw/ahci.c index 3476cea..4090def 100644 --- a/hw/ahci.c +++ b/hw/ahci.c @@ -65,12 +65,6 @@ do { fprintf(stderr,"ahci: " fmt , ## __VA_ARGS__); } while (0) #define RX_FIS_SDB

[Qemu-devel] Re: [SeaBIOS] SMBIOS strings

Jes Sorensen wrote: Hi, We were looking at the dmidecode output from qemu-kvm pre-seabios and current qemu-kvm and noticed some of the strings have changed. The main problem with this is that certain OSes are quite sensitive to system changes and avoiding to change things unnecessarily would pr

[Qemu-devel] [PATCH] ahci: fix global hba control default value

Global HBA Control default value should be zero. Signed-off-by: Sebastian Herbszt diff --git a/hw/ahci.c b/hw/ahci.c index 178f9ea..ce87cbe 100644 --- a/hw/ahci.c +++ b/hw/ahci.c @@ -485,7 +485,6 @@ static void ahci_reg_init(AHCIState *s) { int i; s->control_regs.cap

[Qemu-devel] [PATCH] ahci: handle writes to generic host control registers

Handle writes to Generic Host Control registers. Signed-off-by: Sebastian Herbszt diff --git a/hw/ahci.c b/hw/ahci.c index f8e198c..178f9ea 100644 --- a/hw/ahci.c +++ b/hw/ahci.c @@ -425,7 +425,6 @@ static uint32_t ahci_mem_readl(void *ptr, target_phys_addr_t addr) static void ahci_mem_writel

Re: [Qemu-devel] [PATCH] ahci: convert enum to #define

Nathan Froyd wrote: On Thu, May 13, 2010 at 07:19:30PM +0200, Sebastian Herbszt wrote: Convert enum to #define. This doesn't buy you anything except code churn. It actually makes things worse at usual debug levels, too, because the debugger understands enums, but not #define. -Nathan

[Qemu-devel] [PATCH] ahci: convert enum to #define

Convert enum to #define. Signed-off-by: Sebastian Herbszt diff --git a/hw/ahci.c b/hw/ahci.c index 6f7b807..8d8605c 100644 --- a/hw/ahci.c +++ b/hw/ahci.c @@ -40,138 +40,124 @@ do { fprintf(stderr,"ahci: " fmt , ## __VA_ARGS__); } while (0) #define DPRINTF(fmt, ...) do {} while(

[Qemu-devel] [PATCH] ahci: increase MAX_SATA_DEVS to 4

All ICH6 ports are now available. Signed-off-by: Sebastian Herbszt diff --git a/sysemu.h b/sysemu.h index 70d5a33..022be18 100644 --- a/sysemu.h +++ b/sysemu.h @@ -177,7 +177,7 @@ typedef struct DriveInfo { #define MAX_IDE_DEVS 2 #define MAX_SCSI_DEVS 7 -#define MAX_SATA_DEVS 1 +#define

[Qemu-devel] [PATCH] ahci: enhance usable port count to 4

Make all 4 SATA ports usable. Signed-off-by: Sebastian Herbszt diff --git a/hw/ahci.c b/hw/ahci.c index 6f7b807..a343839 100644 --- a/hw/ahci.c +++ b/hw/ahci.c @@ -17,7 +17,6 @@ * * TODO: * o ahci cd support should use ide,but now ide 's bmdma prdt is different from ahci&#

[Qemu-devel] [PATCH] ahci: use interface type IF_SATA

Use interface type IF_SATA instead of IF_SCSI. Signed-off-by: Sebastian Herbszt diff --git a/hw/ahci.c b/hw/ahci.c index 2763075..6f7b807 100644 --- a/hw/ahci.c +++ b/hw/ahci.c @@ -1160,7 +1160,7 @@ static AHCIState *ahci_new(void) s->timer = qemu_new_timer(vm_clock, ahci_timer_funct

[Qemu-devel] Re: [PATCH 0/1] [RFC][AHCI] add cdrom support for ahci.

Alexander Graf wrote: Hi Chong, On 10.05.2010, at 13:55, QiaoChong wrote: > When ahci init ,driver will send ATA_SRST command,ahci device report device type through port's sig register. > Ahci disk lookup change from IF_SD to IF_SCSI now,because IF_SD does not support cdrom media. > I just co

[Qemu-devel] [PATCH] add interface type IF_SATA

Add interface type IF_SATA. Signed-off-by: Sebastian Herbszt diff --git a/sysemu.h b/sysemu.h index fa921df..b88bae9 100644 --- a/sysemu.h +++ b/sysemu.h @@ -151,7 +151,7 @@ extern unsigned int nb_prom_envs; typedef enum { IF_NONE, IF_IDE, IF_SCSI, IF_FLOPPY, IF_PFLASH, IF_MTD, IF_SD

[Qemu-devel] Re: [SeaBIOS] [PATCH] smbios: avoid counting io hole as ram

Kevin O'Connor wrote: On Fri, May 07, 2010 at 01:38:55PM -0600, Alex Williamson wrote: Avoid counting the io hole as part of ram, a vm started with 4G should report 4G in smbios, not 4.5G. Signed-off-by: Alex Williamson Looks okay to me. If there are no other comments, I'll commit in the ne

[Qemu-devel] AHCI support integration

The ICH6 AHCI implementation submitted by Chong is an all-in-one attempt (ahci.c). It includes all needed parts of the ICH6, AHCI, SATA and ATA specification. The code in hw/ide/* on the other hand is split (or could be split) into smaller parts like port based and bus master access, IDE and ATA

[Qemu-devel] Re: vgabios + qemu: issues and plans.

Gerd Hoffmann wrote: Hi, Works for stdvga and qxl. vmware fails as it has the memory at pci region 1 (region 0 has ioports) and it seems vgabios isn't prepared to handle that ... Do you mean vgabios currently doesn't work with qemu and "-vga vmware" ? It works, but uses the bochs lfb at t

[Qemu-devel] Re: Re: [RFC] [PATCH] add ahci support into qemu

Stuart Brady wrote: On Tue, May 04, 2010 at 10:51:37PM +0200, Sebastian Herbszt wrote: >diff --git a/hw/pci_ids.h b/hw/pci_ids.h >index fe7a121..4d4de93 100644 >--- a/hw/pci_ids.h >+++ b/hw/pci_ids.h >@@ -97,3 +97,4 @@ >#define PCI_DEVICE_ID_INTEL_82371AB

[Qemu-devel] Re: vgabios + qemu: issues and plans.

Gerd Hoffmann wrote: First, I'd like to be able to load the vgabios via PCI ROM bar on all pci vga cards (stdvga, vmware, soon qxl). The PCI ID in the bios has to match the PCI ID of the card, so we'll need a bunch of vga bios binaries, all identical except for the PCI ID. Or we need some kind

[Qemu-devel] Re: vgabios + qemu: issues and plans.

Gerd Hoffmann wrote: Hi, First, I'd like to be able to load the vgabios via PCI ROM bar on all pci vga cards (stdvga, vmware, soon qxl). The PCI ID in the bios has to match the PCI ID of the card, so we'll need a bunch of vga bios binaries, all identical except for the PCI ID. Or we need some

[Qemu-devel] eepro100: missing gpxe-eepro100-80862449.rom?

eepro100_register_devices() references three option roms: - gpxe-eepro100-80861209.rom - gpxe-eepro100-80861229.rom - gpxe-eepro100-80862449.rom The last one seems to be missing because it's not in the pc-bios directory. Sebastian

[Qemu-devel] Re: vgabios + qemu: issues and plans.

Gerd Hoffmann wrote: Hi, Today we have two vgabios versions in qemu: The standard one (vgabios.bin) and the cirrus one (vgabios-cirrus.bin). The cirrus vgabios is a PCI ROM. We can (and do) load it into the ROM PCI bar. The vgabios checks the pci config space to figure where the linear

[Qemu-devel] Re: [RFC] [PATCH] add ahci support into qemu

Elek Roland wrote: On v, 2010-05-02 at 17:56 +0200, Elek Roland wrote: I'm going to try the patch in practice as soon as I finish my university project. (It's due today.) I've tried the patch, and I can confirm that it does provide an AHCI device and a SATA disk. It shows up in qemu as an Inte

Re: [Qemu-devel] Re: [RFC] [PATCH] add ahci support into qemu

乔崇 wrote: I add Sebastian Herbsz's patch,add WIN_WIN_STANDBYNOW1 support to fix hw_error on linux shut down etc. I am not familiar with git send-email,I am studying it now :). [snip] >From e94912b03ed33080d550eb5764fc99911498101b Mon Sep 17 00:00:00 2001 From: QiaoChong Date: Tue, 4 May 2

[Qemu-devel] Re: [RFC] [PATCH] add ahci support into qemu

Hi again, please consider the following minor changes: - debug output with DEBUG_AHCI - set port count to 4 - change return value of PxSSTS to include SPD and IPM - change cap and version default values according to Intel #301473-002 Regards, Sebastian --- hw/ahci.c.orig Sun May 2 15:43:58 201

[Qemu-devel] Re: [RFC] [PATCH] add ahci support into qemu

Hi, 乔崇 wrote: Hi,Alexander Graf. I am very glad you noticed my patch about ahci.I love qemu just like I love linux.I wish I could do much more work on qemu development. I had cloned qemu from master branch,add my patch into it,and tested ahci on i386 softmmu. If anyone is interested on a

[Qemu-devel] Re: Seabios dislikes -M isapc

Kevin O'Connor wrote: On Mon, Feb 08, 2010 at 08:09:17PM +0100, Jan Kiszka wrote: Sebastian Herbszt wrote: > Jan Kiszka wrote: >> Hi, >> >> Seabios seems to have some assumptions built in that break when -M isapc >> is selected. Is this supposed to work or is

[Qemu-devel] Re: Seabios dislikes -M isapc

Jan Kiszka wrote: Hi, Seabios seems to have some assumptions built in that break when -M isapc is selected. Is this supposed to work or is isapc about to die? SeaBIOS doesn't POST if the F-segment is not writeable [1]. A possible, but IMO wrong fix was posted on the list [2]. [1] http://lists

[Qemu-devel] Re: Re: [SeaBIOS] [PATCH 0/8] option rom loadingoverhaul.

Anthony Liguori wrote: On 12/21/2009 01:43 PM, Gleb Natapov wrote: Please stop thinking so :) Especially about "user driven upgrades". Why combine disadvantages of vitalization with pain of physical HW management? Or may be next step will be to require uploading of CPU microcode to take advantag

[Qemu-devel] Re: [SeaBIOS] [PATCH 0/8] option rom loadingoverhaul.

Gleb Natapov wrote: On Mon, Dec 21, 2009 at 08:39:03PM +0100, Sebastian Herbszt wrote: Anthony Liguori wrote: >On 12/21/2009 12:24 PM, Sebastian Herbszt wrote: >>As stated before i don't like the idea of automagically >>upgrading the firmware >>on reset, e.g. after a

[Qemu-devel] Re: [SeaBIOS] [PATCH 0/8] option rom loadingoverhaul.

Anthony Liguori wrote: On 12/21/2009 12:24 PM, Sebastian Herbszt wrote: As stated before i don't like the idea of automagically upgrading the firmware on reset, e.g. after a live migration to a newer qemu version. You have explained that qemu-kvm needs this in order to work with live migr

[Qemu-devel] Re: Re: [SeaBIOS] [PATCH 0/8] option rom loadingoverhaul.

Gleb Natapov wrote: On Mon, Dec 21, 2009 at 07:24:43PM +0100, Sebastian Herbszt wrote: Does any OS (Windows?) depend on the tables the bios creates (e.g. smbios) for licensing? It would be ugly if Windows wants you to re-activate after a reboot following a migration to newer qemu version and

[Qemu-devel] Re: Re: [SeaBIOS] [PATCH 0/8] option rom loadingoverhaul.

Gleb Natapov wrote: On Mon, Dec 21, 2009 at 11:26:12AM -0600, Anthony Liguori wrote: On 12/21/2009 10:43 AM, Gleb Natapov wrote: >>There are some really ugly corner cases here. For instance, guest >>is running and the user does a yum update which upgrades the qemu >>package. This includes layi

Re: [Qemu-devel] ne2k_isa: how to specify a custom iobase and irq?

Anthony Liguori wrote: Sebastian Herbszt wrote: Gerd Hoffmann wrote: On 12/18/09 07:12, Markus Armbruster wrote: "Sebastian Herbszt" writes: The default iobase and irq for the ne2k_isa card are 0x300 and 9. It should be possible to override both using the "-net" syntax

Re: [Qemu-devel] ne2k_isa: how to specify a custom iobase and irq?

Anthony Liguori wrote: Sebastian Herbszt wrote: Markus Armbruster wrote: "Sebastian Herbszt" writes: The default iobase and irq for the ne2k_isa card are 0x300 and 9. It should be possible to override both using the "-net" syntax like "-net nic,model=ne2k_isa,irq=5

[Qemu-devel] Re: [SeaBIOS] [PATCH 0/8] option rom loading overhaul.

Gerd Hoffmann wrote: On 12/18/09 17:42, Anthony Liguori wrote: Do we need to do something for -M pc-0.11? Like loading the pci roms via fw_cfg too so the guest doesn't see the new pci rom bar? Yes, we do. We can fix that problem as a stable-0.12 update though. Right now, migration with pc-0.11

Re: [Qemu-devel] ne2k_isa: how to specify a custom iobase and irq?

Markus Armbruster wrote: "Sebastian Herbszt" writes: The default iobase and irq for the ne2k_isa card are 0x300 and 9. It should be possible to override both using the "-net" syntax like "-net nic,model=ne2k_isa,irq=5,iobase=0x280". -device ne2k_isa,irq=5,iob

[Qemu-devel] Re: [SeaBIOS] [PATCH 0/8] option rom loading overhaul.

Anthony Liguori wrote: Sebastian Herbszt wrote: Gerd Hoffmann wrote: On 12/18/09 17:42, Anthony Liguori wrote: Do we need to do something for -M pc-0.11? Like loading the pci roms via fw_cfg too so the guest doesn't see the new pci rom bar? Yes, we do. We can fix that problem as a s

Re: [Qemu-devel] ne2k_isa: how to specify a custom iobase and irq?

Markus Armbruster wrote: "Sebastian Herbszt" writes: The default iobase and irq for the ne2k_isa card are 0x300 and 9. It should be possible to override both using the "-net" syntax like "-net nic,model=ne2k_isa,irq=5,iobase=0x280". -device ne2k_isa,irq=5,ioba

Re: [Qemu-devel] ne2k_isa: how to specify a custom iobase and irq?

Gerd Hoffmann wrote: On 12/18/09 07:12, Markus Armbruster wrote: "Sebastian Herbszt" writes: The default iobase and irq for the ne2k_isa card are 0x300 and 9. It should be possible to override both using the "-net" syntax like "-net nic,model=ne2k_isa,irq=5,iobase=0

[Qemu-devel] ne2k_isa: how to specify a custom iobase and irq?

The default iobase and irq for the ne2k_isa card are 0x300 and 9. It should be possible to override both using the "-net" syntax like "-net nic,model=ne2k_isa,irq=5,iobase=0x280". - Sebastian

Re: Proper support for PCI-based option rom loading (was Re: [Qemu-devel] Re: qdev property bug?)

Anthony Liguori wrote: Sebastian Herbszt wrote: What about isapc? Or (pci)pc with isa card? I'm not sure how the bios enumerates isa option roms on bare metal. Let's give this a shot: A typical isa expansion card seems to have a jumper to select a I/O port, IRQ and boot ro

Re: Proper support for PCI-based option rom loading (was Re: [Qemu-devel] Re: qdev property bug?)

Gerd Hoffmann wrote: On 12/15/09 23:51, Sebastian Herbszt wrote: Qemu will map rom1.bin to PC_ROM_MIN_OPTION (0xc8000) and map rom2.bin to 0xd. No. rom1.bin will be loaded to max(0xc8000, 0xc + cirrus-bios-size) aligned to 2k, which (with cirrus) is 0xc9. My bad - for some

Re: Proper support for PCI-based option rom loading (was Re: [Qemu-devel] Re: qdev property bug?)

Anthony Liguori wrote: Michael S. Tsirkin wrote: I think it's stable-0.12 material because it's badly broken right now I thought the rule was no guest visible changes in stable series? Yeah, good point, so we need to figure out something for 0.12.0. Sebastian's suggestion of loadin

Re: Proper support for PCI-based option rom loading (was Re: [Qemu-devel] Re: qdev property bug?)

Anthony Liguori wrote: Sebastian Herbszt wrote: Anthony Liguori wrote: Gerd Hoffmann wrote: I'm more worried about the CONFIG_OPTIONROMS_DEPLOYED patches for seabios, although I don't fully understand what they are doing. There are non-pci option roms (linuxboot, multiboot, extb

Re: Proper support for PCI-based option rom loading (was Re: [Qemu-devel] Re: qdev property bug?)

Anthony Liguori wrote: Gerd Hoffmann wrote: I'm more worried about the CONFIG_OPTIONROMS_DEPLOYED patches for seabios, although I don't fully understand what they are doing. There are non-pci option roms (linuxboot, multiboot, extboot) which qemu will continue to deploy the way roms are deplo

Re: [Qemu-devel] Re: qdev property bug?

Anthony Liguori wrote: Sebastian Herbszt wrote: Anthony Liguori wrote: Michael S. Tsirkin wrote: On Mon, Dec 14, 2009 at 02:43:38PM -0600, Anthony Liguori wrote: Because it can be selected by the user via the menu and because it can be selected at runtime via the boot_set monitor command

Re: [Qemu-devel] Re: qdev property bug?

Anthony Liguori wrote: Michael S. Tsirkin wrote: On Mon, Dec 14, 2009 at 02:43:38PM -0600, Anthony Liguori wrote: Because it can be selected by the user via the menu and because it can be selected at runtime via the boot_set monitor command. Yes, but it's not like we have nowhere to

Re: [Qemu-devel] Re: qdev property bug?

Michael S. Tsirkin wrote: On Mon, Dec 14, 2009 at 09:32:30PM +0100, Gerd Hoffmann wrote: On 12/14/09 21:20, Michael S. Tsirkin wrote: So far, it's not clear to me that anyone has demonstrated how this is harmful for people that don't want pxe booting. Assuming we fix the bug about rom loading,

Re: [Qemu-devel] Re: qdev property bug?

Gerd Hoffmann wrote: On 12/14/09 21:20, Michael S. Tsirkin wrote: So far, it's not clear to me that anyone has demonstrated how this is harmful for people that don't want pxe booting. Assuming we fix the bug about rom loading, then there's really no impact to users. Fix (v2) is on the list al

Re: [Qemu-devel] Re: qdev property bug?

Anthony Liguori wrote: Sebastian Herbszt wrote: Anthony Liguori wrote: Michael S. Tsirkin wrote: Further, we should error out when device is added. Doing this during boot is way too late, management won't be able to understand such errors and won't be able to recover. I d

Re: [Qemu-devel] Re: qdev property bug?

Michael S. Tsirkin wrote: On Mon, Dec 14, 2009 at 08:12:48PM +0100, Sebastian Herbszt wrote: Anthony Liguori wrote: Michael S. Tsirkin wrote: Further, we should error out when device is added. Doing this during boot is way too late, management won't be able to understand such error

Re: [Qemu-devel] Re: qdev property bug?

Anthony Liguori wrote: Michael S. Tsirkin wrote: Further, we should error out when device is added. Doing this during boot is way too late, management won't be able to understand such errors and won't be able to recover. I don't quite understand this. In 0.11, we never loaded option roms

Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios

Gleb Natapov wrote: On Fri, Nov 27, 2009 at 09:42:19PM +0100, Sebastian Herbszt wrote: Gleb Natapov wrote: >On Thu, Nov 26, 2009 at 09:55:28PM +0100, Sebastian Herbszt wrote: >>Gleb Natapov wrote: >>>On Wed, Nov 25, 2009 at 11:04:20PM +0100, Sebastian Herbszt wrote: >

Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios

Gleb Natapov wrote: On Thu, Nov 26, 2009 at 09:55:28PM +0100, Sebastian Herbszt wrote: Gleb Natapov wrote: >On Wed, Nov 25, 2009 at 11:04:20PM +0100, Sebastian Herbszt wrote: >>Gleb Natapov wrote: >>>On Wed, Nov 25, 2009 at 06:09:51AM +, Jamie Lokier wrote: >

Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios

Jamie Lokier wrote: Sebastian Herbszt wrote: >We could have qemu do a soft reset (not reload rom) on a triple fault >or keyboard controller reset, and then have SeaBIOS request a hard >reset (have qemu reload rom) if it detects a soft reset that is not a >"resume" request

Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios

Kevin O'Connor wrote: On Wed, Nov 25, 2009 at 11:04:20PM +0100, Sebastian Herbszt wrote: Do different things during reset depending on CMOS values doesn't sound right to me. I don't know what is implemented right now. I thought that we reload BIOS on reset. Currently the BIOS s

[Qemu-devel] Re: [PATCH][SEABIOS] Make SMBIOS table pass MS SVVP test

Gleb Natapov wrote: On Wed, Nov 25, 2009 at 09:09:19PM +0100, Sebastian Herbszt wrote: Gleb Natapov wrote: >On Tue, Nov 24, 2009 at 10:57:02AM -0500, Kevin O'Connor wrote: >> >>That said, I think SeaBIOS should autodetect any values where that's >>feasibl

Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios

Gleb Natapov wrote: On Wed, Nov 25, 2009 at 11:04:20PM +0100, Sebastian Herbszt wrote: Gleb Natapov wrote: >On Wed, Nov 25, 2009 at 06:09:51AM +, Jamie Lokier wrote: >>Gleb Natapov wrote: >>> > But QEMU is used to run old OSes too. >>> > > That's OK.

Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios

Kevin O'Connor wrote: On Wed, Nov 25, 2009 at 02:20:39PM +0200, Gleb Natapov wrote: On Wed, Nov 25, 2009 at 06:09:51AM +, Jamie Lokier wrote: > But the BIOS must be reloaded from ROM, I'm guessing, if the keyboard > controller method is used and the word asking for a branch back to the > app

Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios

Gleb Natapov wrote: On Wed, Nov 25, 2009 at 06:09:51AM +, Jamie Lokier wrote: Gleb Natapov wrote: > > But QEMU is used to run old OSes too. > > > That's OK. I don't expect BIOS to be reloaded if OS restart by jumping > to BIOS reset code. That's good then. What about DOS and DOS-extender

Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios

Jamie Lokier wrote: What about DOS and DOS-extender programs which do a soft reset by triple-faulting the CPU (see Sebastian's notes on i440FX behaviour), and asking the keyboard controller? Both of those methods are used by DOS and DOS-extender programs to switch from protected mode to real mod

[Qemu-devel] Re: [PATCH][SEABIOS] Make SMBIOS table pass MS SVVP test

Gleb Natapov wrote: On Tue, Nov 24, 2009 at 10:57:02AM -0500, Kevin O'Connor wrote: That said, I think SeaBIOS should autodetect any values where that's feasible. So, for example, if the cpu identification is available via cpuid, then I think that should be used. However, for example, if cpu

Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios

Gleb Natapov wrote: On Mon, Nov 23, 2009 at 10:30:56PM +0100, Sebastian Herbszt wrote: Gleb Natapov wrote: >On Mon, Nov 23, 2009 at 08:19:54PM +0100, Sebastian Herbszt wrote: >>Gleb Natapov wrote: >>>On Sun, Nov 22, 2009 at 09:01:45PM +0100, Sebastian Herbszt wrote: >

Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios

Gleb Natapov wrote: On Mon, Nov 23, 2009 at 08:19:54PM +0100, Sebastian Herbszt wrote: Gleb Natapov wrote: >On Sun, Nov 22, 2009 at 09:01:45PM +0100, Sebastian Herbszt wrote: >>Gleb Natapov wrote: >>>On Sun, Nov 22, 2009 at 04:31:24PM +0100, Sebastian Herbszt wrote: >>

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