[PATCH for-7.0 v8 23/31] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 2 + tcg/loongarch64/tcg-target.c.inc | 353 +++ 2 files changed, 355 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target

[PATCH for-7.0 v8 21/31] tcg/loongarch64: Implement tcg_out_call

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 34 1 file changed, 34 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 682bf76ceb..e470d7e145 100644 --- a/tcg

[PATCH for-7.0 v8 19/31] tcg/loongarch64: Implement br/brcond ops

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 53 2 files changed, 54 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con

[PATCH for-7.0 v8 20/31] tcg/loongarch64: Implement setcond ops

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 69 2 files changed, 70 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target

[PATCH for-7.0 v8 15/31] tcg/loongarch64: Implement clz/ctz ops

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 42 tcg/loongarch64/tcg-target.h | 8 +++--- 3 files changed, 47 insertions(+), 4 deletions(-) diff --git a

[PATCH for-7.0 v8 06/31] tcg/loongarch64: Define the operand constraints

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-str.h | 28 +++ tcg/loongarch64/tcg-target.c.inc | 52 2 files changed, 80 insertions(+) create mode 100644 tcg

[PATCH for-7.0 v8 14/31] tcg/loongarch64: Implement bswap{16, 32, 64} ops

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target.c.inc | 32 tcg/loongarch64/tcg-target.h | 10 +- 2 files changed, 37 insertions(+), 5 deletions(-) diff --git a/tcg

[PATCH for-7.0 v8 13/31] tcg/loongarch64: Implement deposit/extract ops

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 21 + tcg/loongarch64/tcg-target.h | 8 3 files changed, 26 insertions

[PATCH for-7.0 v8 09/31] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target.c.inc | 137 +++ 1 file changed, 137 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index

[PATCH for-7.0 v8 03/31] tcg/loongarch64: Add the tcg-target.h file

2021-11-24 Thread WANG Xuerui
Support for all optional TCG ops are initially marked disabled; the bits are to be set in individual commits later. Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target.h | 180 +++ 1 file

[PATCH for-7.0 v8 16/31] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 91 tcg/loongarch64/tcg-target.h | 4 +- 3 files changed, 94 insertions

[PATCH for-7.0 v8 10/31] tcg/loongarch64: Implement goto_ptr

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 17 + tcg/loongarch64/tcg-target.c.inc | 15 +++ 2 files changed, 32 insertions(+) create mode 100644 tcg/loongarch64/tcg

[PATCH for-7.0 v8 01/31] elf: Add machine type value for LoongArch

2021-11-24 Thread WANG Xuerui
-gdb.git;a=commit;h=01a8c731aacbdbed0eb5682d13cc074dc7e25fb3 Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- include/elf.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/elf.h b/include/elf.h index 811bf4a1cb..3a4bcb646a 100644 --- a

[PATCH for-7.0 v8 04/31] tcg/loongarch64: Add generated instruction opcodes and encoding helpers

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Acked-by: Richard Henderson --- tcg/loongarch64/tcg-insn-defs.c.inc | 979 1 file changed, 979 insertions(+) create mode 100644 tcg/loongarch64/tcg-insn-defs.c.inc diff --git a/tcg/loongarch64/tcg-insn-defs.c.inc b/tcg/loongarch64/tcg

[PATCH for-7.0 v8 05/31] tcg/loongarch64: Add register names, allocation order and input/output sets

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 118 +++ 1 file changed, 118 insertions(+) create mode 100644 tcg/loongarch64/tcg-target.c.inc diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg

[PATCH for-7.0 v8 07/31] tcg/loongarch64: Implement necessary relocation operations

2021-11-24 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 66 1 file changed, 66 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 64e57bd055..fbacaef862 100644 --- a/tcg

[PATCH for-7.0 v8 02/31] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer

2021-11-24 Thread WANG Xuerui
I ported the initial code, so I should maintain it of course. Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- MAINTAINERS | 5 + 1 file changed, 5 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index d3879aa3c1..a638fb6b31 100644

[PATCH for-7.0 v8 00/31] LoongArch64 port of QEMU TCG

2021-11-24 Thread WANG Xuerui
chew.org/QEMU/20210923165939.729081-1-...@xen0n.name/ v3: https://patchew.org/QEMU/20210922180927.666273-1-...@xen0n.name/ v2: https://patchew.org/QEMU/20210921201915.601245-1-...@xen0n.name/ v1: https://patchew.org/QEMU/20210920080451.408655-1-...@xen0n.name/ WANG Xuerui (31): elf: Add mach

[PATCH v7 25/31] tcg/loongarch64: Implement exit_tb/goto_tb

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 19 +++ 1 file changed, 19 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index a806e3352e..2d066a035d 100644 --- a/tcg/loongarch64

[PATCH v7 28/31] linux-user: Add safe syscall handling for loongarch64 hosts

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- linux-user/host/loongarch64/hostdep.h | 34 .../host/loongarch64/safe-syscall.inc.S | 80 +++ 2 files changed, 114 insertions(+) create mode 100644 linux-user/host/loongarch64/hostdep.h create

[PATCH v7 29/31] accel/tcg/user-exec: Implement CPU-specific signal handler for loongarch64 hosts

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- linux-user/host/loongarch64/host-signal.h | 82 +++ 1 file changed, 82 insertions(+) create mode 100644 linux-user/host/loongarch64/host-signal.h diff --git a/linux-user/host

[PATCH v7 24/31] tcg/loongarch64: Implement tcg_target_qemu_prologue

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 68 1 file changed, 68 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index c92587c823..a806e3352e 100644 --- a/tcg

[PATCH v7 31/31] tests/docker: Add gentoo-loongarch64-cross image and run cross builds in GitLab

2021-11-22 Thread WANG Xuerui
. As a reference, the image takes about 27 minutes to rebuild on a Threadripper 3990X system with Docker operating on HDD; YMMV but it probably wouldn't become significantly shorter, as everything needs to be built from source in our case. Signed-off-by: WANG Xuerui --- .gitlab-ci.d

[PATCH v7 19/31] tcg/loongarch64: Implement br/brcond ops

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 53 2 files changed, 54 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con

[PATCH v7 27/31] tcg/loongarch64: Register the JIT

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 44 1 file changed, 44 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index ff167d686b..8ce30ecae5 100644 --- a/tcg

[PATCH v7 20/31] tcg/loongarch64: Implement setcond ops

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 69 2 files changed, 70 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target

[PATCH v7 22/31] tcg/loongarch64: Implement simple load/store ops

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 131 +++ 2 files changed, 132 insertions(+) diff --git a/tcg/loongarch64/tcg-target

[PATCH v7 13/31] tcg/loongarch64: Implement deposit/extract ops

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 21 + tcg/loongarch64/tcg-target.h | 8 3 files changed, 26 insertions

[PATCH v7 26/31] tcg/loongarch64: Implement tcg_target_init

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 27 +++ 1 file changed, 27 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 2d066a035d..ff167d686b 100644 --- a/tcg

[PATCH v7 21/31] tcg/loongarch64: Implement tcg_out_call

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 34 1 file changed, 34 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 682bf76ceb..e470d7e145 100644 --- a/tcg

[PATCH v7 15/31] tcg/loongarch64: Implement clz/ctz ops

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 42 tcg/loongarch64/tcg-target.h | 8 +++--- 3 files changed, 47 insertions(+), 4 deletions(-) diff --git a

[PATCH v7 23/31] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 2 + tcg/loongarch64/tcg-target.c.inc | 353 +++ 2 files changed, 355 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target

[PATCH v7 30/31] configure, meson.build: Mark support for loongarch64 hosts

2021-11-22 Thread WANG Xuerui
nately. Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- configure | 7 ++- meson.build | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/configure b/configure index 48c21775f3..23c366a69a 100755 --- a/configure +++

[PATCH v7 10/31] tcg/loongarch64: Implement goto_ptr

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 17 + tcg/loongarch64/tcg-target.c.inc | 15 +++ 2 files changed, 32 insertions(+) create mode 100644 tcg/loongarch64/tcg

[PATCH v7 12/31] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc ops

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 2 + tcg/loongarch64/tcg-target.c.inc | 88 tcg/loongarch64/tcg-target.h | 16 ++--- 3 files changed, 98 insertions

[PATCH v7 14/31] tcg/loongarch64: Implement bswap{16,32,64} ops

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target.c.inc | 32 tcg/loongarch64/tcg-target.h | 10 +- 2 files changed, 37 insertions(+), 5 deletions(-) diff --git a/tcg

[PATCH v7 18/31] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 65 tcg/loongarch64/tcg-target.h | 16 +++ 3 files changed, 74

[PATCH v7 08/31] tcg/loongarch64: Implement the memory barrier op

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target.c.inc | 32 1 file changed, 32 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index

[PATCH v7 11/31] tcg/loongarch64: Implement sign-/zero-extension ops

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 82 tcg/loongarch64/tcg-target.h | 24 3 files changed, 95

[PATCH v7 17/31] tcg/loongarch64: Implement add/sub ops

2021-11-22 Thread WANG Xuerui
The neg_i{32,64} ops is fully expressible with sub, so omitted for simplicity. Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 2 ++ tcg/loongarch64/tcg-target.c.inc | 38

[PATCH v7 16/31] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 91 tcg/loongarch64/tcg-target.h | 4 +- 3 files changed, 94 insertions

[PATCH v7 06/31] tcg/loongarch64: Define the operand constraints

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-str.h | 28 +++ tcg/loongarch64/tcg-target.c.inc | 52 2 files changed, 80 insertions(+) create mode 100644 tcg

[PATCH v7 09/31] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target.c.inc | 137 +++ 1 file changed, 137 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index

[PATCH v7 05/31] tcg/loongarch64: Add register names, allocation order and input/output sets

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 118 +++ 1 file changed, 118 insertions(+) create mode 100644 tcg/loongarch64/tcg-target.c.inc diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg

[PATCH v7 07/31] tcg/loongarch64: Implement necessary relocation operations

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 66 1 file changed, 66 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 64e57bd055..fbacaef862 100644 --- a/tcg

[PATCH v7 01/31] elf: Add machine type value for LoongArch

2021-11-22 Thread WANG Xuerui
-gdb.git;a=commit;h=01a8c731aacbdbed0eb5682d13cc074dc7e25fb3 Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- include/elf.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/elf.h b/include/elf.h index 811bf4a1cb..3a4bcb646a 100644 --- a

[PATCH v7 02/31] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer

2021-11-22 Thread WANG Xuerui
I ported the initial code, so I should maintain it of course. Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- MAINTAINERS | 5 + 1 file changed, 5 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index d3879aa3c1..a638fb6b31 100644

[PATCH v7 03/31] tcg/loongarch64: Add the tcg-target.h file

2021-11-22 Thread WANG Xuerui
Support for all optional TCG ops are initially marked disabled; the bits are to be set in individual commits later. Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target.h | 180 +++ 1 file

[PATCH v7 00/31] LoongArch64 port of QEMU TCG

2021-11-22 Thread WANG Xuerui
0n.name/ v5: https://patchew.org/QEMU/20210924172527.904294-1-...@xen0n.name/ v4: https://patchew.org/QEMU/20210923165939.729081-1-...@xen0n.name/ v3: https://patchew.org/QEMU/20210922180927.666273-1-...@xen0n.name/ v2: https://patchew.org/QEMU/20210921201915.601245-1-...@xen0n.name/ v1:

[PATCH v7 04/31] tcg/loongarch64: Add generated instruction opcodes and encoding helpers

2021-11-22 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Acked-by: Richard Henderson --- tcg/loongarch64/tcg-insn-defs.c.inc | 979 1 file changed, 979 insertions(+) create mode 100644 tcg/loongarch64/tcg-insn-defs.c.inc diff --git a/tcg/loongarch64/tcg-insn-defs.c.inc b/tcg/loongarch64/tcg

Re: [PATCH v10 04/26] target/loongarch: Add fixed point arithmetic instruction translation

2021-11-12 Thread WANG Xuerui
On 11/12/21 22:05, Richard Henderson wrote: On 11/12/21 7:53 AM, Song Gao wrote: +# +# Fields +# +%rd  0:5 +%rj  5:5 +%rk  10:5 +%sa2 15:2 +%si12    10:s12 +%ui12    10:12 +%si16    10:s16 +%si20    5:s20 You should only create separate field definitions like this when they ar

Re: [PATCH] audio: Add sndio backend

2021-11-09 Thread WANG Xuerui
On 2021/11/7 13:19, Brad Smith wrote: > audio: Add sndio backend > > Add a sndio backend. > > sndio is the native API used by OpenBSD, although it has been ported to > other *BSD's and Linux (packages for Ubuntu, Debian, Void, Arch, etc.). > > The C code is from Alexandre Ratchov and the rest of

Re: [PATCH v8 28/29] accel/tcg/user-exec: Implement CPU-specific signal handler for loongarch64 hosts

2021-11-01 Thread WANG Xuerui
Hi, On 2021/11/1 19:21, gaosong wrote: > Hi Xuerui, > > On 2021/11/1 下午6:45, WANG Xuerui wrote: >> While I can see this patch and the next one are clearly from me, my >> author info is lost as I didn't spot any "From:" line in the mail body? >> Also I do

Re: [PATCH v8 28/29] accel/tcg/user-exec: Implement CPU-specific signal handler for loongarch64 hosts

2021-11-01 Thread WANG Xuerui
Hi, On 2021/11/1 17:51, Song Gao wrote: > Base-on: <20210925173032.2434906-30-...@xen0n.name> > Signed-off-by: Song Gao > Signed-off-by: Xiaojuan Yang > --- > accel/tcg/user-exec.c | 64 > --- > 1 file changed, 61 insertions(+), 3 deletions(-) W

Re: [PATCH v7 21/21] scripts: add loongarch64 binfmt config

2021-10-21 Thread WANG Xuerui
On 2021/10/21 14:24, Song Gao wrote: > Hi, Xuerui > > On 10/18/2021 11:49 PM, WANG Xuerui wrote: >> Hi Song, >> >> On 10/18/21 20:47, Song Gao wrote: >>> Signed-off-by: Song Gao >>> Signed-off-by: Xiaojuan Yang >>> Reviewed-by: Richard He

Re: [PATCH v7 02/21] target/loongarch: Add core definition

2021-10-20 Thread WANG Xuerui
On 10/21/21 11:21, Song Gao wrote: BTW, Account yangxiaoj...@loongson.cn It seems that she has been blacklisted. Xiaojuan sent 31 e-mails, which were not displayed since the 21st one, people who don't have a CC can't read all the emails,  and xiaojuan reply can't be in qemu-le...@nongnu.org.

Re: [PATCH v7 02/21] target/loongarch: Add core definition

2021-10-20 Thread WANG Xuerui
On 2021/10/20 16:54, Song Gao wrote: > On 10/19/2021 01:38 AM, Philippe Mathieu-Daudé wrote: >> On 10/18/21 18:06, WANG Xuerui wrote: >> >> On 10/18/21 20:47, Song Gao wrote: >>>> +static void set_loongarch_cpucfg(CPULoongArchState *env) >>>> +{ &g

Re: [PATCH 00/31] Add Loongarch softmmu support.

2021-10-19 Thread WANG Xuerui
Hi Xiaojuan, On 2021/10/20 09:33, 杨小娟 wrote: > Hi, Xuerui > Thank you for your advice, I‘ll modify the README and put the binary in > the github. > The remaining patches are send backed, I’ll find the cause and send them > again. Okay, understood; thanks for the quick response. You ma

Re: [PATCH 00/31] Add Loongarch softmmu support.

2021-10-19 Thread WANG Xuerui
Hi Xiaojuan, On 10/19/21 15:34, Xiaojuan Yang wrote: This series patch add softmmu support for LoongArch. Base on the linux-user emulation support V7 patch. The latest kernel: * https://github.com/loongson/linux/tree/loongarch-next The manual: * https://github.com/loongson/LoongArch-Docum

Re: [PATCH v7 16/21] target/loongarch: Add disassembler

2021-10-18 Thread WANG Xuerui
On 10/19/21 01:29, Richard Henderson wrote: On 10/18/21 8:38 AM, WANG Xuerui wrote: For now any implementation would suffice, and I already saw one or two bugs in the output during my TCG host work, but it surely would be nice to switch to generated decoder in the future. The loongarch

Re: [PATCH v7 02/21] target/loongarch: Add core definition

2021-10-18 Thread WANG Xuerui
Hi Song, On 10/18/21 20:47, Song Gao wrote: This patch add target state header, target definitions and initialization routines. "adds"; fix in other patches too. Signed-off-by: Song Gao Signed-off-by: Xiaojuan Yang Reviewed-by: Richard Henderson --- target/loongarch/cpu-param.h | 19 +++

Re: [PATCH v7 21/21] scripts: add loongarch64 binfmt config

2021-10-18 Thread WANG Xuerui
Hi Song, On 10/18/21 20:47, Song Gao wrote: Signed-off-by: Song Gao Signed-off-by: Xiaojuan Yang Reviewed-by: Richard Henderson --- scripts/qemu-binfmt-conf.sh | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/scripts/qemu-binfmt-conf.sh b/scripts/qemu-binfmt-conf.sh

Re: [PATCH v7 16/21] target/loongarch: Add disassembler

2021-10-18 Thread WANG Xuerui
Hi Song, On 10/18/21 20:47, Song Gao wrote: This patch add support for disassembling via option '-d in_asm'. Signed-off-by: Song Gao Signed-off-by: Xiaojuan Yang Acked-by: Richard Henderson --- MAINTAINERS |1 + disas/loongarch.c | 2511 ++

Re: [PATCH v7 17/21] LoongArch Linux User Emulation

2021-10-18 Thread WANG Xuerui
Hi Song, Sorry for the late review; I only became aware of this work and subscribed to qemu-devel after you sent v6, so I wasn't able to reply to that thread I didn't receive earlier. On 10/18/21 20:47, Song Gao wrote: Implementation of linux user emulation for LoongArch. Signed-off-by: Son

Re: [PATCH 3/8] accel/tcg: Support TCG_TARGET_SIGNED_ADDR32 for softmmu

2021-10-10 Thread WANG Xuerui
Hi Richard, On 2021/10/11 01:43, Richard Henderson wrote: > When TCG_TARGET_SIGNED_ADDR32 is set, adjust the tlb addend to > allow the 32-bit guest address to be sign extended within the > 64-bit host register instead of zero extended. > > This will simplify tcg hosts like MIPS, RISC-V, and LoongA

Re: [PATCH 2/8] accel/tcg: Split out g2h_tlbe

2021-10-10 Thread WANG Xuerui
ions(+), 10 deletions(-) Reviewed-by: WANG Xuerui

Re: [PATCH 1/8] tcg: Add TCG_TARGET_SIGNED_ADDR32

2021-10-10 Thread WANG Xuerui
.h > create mode 100644 tcg/ppc/tcg-target-sa32.h > create mode 100644 tcg/riscv/tcg-target-sa32.h > create mode 100644 tcg/s390x/tcg-target-sa32.h > create mode 100644 tcg/sparc/tcg-target-sa32.h > create mode 100644 tcg/tci/tcg-target-sa32.h Reviewed-by: WANG Xuerui

Re: [PATCH 7/8] target/mips: Support TCG_TARGET_SIGNED_ADDR32

2021-10-10 Thread WANG Xuerui
Hi Richard, On 2021/10/11 01:44, Richard Henderson wrote: > All 32-bit mips operations sign-extend the output, so we are easily > able to keep TCG_TYPE_I32 values sign-extended in host registers. > > Signed-off-by: Richard Henderson > --- > tcg/mips/tcg-target-sa32.h | 8 > tcg/mips/tc

Re: [PATCH v6 26/30] tcg/loongarch64: Implement tcg_target_init

2021-09-29 Thread WANG Xuerui
Hi Richard, On 9/27/21 07:07, Richard Henderson wrote: On 9/26/21 3:15 AM, Philippe Mathieu-Daudé wrote: On 9/25/21 19:30, WANG Xuerui wrote: Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson ---   tcg/loongarch64/tcg-target.c.inc | 27 +++   1 file changed

Re: [PATCH 1/2] bsd-user: Only process meson rules on BSD host

2021-09-26 Thread WANG Xuerui
On 9/27/21 10:42, WANG Xuerui wrote: On 9/27/21 06:01, Philippe Mathieu-Daudé wrote: Reported-by: Warner Losh Signed-off-by: Philippe Mathieu-Daudé ---   bsd-user/meson.build | 4   1 file changed, 4 insertions(+) I'm newcomer here, but this is just 4 lines of Meson, and two si

Re: [PATCH 2/2] linux-user: Only process meson rules on Linux host

2021-09-26 Thread WANG Xuerui
On 9/27/21 06:01, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- linux-user/meson.build | 4 1 file changed, 4 insertions(+) Reviewed-by: WANG Xuerui

Re: [PATCH 1/2] bsd-user: Only process meson rules on BSD host

2021-09-26 Thread WANG Xuerui
roper so... Reviewed-by: WANG Xuerui

Re: Add LoongArch support to RISU?

2021-09-26 Thread WANG Xuerui
(also adding qemu-devel to Cc) On 9/26/21 16:25, Philippe Mathieu-Daudé wrote: Hi Xuerui, Looking at the script [1] used in your series adding LoongArch TCG backend [2], I think all the bits are in place to also generate most of the files required to run RISU [3] and use it to be able to test S

[PATCH v6 28/30] linux-user: Add safe syscall handling for loongarch64 hosts

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- linux-user/host/loongarch64/hostdep.h | 34 .../host/loongarch64/safe-syscall.inc.S | 80 +++ 2 files changed, 114 insertions(+) create mode 100644 linux-user/host/loongarch64/hostdep.h create

[PATCH v6 29/30] accel/tcg/user-exec: Implement CPU-specific signal handler for loongarch64 hosts

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- accel/tcg/user-exec.c | 73 +++ 1 file changed, 73 insertions(+) diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 8fed542622..38d4ad8a7d

[PATCH v6 30/30] configure, meson.build: Mark support for loongarch64 hosts

2021-09-25 Thread WANG Xuerui
nately. Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- configure | 7 ++- meson.build | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/configure b/configure index 1043ccce4f..3a9035385d 100755 --- a/configure +++

[PATCH v6 14/30] tcg/loongarch64: Implement bswap{16,32,64} ops

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 32 tcg/loongarch64/tcg-target.h | 10 +- 2 files changed, 37 insertions(+), 5 deletions(-) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg

[PATCH v6 27/30] tcg/loongarch64: Register the JIT

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 44 1 file changed, 44 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index e3c73f9fe7..73f230b412 100644 --- a/tcg

[PATCH v6 21/30] tcg/loongarch64: Implement tcg_out_call

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 34 1 file changed, 34 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 682bf76ceb..e470d7e145 100644 --- a/tcg

[PATCH v6 20/30] tcg/loongarch64: Implement setcond ops

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 69 2 files changed, 70 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target

[PATCH v6 15/30] tcg/loongarch64: Implement clz/ctz ops

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 42 tcg/loongarch64/tcg-target.h | 8 +++--- 3 files changed, 47 insertions(+), 4 deletions(-) diff --git a

[PATCH v6 24/30] tcg/loongarch64: Implement tcg_target_qemu_prologue

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 68 1 file changed, 68 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index ebf886ef8c..207d15ed88 100644 --- a/tcg

[PATCH v6 26/30] tcg/loongarch64: Implement tcg_target_init

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 27 +++ 1 file changed, 27 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index d0b8ac05c9..e3c73f9fe7 100644 --- a/tcg

[PATCH v6 23/30] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 2 + tcg/loongarch64/tcg-target.c.inc | 353 +++ 2 files changed, 355 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target

[PATCH v6 13/30] tcg/loongarch64: Implement deposit/extract ops

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 21 + tcg/loongarch64/tcg-target.h | 8 3 files changed, 26 insertions(+), 4 deletions(-) diff --git a/tcg

[PATCH v6 18/30] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 65 tcg/loongarch64/tcg-target.h | 16 +++ 3 files changed, 74

[PATCH v6 22/30] tcg/loongarch64: Implement simple load/store ops

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 131 +++ 2 files changed, 132 insertions(+) diff --git a/tcg/loongarch64/tcg-target

[PATCH v6 16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 91 tcg/loongarch64/tcg-target.h | 4 +- 3 files changed, 94 insertions

[PATCH v6 09/30] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 137 +++ 1 file changed, 137 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index f12955723d..4487851b5e 100644 --- a/tcg

[PATCH v6 07/30] tcg/loongarch64: Implement necessary relocation operations

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 66 1 file changed, 66 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 64e57bd055..fbacaef862 100644 --- a/tcg

[PATCH v6 25/30] tcg/loongarch64: Implement exit_tb/goto_tb

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 19 +++ 1 file changed, 19 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 207d15ed88..d0b8ac05c9 100644 --- a/tcg/loongarch64

[PATCH v6 17/30] tcg/loongarch64: Implement add/sub ops

2021-09-25 Thread WANG Xuerui
The neg_i{32,64} ops is fully expressible with sub, so omitted for simplicity. Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 2 ++ tcg/loongarch64/tcg-target.c.inc | 38

[PATCH v6 08/30] tcg/loongarch64: Implement the memory barrier op

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target.c.inc | 32 1 file changed, 32 insertions(+) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index

[PATCH v6 19/30] tcg/loongarch64: Implement br/brcond ops

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 53 2 files changed, 54 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con

[PATCH v6 05/30] tcg/loongarch64: Add register names, allocation order and input/output sets

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 118 +++ 1 file changed, 118 insertions(+) create mode 100644 tcg/loongarch64/tcg-target.c.inc diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg

[PATCH v6 11/30] tcg/loongarch64: Implement sign-/zero-extension ops

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 1 + tcg/loongarch64/tcg-target.c.inc | 82 tcg/loongarch64/tcg-target.h | 24 3 files changed, 95

[PATCH v6 06/30] tcg/loongarch64: Define the operand constraints

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-str.h | 28 +++ tcg/loongarch64/tcg-target.c.inc | 52 2 files changed, 80 insertions(+) create mode 100644 tcg

[PATCH v6 00/30] LoongArch64 port of QEMU TCG

2021-09-25 Thread WANG Xuerui
0n.name/ v4: https://patchew.org/QEMU/20210923165939.729081-1-...@xen0n.name/ v3: https://patchew.org/QEMU/20210922180927.666273-1-...@xen0n.name/ v2: https://patchew.org/QEMU/20210921201915.601245-1-...@xen0n.name/ v1: https://patchew.org/QEMU/20210920080451.408655-1-...@xen0n.name/ WANG Xuerui (30)

[PATCH v6 04/30] tcg/loongarch64: Add generated instruction opcodes and encoding helpers

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Acked-by: Richard Henderson --- tcg/loongarch64/tcg-insn-defs.c.inc | 979 1 file changed, 979 insertions(+) create mode 100644 tcg/loongarch64/tcg-insn-defs.c.inc diff --git a/tcg/loongarch64/tcg-insn-defs.c.inc b/tcg/loongarch64/tcg

[PATCH v6 12/30] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc ops

2021-09-25 Thread WANG Xuerui
Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- tcg/loongarch64/tcg-target-con-set.h | 2 + tcg/loongarch64/tcg-target.c.inc | 88 tcg/loongarch64/tcg-target.h | 16 ++--- 3 files changed, 98 insertions

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