the dll dependency of qemu.exe

2021-06-26 Thread Wu, Wentong
Hi, I build qemu with MingW, and after the linking, I find the qemu.exe depends on some dlls like below, I understand the glib dependencies, but why qemu uses libffi-6.dll, libiconv-2.dll, libpcre-1.dll libssp-0.dll, libintl-8.dll, libpixman-1-0.dll, zlib1.dll? I just want to use TCG function an

seems currently QEMU doesn't support file backend for RAM memory region on Windows

2021-01-27 Thread Wu, Wentong
There is a doc about the API of memory-mapped file on Windows https://docs.microsoft.com/en-us/previous-versions/ms810613(v=msdn.10)?redirectedfrom=MSDN, not sure anyone is working on it. Thanks Wentong

RE: [PATCH v2 1/3] target/nios2: Move IIC code into CPU object proper

2020-11-30 Thread Wu, Wentong
On Monday, November 30, 2020 5:54 PM, Peter Maydell wrote: > On Mon, 30 Nov 2020 at 05:41, Wu, Wentong wrote: > > Reviewed and tested. > > Thanks! Can I put that in as Reviewed-by/Tested-by lines? Sure and my pleasure, thanks Peter! > > -- PMM

RE: [PATCH v2 2/3] target/nios2: Move nios2_check_interrupts() into target/nios2

2020-11-29 Thread Wu, Wentong
On Monday, November 30, 2020 1:40 AM, Peter Maydell wrote: > The function nios2_check_interrupts)() looks only at CPU-internal state; it > belongs in target/nios2, not hw/nios2. Move it into the same file as its only > caller, so it can just be local to that file. > > This removes the only remain

RE: [PATCH v2 1/3] target/nios2: Move IIC code into CPU object proper

2020-11-29 Thread Wu, Wentong
On Monday, November 30, 2020 1:40 AM, Peter Maydell wrote: > The Nios2 architecture supports two different interrupt controller > options: > > * The IIC (Internal Interrupt Controller) is part of the CPU itself; >it has 32 IRQ input lines and no NMI support. Interrupt status is >queried

RE: [PATCH 1/2] target/nios2: Move cpu_pic code into CPU object proper

2020-11-27 Thread Wu, Wentong
On 11/28/20 3:13 AM, Peter Maydell wrote: > The nios2 code uses an old style of interrupt handling, where a separate > standalone set of qemu_irqs invoke a function > nios2_pic_cpu_handler() which signals the interrupt to the CPU proper by > directly calling cpu_interrupt() and cpu_reset_interr

RE: qemu icount to run guest SMP code

2020-07-28 Thread Wu, Wentong
Thanks for the reply. > > We are trying to run guest SMP code with qemu icount mode, but based on my > > current understanding I don’t think we can do that, because with icount > > enabled, the multi cpus will be simulated in round-robin way(tcg kick vcpu > > timer, or current cpu exit in orde

qemu icount to run guest SMP code

2020-07-28 Thread Wu, Wentong
Hi, We are trying to run guest SMP code with qemu icount mode, but based on my current understanding I don't think we can do that, because with icount enabled, the multi cpus will be simulated in round-robin way(tcg kick vcpu timer, or current cpu exit in order to handle interrupt or the ending

qemu icount to run guest SMP code

2020-07-27 Thread Wu, Wentong
Hi, We are trying to run guest SMP code with qemu icount mode, but based on my current understanding I don't think we can do that, because with icount enabled, the multi cpus will be simulated in round-robin way(tcg kick vcpu timer, or current cpu exit in order to handle interrupt or the ending

RE: [PULL 00/25] target-arm queue

2020-07-14 Thread Wu, Wentong
> -Original Message- > From: Peter Maydell > Sent: Tuesday, July 14, 2020 10:55 PM > To: Wu, Wentong > Cc: QEMU Developers > Subject: Re: [PULL 00/25] target-arm queue > > On Tue, 14 Jul 2020 at 15:52, Wu, Wentong wrote: > > > > > On M

RE: [PULL 00/25] target-arm queue

2020-07-14 Thread Wu, Wentong
> -Original Message- > From: Qemu-devel On > Behalf Of Peter Maydell > Sent: Monday, July 13, 2020 11:59 PM > To: QEMU Developers > Subject: Re: [PULL 00/25] target-arm queue > > On Mon, 13 Jul 2020 at 15:11, Peter Maydell wrote: > > > > Last lot of target-arm changes to squeeze in b

RE: [PATCH v2 1/4] target/nios2: add DISAS_NORETURN case for nothing more to generate

2020-07-12 Thread Wu, Wentong
> -Original Message- > From: Peter Maydell > Sent: Sunday, July 12, 2020 2:50 AM > To: Wu, Wentong > Cc: QEMU Developers ; QEMU Trivial > ; Chris Wulff ; Marek Vasut > > Subject: Re: [PATCH v2 1/4] target/nios2: add DISAS_NORETURN case for nothing > more

Re: [PATCH 3/3] target/nios2: Use gen_io_start around wrctl instruction

2020-07-09 Thread Wu, Wentong
> >On Mon, 29 Jun 2020 at 09:17, Wentong Wu wrote: > > > > wrctl instruction on nios2 target will cause checking cpu > > interrupt but tcg_handle_interrupt() will call cpu_abort() > > if the CPU gets an interrupt while it's not in 'can do IO' > > state, so add gen_io_start around wrctl instruction

RE: [PATCH 3/3] target/nios2: Use gen_io_start around wrctl instruction

2020-07-06 Thread Wu, Wentong
e- > From: Peter Maydell > Sent: Monday, July 6, 2020 1:10 AM > To: Wu, Wentong > Cc: QEMU Developers ; QEMU Trivial > ; Chris Wulff ; Marek Vasut > > Subject: Re: [PATCH 3/3] target/nios2: Use gen_io_start around wrctl > instruction > > On Mon, 29 Jun 2020

RE: [PATCH 3/3] target/nios2: Use gen_io_start around wrctl instruction

2020-07-05 Thread Wu, Wentong
(env->regs[CR_STATUS] & CR_STATUS_PIE)) { env->irq_pending = 0; cpu_interrupt(env_cpu(env), CPU_INTERRUPT_HARD); } -Original Message- From: Richard Henderson Sent: Friday, July 3, 2020 2:54 AM To: Wu, Wentong ; qemu-devel@nongnu.org Cc: qemu-triv...@nongnu.org

RE: [PATCH 3/3] target/nios2: Use gen_io_start around wrctl instruction

2020-07-05 Thread Wu, Wentong
Thanks, I think we can get this series merged currently. -Original Message- From: Peter Maydell Sent: Monday, July 6, 2020 1:10 AM To: Wu, Wentong Cc: QEMU Developers ; QEMU Trivial ; Chris Wulff ; Marek Vasut Subject: Re: [PATCH 3/3] target/nios2: Use gen_io_start around wrctl

RE: [PATCH 3/3] target/nios2: Use gen_io_start around wrctl instruction

2020-07-05 Thread Wu, Wentong
Correct the format > -Original Message- > From: Richard Henderson > Sent: Friday, July 3, 2020 2:54 AM > To: Wu, Wentong ; qemu-devel@nongnu.org > Cc: qemu-triv...@nongnu.org; ma...@denx.de; crwu...@gmail.com; > peter.mayd...@linaro.org > Subject: Re: [PATCH 3

RE: [PATCH 3/3] target/nios2: Use gen_io_start around wrctl instruction

2020-07-05 Thread Wu, Wentong
Correct the format > -Original Message- > From: Richard Henderson > Sent: Friday, July 3, 2020 2:54 AM > To: Wu, Wentong ; qemu-devel@nongnu.org > Cc: qemu-triv...@nongnu.org; ma...@denx.de; crwu...@gmail.com; > peter.mayd...@linaro.org > Subject: Re: [PATCH 3

RE: [PATCH 3/3] target/nios2: Use gen_io_start around wrctl instruction

2020-07-03 Thread Wu, Wentong
HI Peter, Could you please take a look at this patch which is following your pervious suggestion? Thanks -Original Message- From: Wu, Wentong Sent: Tuesday, June 30, 2020 12:06 AM To: qemu-devel@nongnu.org Cc: qemu-triv...@nongnu.org; crwu...@gmail.com; ma...@denx.de; peter.mayd

RE: [PATCH 3/3] target/nios2: Use gen_io_start around wrctl instruction

2020-07-03 Thread Wu, Wentong
-Original Message- From: Richard Henderson Sent: Friday, July 3, 2020 2:54 AM To: Wu, Wentong ; qemu-devel@nongnu.org Cc: qemu-triv...@nongnu.org; ma...@denx.de; crwu...@gmail.com; peter.mayd...@linaro.org Subject: Re: [PATCH 3/3] target/nios2: Use

RE: [PATCH 3/3] target/nios2: Use gen_io_start around wrctl instruction

2020-07-01 Thread Wu, Wentong
Hi, Could you please take a look the new patch? Thanks > -Original Message- > Subject: [PATCH 3/3] target/nios2: Use gen_io_start around wrctl instruction > wrctl instruction on nios2 target will cause checking cpu interrupt but > tcg_handle_interrupt() will call cpu_abort() if the CPU g

RE: [PATCH] hw/nios2: Update interrupt request when CR_STATUS_PIE disabled

2020-06-17 Thread Wu, Wentong
> > > > Update interrupt request when external interupt pends for STATUS_PIE > > disabled. Otherwise on icount enabled nios2 target there will be cpu > > abort when guest code changes state register with wrctl instruction. > > > > Signed-off-by: Wentong Wu > > --- > > hw/nios2/cpu_pic.c | 2 ++

RE: [PATCH] hw/nios2: Update interrupt request when CR_STATUS_PIE disabled

2020-06-16 Thread Wu, Wentong
>Hi, >On 6/12/20 3:43 PM, Wu, Wentong wrote: > > Hi, > >Can any body help review this patch ? Thanks in advance! > You just sent this patch yesterday... Please give reviewers more time. > See: > https://wiki.qemu.org/Contribute/SubmitAPatch#Participating_in_Code_Revi

RE: [PATCH] hw/nios2: Update interrupt request when CR_STATUS_PIE disabled

2020-06-12 Thread Wu, Wentong
Hi, Can any body help review this patch ? Thanks in advance! BR -Original Message- From: Wu, Wentong Sent: Thursday, June 11, 2020 4:13 PM To: qemu-devel@nongnu.org Cc: qemu-triv...@nongnu.org; crwu...@gmail.com; ma...@denx.de; th...@redhat.com; Wu, Wentong Subject: [PATCH] hw/nios2

RE: [RFC] hw: nios2: update interrupt_request when STATUS_PIE disabled

2020-06-10 Thread Wu, Wentong
PM To: Wu, Wentong ; qemu-devel@nongnu.org Cc: Chris Wulff ; Marek Vasut Subject: Re: [RFC] hw: nios2: update interrupt_request when STATUS_PIE disabled On 09/06/2020 10.39, Wu, Wentong wrote: > Hi @Thomas Huth, > It's my first time to send patch in qemu community, not sure if there

RE: [RFC] hw: nios2: update interrupt_request when STATUS_PIE disabled

2020-06-09 Thread Wu, Wentong
uth Sent: Friday, June 5, 2020 3:07 PM To: Wu, Wentong ; qemu-devel@nongnu.org Cc: Chris Wulff ; Marek Vasut Subject: Re: [RFC] hw: nios2: update interrupt_request when STATUS_PIE disabled On 05/06/2020 07.59, Wu, Wentong wrote: > Hi all, > > I’m running icount mode on qemu_nios2 with c

RE: [RFC] hw: nios2: update interrupt_request when STATUS_PIE disabled

2020-06-07 Thread Wu, Wentong
@Chris Wulff @Marek Vasut could you please take a look this issue and patch? Thanks in advance! -Original Message- From: Thomas Huth Sent: Friday, June 5, 2020 3:07 PM To: Wu, Wentong ; qemu-devel@nongnu.org Cc: Chris Wulff ; Marek Vasut Subject: Re: [RFC] hw: nios2: update

RE: [RFC] hw: nios2: update interrupt_request when STATUS_PIE disabled

2020-06-05 Thread Wu, Wentong
Thanks Thomas! @Chris Wulff @Marek Vasut could you please give some suggestions? Thanks -Original Message- From: Thomas Huth Sent: Friday, June 5, 2020 3:07 PM To: Wu, Wentong ; qemu-devel@nongnu.org Cc: Chris Wulff ; Marek Vasut Subject: Re: [RFC] hw: nios2: update interrupt_request

[RFC] hw: nios2: update interrupt_request when STATUS_PIE disabled

2020-06-04 Thread Wu, Wentong
Hi all, I'm running icount mode on qemu_nios2 with customized platform(almost same with 10m50_devboard), but cpu abort happened(qemu: fatal: Raised interrupt while not in I/O function) when guest code changes state register with wrctl instruction, add some debug code finding that it's caused by

[Qemu-devel] qemu icount mode timer accuracy

2019-08-19 Thread Wu, Wentong
Could anyone please give some comments? Thanks in advance! Hi, Recently I'm working to enable Qemu icount mode with TCG, with source code review I found that Qemu can give deterministic execution for guest code timeout. But for exact time point for guest OS, I have a question: For armv7m_s

[Qemu-devel] qemu icount mode timer accuracy

2019-08-19 Thread Wu, Wentong
Could you please give some comments about this? Thanks a lot!

[Qemu-devel] qemu icount mode timer accuracy

2019-08-08 Thread Wu, Wentong
Hi, Recently I'm working to enable Qemu icount mode with TCG, with source code review I found that Qemu can give deterministic execution for guest code timeout. But for exact time point for guest OS, I have a question: For armv7m_systick.c example, guest OS will use systick_read which will ca

Re: [Qemu-devel] in icount mode guest OS can't boot on qemu_x86 when shift value range in [0, 3]

2019-07-10 Thread Wu, Wentong
Add more info: the qemu binary is qemu-system-i386 and it's TCG mode, not kvm. From: Wu, Wentong Sent: Wednesday, July 10, 2019 3:01 PM To: 'qemu-devel@nongnu.org' Subject: in icount mode guest OS can't boot on qemu_x86 when shift value range in [0, 3] Hi all, I'm r

[Qemu-devel] in icount mode guest OS can't boot on qemu_x86 when shift value range in [0, 3]

2019-07-10 Thread Wu, Wentong
Hi all, I'm running a rtos on qemu_x86 with icount mode enabled, shift value located in [0, 3], there is very high possibility that the guest os(the rtos) can't boot up. Does anyone have any idea for this issue? And this issue blocked me long time, appreciate any input? Thanks

Re: [Qemu-devel] icount mode

2019-06-25 Thread Wu, Wentong
Hi Alex, If there is something wrong, please tell me. I really like to have some discusses with Qemu developers about icount mode. Thanks a lot! Wentong Wu -Original Message- From: Wu, Wentong Sent: Tuesday, June 25, 2019 4:44 AM To: 'Alex Bennée' ; qemu-devel@nongnu.org S

Re: [Qemu-devel] icount mode

2019-06-24 Thread Wu, Wentong
Behalf Of Alex Bennée Sent: Monday, June 24, 2019 11:48 PM To: qemu-devel@nongnu.org Subject: Re: [Qemu-devel] icount mode Wu, Wentong writes: > Hi all, > > Recently I'm using Qemu TCG icount mode, from the code I found Qemu > timers run at 1GHz, and for ArmV7M example, there w

[Qemu-devel] icount mode

2019-06-24 Thread Wu, Wentong
Hi all, Recently I'm using Qemu TCG icount mode, from the code I found Qemu timers run at 1GHz, and for ArmV7M example, there will be conversion factor from qemu timer to SysTick frequency which will be calculated by NANOSECONDS_PER_SECOND / SYSCLK_FRQ. But the shift value also define the targe