TD guest can use TDG.VP.VMCALL to request termination
with error message encoded in GPRs.
Parse and print the error message, and terminate the TD guest in the
handler.
Signed-off-by: Xiaoyao Li
---
target/i386/kvm/tdx.c | 39 +++
target/i386/kvm/tdx.h | 1
TDX CPU state is protected and thus vcpu state cann't be reset by VMM.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
---
target/i386/kvm/kvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index e36ece874246..0ec0584d22ca
For TDs, only MSR_IA32_UCODE_REV in kvm_init_msrs() can be configured
by VMM, while the features enumerated/controlled by other MSRs except
MSR_IA32_UCODE_REV in kvm_init_msrs() are not under control of VMM.
Only configure MSR_IA32_UCODE_REV for TDs.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd
From: Sean Christopherson
Move the architectural (for lack of a better term) CPUID leaf generation
to a separate helper so that the generation code can be reused by TDX,
which needs to generate a canonical VM-scoped configuration.
Signed-off-by: Sean Christopherson
Signed-off-by: Xiaoyao Li
From: Isaku Yamahata
MapGPA is a hypercall to convert GPA from/to private GPA to/from shared GPA.
As the conversion function is already implemented as kvm_convert_memory,
wire it to TDX hypercall exit.
Signed-off-by: Isaku Yamahata
Signed-off-by: Xiaoyao Li
---
accel/kvm/kvm-all.c | 2
TD runs and no need to be accepted runtime.
The TdxRamEntries[] are later used to setup the memory TD resource HOB
that passes memory info from QEMU to TDVF.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
---
Changes in v3:
- use enum TdxRamType in struct TdxRamEntry; (Isaku)
- Fix
or TDX VMs
Xiaoyao Li (47):
linux-headers: Update to Linux v6.8-rc1
RAMBlock: Add support of KVM private guest memfd
HostMem: Add mechanism to opt in kvm guest memfd via MachineState
trace/kvm: Split address space and slot id in
trace_kvm_set_user_memory()
kvm: Introdu
From: Isaku Yamahata
In mch_realize(), process PAM initialization before SMRAM initialization so
that later patch can skill all the SMRAM related with a single check.
Signed-off-by: Isaku Yamahata
Signed-off-by: Xiaoyao Li
---
hw/pci-host/q35.c | 19 ++-
1 file changed, 10
Invoke KVM_TDX_FINALIZE_VM to finalize the TD's measurement and make
the TD vCPUs runnable once machine initialization is complete.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
---
target/i386/kvm/tdx.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/target/i386/kvm/tdx.c b
TDX cannot support pflash device since it doesn't support read-only
memslot and doesn't support emulation. Load TDVF(OVMF) with -bios option
for TDs.
When boot a TD, besides loading TDVF to the address below 4G, it needs
parse TDVF metadata.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
From: Chao Peng
Allocate private guest memfd memory for BIOS if it's TD VM.
Signed-off-by: Chao Peng
Co-developed-by: Xiaoyao Li
Signed-off-by: Xiaoyao Li
---
hw/i386/x86.c | 10 +-
target/i386/kvm/tdx.c | 18 ++
target/i386/kvm/tdx.h | 2 ++
3 files changed
-by: Isaku Yamahata
Co-developed-by: Sean Christopherson
Signed-off-by: Sean Christopherson
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
---
Changes in v1:
- drop the code of adding mmio resources since OVMF prepares all the
MMIO hob itself.
---
hw/i386/meson.build | 2 +-
hw
evious step);
- add configurable bits (it covers the other part of type #1);
- fix the ones in vmm_fixup;
(Calculated type is ignored since it's determined at runtime).
Co-developed-by: Chenyi Qiang
Signed-off-by: Chenyi Qiang
Signed-off-by: Xiaoyao Li
---
target/i386/cpu.h | 16 +++
t
For QEMU VMs, PKS is configured via CPUID_7_0_ECX_PKS and PMU is
configured by x86cpu->enable_pmu. Reuse the existing configuration
interface for TDX VMs.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
---
target/i386/kvm/tdx.c | 13 +
1 file changed, 13 insertions(+)
d
Some bits in TD attributes have corresponding CPUID feature bits. Reflect
the fixed0/1 restriction on TD attributes to their corresponding CPUID
bits in tdx_cpuid_lookup[] as well.
Signed-off-by: Xiaoyao Li
---
Changes in v4:
- reverse the meaning of tdx_caps->attr_fixed0, because valu
to do the stuff.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
---
hw/i386/tdvf.c | 1 +
include/hw/i386/tdvf.h | 7 +++
target/i386/kvm/tdx.c | 31 +++
3 files changed, 39 insertions(+)
diff --git a/hw/i386/tdvf.c b/hw/i386/tdvf.c
index ff51f40088f0
From: Isaku Yamahata
For TDX KVM use case, Linux guest is the most major one. It requires
sept_ve_disable set. Make it default for the main use case. For other use
case, it can be enabled/disabled via qemu command line.
Signed-off-by: Isaku Yamahata
---
target/i386/kvm/tdx.c | 2 +-
1 file
Guest memfd support in QEMU requires corresponding KVM guest memfd APIs,
which lands in Linux from v6.8-rc1.
Signed-off-by: Xiaoyao Li
---
include/standard-headers/drm/drm_fourcc.h | 10 +-
include/standard-headers/linux/ethtool.h | 41 +++--
.../standard-headers/linux
to configure
this bit.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
Acked-by: Markus Armbruster
---
Changes in v4:
- collect Acked-by from Markus
Changes in v3:
- update the comment of property @sept-ve-disable to make it more
descriptive and use new format. (Daniel and Markus)
---
qapi
Reuse "-cpu,tsc-frequency=" to get user wanted tsc frequency and call VM
scope VM_SET_TSC_KHZ to set the tsc frequency of TD before KVM_TDX_INIT_VM.
Besides, sanity check the tsc frequency to be in the legal range and
legal granularity (required by TDX module).
Signed-off-by: Xiaoyao
looking up the machine in phymem.c.
MachineState::require_guest_memfd is supposed to be set by any VMs
that requires KVM guest memfd as private memory, e.g., TDX VM.
Signed-off-by: Xiaoyao Li
---
Changes in v4:
- rename "require_guest_memfd" to "guest_memfd" in struct
may change the CPUID
configuration when creating vCPUs, i.e. punts on refactoring QEMU to
provide a stable CPUID config prior to kvm_arch_init().
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
Acked-by: Markus Armbruster
---
Changes in v4:
- mark init_vm with g_autofree() and use
dx0,...
it parses VM type as KVM_X86_TDX_VM. Otherwise, it's KVM_X86_DEFAULT_VM.
Also store the vm_type in MachineState for other code to query what the
VM type is.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
---
Changes in v4:
- fix the build error of kvm_get_vm_type() when --disable-
Introduce a separate function kvm_confidential_guest_init(), which
dispatches specific confidential guest initialization function by
ms->cgs type.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
---
target/i386/kvm/kvm.c | 11 ++-
target/i
When memory page is converted from private to shared, the original
private memory is back'ed by guest_memfd. Introduce
ram_block_discard_guest_memfd_range() for discarding memory in
guest_memfd.
Originally-from: Isaku Yamahata
Codeveloped-by: Xiaoyao Li
Signed-off-by: Xiaoyao Li
---
Changes
Introduce kvm_arch_pre_create_vcpu(), to perform arch-dependent
work prior to create any vcpu. This is for i386 TDX because it needs
call TDX_INIT_VM before creating any vcpu.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
---
Changes in v3:
- pass @errp to kvm_arch_pre_create_vcpu(); (Per
It will need special handling for TDX VMs all around the QEMU.
Introduce is_tdx_vm() helper to query if it's a TDX VM.
Cache tdx_guest object thus no need to cast from ms->cgs every time.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
Reviewed-by: Isaku Yamahata
---
changes in
Intel-PT unsupported for TD
guest, to avoid the confusing warning.
[1]
https://lore.kernel.org/qemu-devel/20230531084311.3807277-1-xiaoyao...@intel.com/
Signed-off-by: Xiaoyao Li
---
Changes in v4:
- newly added patch;
---
target/i386/kvm/tdx.c | 5 +
1 file changed, 5 insertions(+)
diff
, RAM_GUEST_MEMFD is supposed to be set for memory backends of
confidential guests, such as TDX VM. How and when to set it for memory
backends will be implemented in the following patches.
Introduce memory_region_has_guest_memfd() to query if the MemoryRegion has
KVM guest_memfd allocated.
Signed-off-by: Xiaoyao
From: Isaku Yamahata
Signed-off-by: Isaku Yamahata
Signed-off-by: Xiaoyao Li
---
accel/kvm/kvm-all.c| 2 ++
accel/kvm/trace-events | 1 +
2 files changed, 3 insertions(+)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 2421b8a5b314..def2b46b9de2 100644
--- a/accel/kvm/kvm
fields by removing the bits that
reported from TDX module as configurable. This can adapt with the
updated TDX (module) automatically.
Signed-off-by: Xiaoyao Li
---
target/i386/kvm/tdx.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/target/i386/kvm/tdx.c
KVM requires userspace to pass XFAM configuration via CPUID 0xD leaves.
Convert tdx_caps->xfam_fixed0/1 into corresponding
tdx_cpuid_lookup[].tdx_fixed0/1 field of CPUID 0xD leaves. Thus the
requirement can be applied naturally.
Signed-off-by: Xiaoyao Li
---
target/i386/cpu.c |
and not
configurable so far.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
Acked-by: Markus Armbruster
---
Changes in v4:
- update the new qapi `since` filed from 8.2 to 9.0
Changes in v1
- make @attributes not user-settable
---
configs/devices/i386-softmmu/default.mak | 1 +
hw/i386/Kconfig
The upper 16 bits of kvm_userspace_memory_region::slot are
address space id. Parse it separately in trace_kvm_set_user_memory().
Signed-off-by: Xiaoyao Li
---
accel/kvm/kvm-all.c| 5 +++--
accel/kvm/trace-events | 2 +-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/accel
No such constraint that subleaf index needs to be less than 64.
Signed-off-by: Xiaoyao Li
Reviewed-by:Yang Weijiang
---
target/i386/kvm/kvm.c | 4
1 file changed, 4 deletions(-)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index dff9dedbd761..9758c83693ec 100644
v1:
https://lore.kernel.org/qemu-devel/20220712021249.3227256-1-xiaoyao...@intel.com/
Xiaoyao Li (3):
i386/cpuid: Decrease cpuid_i when skipping CPUID leaf 1F
i386/cpuid: Remove subleaf constraint on CPUID leaf 1F
i386/cpuid: Move leaf 7 to correct group
target/i386/kvm/kvm.c | 7 ++-
1 fi
Existing code misses a decrement of cpuid_i when skip leaf 0x1F.
There's a blank CPUID entry(with leaf, subleaf as 0, and all fields
stuffed 0s) left in the CPUID array.
It conflicts with correct CPUID leaf 0.
Signed-off-by: Xiaoyao Li
Reviewed-by:Yang Weijiang
---
target/i386/kvm/kvm.c | 1
t.
Leaf 7 follows the logic that EAX of subleaf 0 enumerates the maximum
valid subleaf.
Fixes: b9edbadefb9e ("i386: Propagate SGX CPUID sub-leafs to KVM")
Signed-off-by: Xiaoyao Li
---
target/i386/kvm/kvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/kvm
Use __func__ to avoid hard-coded function name.
Signed-off-by: Xiaoyao Li
Reviewed-by: David Hildenbrand
---
system/physmem.c | 38 +-
1 file changed, 17 insertions(+), 21 deletions(-)
diff --git a/system/physmem.c b/system/physmem.c
index cc68a7976378
On 10/18/2023 9:27 PM, Michael S. Tsirkin wrote:
On Sat, Oct 07, 2023 at 02:58:19AM -0400, Xiaoyao Li wrote:
pc_machine_kvm_type() was introduced by commit e21be724eaf5 ("i386/xen:
add pc_machine_kvm_type to initialize XEN_EMULATE mode") to do Xen
specific initialization by utilizin
On 1/23/2024 11:39 PM, Marcelo Tosatti wrote:
On Sat, Jan 20, 2024 at 05:44:07PM +0800, Xiaoyao Li wrote:
On 1/20/2024 12:14 AM, Marcelo Tosatti wrote:
On Fri, Jan 19, 2024 at 02:46:22PM +0800, Xiaoyao Li wrote:
I'm wondering why CPUID_APM_INVTSC is set as unmigratable_flags. Could
anyone
On 1/20/2024 12:14 AM, Marcelo Tosatti wrote:
On Fri, Jan 19, 2024 at 02:46:22PM +0800, Xiaoyao Li wrote:
I'm wondering why CPUID_APM_INVTSC is set as unmigratable_flags. Could
anyone explain it?
commit 68bfd0ad4a1dcc4c328d5db85dc746b49c1ec07e
Author: Marcelo Tosatti
Date: Wed May 14 16
I'm wondering why CPUID_APM_INVTSC is set as unmigratable_flags. Could
anyone explain it?
When the host supports invtsc, it can be exposed to guest.
When the src VM has invtsc exposed, what will forbid it to be migrated
to a dest that also supports VMs with invtsc exposed?
On 1/15/2024 11:18 PM, Zhao Liu wrote:
Hi Xiaoyao,
On Mon, Jan 15, 2024 at 03:45:58PM +0800, Xiaoyao Li wrote:
Date: Mon, 15 Jan 2024 15:45:58 +0800
From: Xiaoyao Li
Subject: Re: [PATCH v7 10/16] i386/cpu: Introduce cluster-id to X86CPU
On 1/15/2024 1:59 PM, Zhao Liu wrote:
(Also cc
On 1/16/2024 10:19 PM, Zhao Liu wrote:
Hi Xiaoyao,
On Mon, Jan 15, 2024 at 04:13:23AM -0500, Xiaoyao Li wrote:
Date: Mon, 15 Jan 2024 04:13:23 -0500
From: Xiaoyao Li
Subject: [PATCH 0/2] i386/cpu: Two minor fixes for
x86_cpu_enable_xsave_components()
X-Mailer: git-send-email 2.34.1
The two
The value of FEAT_XSAVE_XCR0_HI leaf and FEAT_XSAVE_XSS_HI leaf also
need to be masked by XCR0 and XSS mask respectively, to make it
logically correct.
Fixes: 301e90675c3f ("target/i386: Enable support for XSAVES based features")
Signed-off-by: Xiaoyao Li
---
target/i386/cpu.c | 4 ++
Leaf FEAT_XSAVE_XSS_LO and FEAT_XSAVE_XSS_HI also need to be cleared
when CPUID_EXT_XSAVE is not set.
Fixes: 301e90675c3f ("target/i386: Enable support for XSAVES based features")
Signed-off-by: Xiaoyao Li
---
target/i386/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/t
The two bugs were introduced when xsaves feature was added by commit
301e90675c3f ("target/i386: Enable support for XSAVES based features").
Xiaoyao Li (2):
i386/cpu: Clear FEAT_XSAVE_XSS_LO/HI leafs when CPUID_EXT_XSAVE is not
available
i386/cpu: Mask with XCR
On 1/15/2024 1:59 PM, Zhao Liu wrote:
(Also cc "machine core" maintainers.)
Hi Xiaoyao,
On Mon, Jan 15, 2024 at 12:18:17PM +0800, Xiaoyao Li wrote:
Date: Mon, 15 Jan 2024 12:18:17 +0800
From: Xiaoyao Li
Subject: Re: [PATCH v7 10/16] i386/cpu: Introduce cluster-id to X86CPU
On 1/
On 1/15/2024 2:35 PM, Zhao Liu wrote:
On Mon, Jan 15, 2024 at 02:11:17PM +0800, Xiaoyao Li wrote:
Date: Mon, 15 Jan 2024 14:11:17 +0800
From: Xiaoyao Li
Subject: Re: [PATCH v7 08/16] i386: Expose module level in CPUID[0x1F]
On 1/15/2024 2:12 PM, Zhao Liu wrote:
Hi Xiaoyao,
On Mon, Jan 15
On 1/15/2024 2:25 PM, Zhao Liu wrote:
Hi Xiaoyao,
On Mon, Jan 15, 2024 at 12:25:19PM +0800, Xiaoyao Li wrote:
Date: Mon, 15 Jan 2024 12:25:19 +0800
From: Xiaoyao Li
Subject: Re: [PATCH v7 14/16] i386: Use CPUCacheInfo.share_level to encode
CPUID[4]
On 1/15/2024 11:40 AM, Zhao Liu wrote
On 1/15/2024 2:12 PM, Zhao Liu wrote:
Hi Xiaoyao,
On Mon, Jan 15, 2024 at 12:34:12PM +0800, Xiaoyao Li wrote:
Date: Mon, 15 Jan 2024 12:34:12 +0800
From: Xiaoyao Li
Subject: Re: [PATCH v7 08/16] i386: Expose module level in CPUID[0x1F]
Yes, I think it's time to move to default 0x1f.
we
On 1/15/2024 12:09 PM, Zhao Liu wrote:
Hi Yuan,
On Mon, Jan 15, 2024 at 11:25:24AM +0800, Yuan Yao wrote:
Date: Mon, 15 Jan 2024 11:25:24 +0800
From: Yuan Yao
Subject: Re: [PATCH v7 08/16] i386: Expose module level in CPUID[0x1F]
On Mon, Jan 08, 2024 at 04:27:19PM +0800, Zhao Liu wrote:
On 1/15/2024 11:48 AM, Zhao Liu wrote:
Hi Xiaoyao,
On Sun, Jan 14, 2024 at 10:42:41PM +0800, Xiaoyao Li wrote:
Date: Sun, 14 Jan 2024 22:42:41 +0800
From: Xiaoyao Li
Subject: Re: [PATCH v7 15/16] i386: Use offsets get NumSharingCache for
CPUID[0x801D].EAX[bits 25:14]
On 1/8/2024 4:27
On 1/15/2024 11:40 AM, Zhao Liu wrote:
+{
+uint32_t num_ids = 0;
+
+switch (share_level) {
+case CPU_TOPO_LEVEL_CORE:
+num_ids = 1 << apicid_core_offset(topo_info);
+break;
+case CPU_TOPO_LEVEL_DIE:
+num_ids = 1 << apicid_die_offset(topo_info);
+
On 1/15/2024 11:27 AM, Zhao Liu wrote:
On Sun, Jan 14, 2024 at 09:49:18PM +0800, Xiaoyao Li wrote:
Date: Sun, 14 Jan 2024 21:49:18 +0800
From: Xiaoyao Li
Subject: Re: [PATCH v7 10/16] i386/cpu: Introduce cluster-id to X86CPU
On 1/8/2024 4:27 PM, Zhao Liu wrote:
From: Zhuocheng Ding
On 1/11/2024 4:43 PM, Zhao Liu wrote:
Hi Xiaoyao,
On Wed, Jan 10, 2024 at 05:31:28PM +0800, Xiaoyao Li wrote:
Date: Wed, 10 Jan 2024 17:31:28 +0800
From: Xiaoyao Li
Subject: Re: [PATCH v7 02/16] i386/cpu: Use APIC ID offset to encode cache
topo in CPUID[4]
On 1/8/2024 4:27 PM, Zhao Liu
On 1/8/2024 4:27 PM, Zhao Liu wrote:
From: Zhao Liu
The commit 8f4202fb1080 ("i386: Populate AMD Processor Cache Information
for cpuid 0x801D") adds the cache topology for AMD CPU by encoding
the number of sharing threads directly.
From AMD's APM, NumSharingCache
On 1/8/2024 4:27 PM, Zhao Liu wrote:
From: Zhao Liu
CPUID[4].EAX[bits 25:14] is used to represent the cache topology for
Intel CPUs.
After cache models have topology information, we can use
CPUCacheInfo.share_level to decide which topology level to be encoded
into CPUID[4].EAX[bits 25:14].
On 1/11/2024 4:43 PM, Zhao Liu wrote:
Hi Xiaoyao,
On Wed, Jan 10, 2024 at 05:31:28PM +0800, Xiaoyao Li wrote:
Date: Wed, 10 Jan 2024 17:31:28 +0800
From: Xiaoyao Li
Subject: Re: [PATCH v7 02/16] i386/cpu: Use APIC ID offset to encode cache
topo in CPUID[4]
On 1/8/2024 4:27 PM, Zhao Liu
On 1/8/2024 4:27 PM, Zhao Liu wrote:
From: Zhuocheng Ding
Introduce cluster-id other than module-id to be consistent with
CpuInstanceProperties.cluster-id, and this avoids the confusion
of parameter names when hotplugging.
I don't think reusing 'cluster' from arm for x86's 'module' is a good
On 1/8/2024 4:27 PM, Zhao Liu wrote:
From: Zhuocheng Ding
Add module_id member in X86CPUTopoIDs.
module_id can be parsed from APIC ID, so also update APIC ID parsing
rule to support module level. With this support, the conversions with
module level between X86CPUTopoIDs, X86CPUTopoInfo and
Tested-by: Xuelian Guo
Reviewed-by: Xiaoyao Li
---
target/i386/cpu.h| 7 ++-
target/i386/helper.c | 4
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 18ea755644..598a3fa140 100644
--- a/target/i386/cpu.h
+++ b/target/i386
On 1/3/2024 5:25 PM, Binbin Wu wrote:
On 12/28/2023 4:51 PM, Xiaoyao Li wrote:
On 7/21/2023 4:08 PM, Binbin Wu wrote:
LAM uses CR3[61] and CR3[62] to configure/enable LAM on user pointers.
LAM uses CR4[28] to configure/enable LAM on supervisor pointers.
For CR3 LAM bits, no additional
On 1/8/2024 4:27 PM, Zhao Liu wrote:
From: Zhao Liu
Linux kernel (from v6.4, with commit edc0a2b595765 ("x86/topology: Fix
erroneous smp_num_siblings on Intel Hybrid platforms") is able to
handle platforms with Module level enumerated via CPUID.1F.
Expose the module level in CPUID[0x1F] if
c inline uint32_t topo_info_cores_per_pkg(X86CPUTopoInfo *topo_info) {
return topo_info.cores_per_module * topo_info.modules_per_die *
topo_info.dies_per_pkg;
}
so we don't need to care how it calculates.
Besides,
Reviewed-by: Xiaoyao Li
cpus_per_pkg = cor
On 1/8/2024 4:27 PM, Zhao Liu wrote:
From: Zhao Liu
At present, the subleaf 0x02 of CPUID[0x1F] is bound to the "die" level.
In fact, the specific topology level exposed in 0x1F depends on the
platform's support for extension levels (module, tile and die).
To help expose "module" level in
t index,
uint32_t count,
uint32_t limit;
uint32_t signature[3];
X86CPUTopoInfo topo_info;
+uint32_t cores_per_pkg;
+uint32_t cpus_per_pkg;
I prefer to lps_per_pkg or threads_per_pkg.
Other than it,
Reviewed-by: Xiaoyao Li
topo_info.dies_per_pkg = env->n
On 1/8/2024 4:27 PM, Zhao Liu wrote:
From: Zhao Liu
Refer to the fixes of cache_info_passthrough ([1], [2]) and SDM, the
CPUID.04H:EAX[bits 25:14] and CPUID.04H:EAX[bits 31:26] should use the
nearest power-of-2 integer.
The nearest power-of-2 integer can be calculated by pow2ceil() or by
On 1/9/2024 10:53 PM, Wang, Wei W wrote:
On Tuesday, January 9, 2024 1:47 PM, Li, Xiaoyao wrote:
On 12/21/2023 9:47 PM, Wang, Wei W wrote:
On Thursday, December 21, 2023 7:54 PM, Li, Xiaoyao wrote:
On 12/21/2023 6:36 PM, Wang, Wei W wrote:
No need to specifically check for
On 12/21/2023 9:47 PM, Wang, Wei W wrote:
On Thursday, December 21, 2023 7:54 PM, Li, Xiaoyao wrote:
On 12/21/2023 6:36 PM, Wang, Wei W wrote:
No need to specifically check for KVM_MEMORY_ATTRIBUTE_PRIVATE there.
I'm suggesting below:
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
On 1/8/2024 10:44 PM, Daniel P. Berrangé wrote:
On Fri, Dec 29, 2023 at 10:30:15AM +0800, Xiaoyao Li wrote:
On 11/16/2023 1:58 AM, Daniel P. Berrangé wrote:
On Wed, Nov 15, 2023 at 02:15:01AM -0500, Xiaoyao Li wrote:
From: Isaku Yamahata
For GetQuote, delegate a request to Quote Generation
On 11/16/2023 1:58 AM, Daniel P. Berrangé wrote:
On Wed, Nov 15, 2023 at 02:15:01AM -0500, Xiaoyao Li wrote:
From: Isaku Yamahata
For GetQuote, delegate a request to Quote Generation Service.
Add property "quote-generation-socket" to tdx-guest, whihc is a property
of type Soc
Binbin Wu
Reviewed-by: Xiaoyao Li
---
target/i386/cpu.c | 2 +-
target/i386/cpu.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 97ad229d8b..3a42340730 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -96
On 7/21/2023 4:08 PM, Binbin Wu wrote:
LAM uses CR3[61] and CR3[62] to configure/enable LAM on user pointers.
LAM uses CR4[28] to configure/enable LAM on supervisor pointers.
For CR3 LAM bits, no additional handling needed:
- TCG
LAM is not supported for TCG of target-i386.
On 12/22/2023 9:14 PM, Daniel P. Berrangé wrote:
On Fri, Dec 22, 2023 at 11:14:12AM +0800, Xiaoyao Li wrote:
On 12/21/2023 7:05 PM, Daniel P. Berrangé wrote:
On Wed, Nov 15, 2023 at 02:15:01AM -0500, Xiaoyao Li wrote:
From: Isaku Yamahata
For GetQuote, delegate a request to Quote Generation
On 12/21/2023 7:05 PM, Daniel P. Berrangé wrote:
On Wed, Nov 15, 2023 at 02:15:01AM -0500, Xiaoyao Li wrote:
From: Isaku Yamahata
For GetQuote, delegate a request to Quote Generation Service.
Add property "quote-generation-socket" to tdx-guest, whihc is a property
of type Soc
On 12/21/2023 6:36 PM, Wang, Wei W wrote:
On Thursday, December 21, 2023 2:11 PM, Li, Xiaoyao wrote:
On 12/12/2023 9:56 PM, Wang, Wei W wrote:
On Wednesday, November 15, 2023 3:14 PM, Xiaoyao Li wrote:
Introduce the helper functions to set the attributes of a range of
memory to private
in SierraForest CPU model.
Currently LAM and LASS are not enabled in KVM mainline yet, will add
them after merged.
Signed-off-by: Tao Su
Reviewed-by: Xiaoyao Li
---
The new features can be found in Intel ISE[1].
LAM has just been accepted by KVM[2].
Although we would like to include all SierraForest
On 12/8/2023 7:52 PM, David Hildenbrand wrote:
On 08.12.23 08:59, Xiaoyao Li wrote:
On 11/18/2023 5:03 AM, Isaku Yamahata wrote:
On Wed, Nov 15, 2023 at 02:14:18AM -0500,
Xiaoyao Li wrote:
It's used for discarding opposite memory after memory conversion, for
confidential guest.
When page
On 12/12/2023 9:56 PM, Wang, Wei W wrote:
On Wednesday, November 15, 2023 3:14 PM, Xiaoyao Li wrote:
Introduce the helper functions to set the attributes of a range of memory to
private or shared.
This is necessary to notify KVM the private/shared attribute of each gpa range.
KVM needs
On 12/18/2023 9:46 PM, Markus Armbruster wrote:
Xiaoyao Li writes:
On 12/1/2023 7:00 PM, Markus Armbruster wrote:
Xiaoyao Li writes:
From: Isaku Yamahata
Three sha384 hash values, mrconfigid, mrowner and mrownerconfig, of a TD
can be provided for TDX attestation.
So far they were hard
On 8/8/2023 10:40 AM, Ake Koomsin wrote:
Current QEMU can expose waitpkg to guests when it is available. However,
VMX_SECONDARY_EXEC_ENABLE_USER_WAIT_PAUSE is still not recognized and
masked by QEMU. This can lead to an unexpected situation when a L1
hypervisor wants to expose waitpkg to a L2
On 12/1/2023 7:00 PM, Markus Armbruster wrote:
Xiaoyao Li writes:
From: Isaku Yamahata
Three sha384 hash values, mrconfigid, mrowner and mrownerconfig, of a TD
can be provided for TDX attestation.
So far they were hard coded as 0. Now allow user to specify those values
via property
On 11/18/2023 5:03 AM, Isaku Yamahata wrote:
On Wed, Nov 15, 2023 at 02:14:18AM -0500,
Xiaoyao Li wrote:
It's used for discarding opposite memory after memory conversion, for
confidential guest.
When page is converted from shared to private, the original shared
memory can be discarded via
On 12/1/2023 7:11 PM, Markus Armbruster wrote:
Xiaoyao Li writes:
Integrate TDX's TDX_REPORT_FATAL_ERROR into QEMU GuestPanic facility
Originated-from: Isaku Yamahata
Signed-off-by: Xiaoyao Li
---
Changes from v2:
- Add docmentation of new type and struct (Daniel)
- refine the error
On 12/1/2023 7:02 PM, Markus Armbruster wrote:
Xiaoyao Li writes:
From: Isaku Yamahata
For GetQuote, delegate a request to Quote Generation Service.
Add property "quote-generation-socket" to tdx-guest, whihc is a property
of type SocketAddress to specify Quote Generation S
On 11/15/2023 6:54 PM, Daniel P. Berrangé wrote:
+static int tdx_ioctl_internal(void *state, enum tdx_ioctl_level level, int
cmd_id,
+__u32 flags, void *data)
+{
+struct kvm_tdx_cmd tdx_cmd;
Add ' = {}' to initialize to all-zeros, avoiding the explicit
memset
On 11/18/2023 5:18 AM, Isaku Yamahata wrote:
On Wed, Nov 15, 2023 at 02:14:27AM -0500,
Xiaoyao Li wrote:
KVM provides TDX capabilities via sub command KVM_TDX_CAPABILITIES of
IOCTL(KVM_MEMORY_ENCRYPT_OP). Get the capabilities when initializing
TDX context. It will be used to validate user's
On 11/15/2023 7:01 PM, Daniel P. Berrangé wrote:
On Wed, Nov 15, 2023 at 02:14:35AM -0500, Xiaoyao Li wrote:
Invoke KVM_TDX_INIT in kvm_arch_pre_create_vcpu() that KVM_TDX_INIT
configures global TD configurations, e.g. the canonical CPUID config,
and must be executed prior to creating vCPUs
On 12/1/2023 6:52 PM, Markus Armbruster wrote:
Xiaoyao Li writes:
Introduce tdx-guest object which implements the interface of
CONFIDENTIAL_GUEST_SUPPORT, and will be used to create TDX VMs (TDs) by
qemu -machine ...,confidential-guest-support=tdx0\
-object tdx-guest,id=tdx0
On 12/4/2023 3:35 PM, Xiaoyao Li wrote:
On 11/20/2023 5:56 PM, David Hildenbrand wrote:
On 16.11.23 03:56, Xiaoyao Li wrote:
On 11/16/2023 2:20 AM, David Hildenbrand wrote:
On 15.11.23 08:14, Xiaoyao Li wrote:
Commit d3a5038c461 ("exec: ram_block_discard_range")
On 11/16/2023 2:21 AM, David Hildenbrand wrote:
On 15.11.23 08:14, Xiaoyao Li wrote:
Use __func__ to avoid hard-coded function name.
Signed-off-by: Xiaoyao Li
---
That can be queued independently.
Will you queue it for 9.0? for someone else?
Do I need to send it separately?
Reviewed
On 11/20/2023 5:56 PM, David Hildenbrand wrote:
On 16.11.23 03:56, Xiaoyao Li wrote:
On 11/16/2023 2:20 AM, David Hildenbrand wrote:
On 15.11.23 08:14, Xiaoyao Li wrote:
Commit d3a5038c461 ("exec: ram_block_discard_range") introduced
ram_block_discard_range() which grabs some
On 11/18/2023 4:50 AM, Isaku Yamahata wrote:
On Wed, Nov 15, 2023 at 02:14:14AM -0500,
Xiaoyao Li wrote:
From: Chao Peng
Switch to KVM_SET_USER_MEMORY_REGION2 when supported by KVM.
With KVM_SET_USER_MEMORY_REGION2, QEMU can set up memory region that
backend'ed both by hva-based shared
On 11/18/2023 4:35 AM, Isaku Yamahata wrote:
On Wed, Nov 15, 2023 at 02:14:11AM -0500,
Xiaoyao Li wrote:
diff --git a/system/physmem.c b/system/physmem.c
index fc2b0fee0188..0af2213cbd9c 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -1841,6 +1841,20 @@ static void ram_block_add
On 11/20/2023 5:26 PM, David Hildenbrand wrote:
... did you shamelessly copy that from hw/virtio/virtio-mem.c ? ;)
Get caught.
This should be factored out into a common helper.
Sure, will do it in next version.
Factor it out in a separate patch. Then, this patch is get small that
you
On 11/20/2023 5:30 PM, David Hildenbrand wrote:
On 16.11.23 03:53, Xiaoyao Li wrote:
On 11/16/2023 2:14 AM, David Hildenbrand wrote:
On 15.11.23 08:14, Xiaoyao Li wrote:
Add a new member "require_guest_memfd" to memory backends. When it's
set
to true, it enables RAM_GUEST_MEMFD in
On 11/20/2023 5:24 PM, David Hildenbrand wrote:
uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
{
uint8_t mask = mr->dirty_log_mask;
diff --git a/system/physmem.c b/system/physmem.c
index fc2b0fee0188..0af2213cbd9c 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@
On 11/20/2023 5:19 PM, David Hildenbrand wrote:
On 16.11.23 03:45, Xiaoyao Li wrote:
On 11/16/2023 1:54 AM, David Hildenbrand wrote:
On 15.11.23 08:14, Xiaoyao Li wrote:
Add KVM guest_memfd support to RAMBlock so both normal hva based memory
and kvm guest memfd based private memory can
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