[PATCH v5 10/13] target/riscv: Add kvm_riscv_get/put_regs_timer

2022-01-12 Thread Yifei Jiang via
Add kvm_riscv_get/put_regs_timer to synchronize virtual time context from KVM. To set register of RISCV_TIMER_REG(state) will occur a error from KVM on kvm_timer_state == 0. It's better to adapt in KVM, but it doesn't matter that adaping in QEMU. Signed-off-by: Yifei Jiang Signed-off-by: Mingwan

[PATCH v5 13/13] target/riscv: enable riscv kvm accel

2022-01-12 Thread Yifei Jiang via
Add riscv kvm support in meson.build file. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li --- meson.build | 2 ++ 1 file changed, 2 insertions(+) diff --git a/meson.build b/meson.build index c1b1db1e28..06a5476254 100644 --- a/meson.build +++ b/meson.build @@ -90,6 +90,8 @@ elif cpu in

[PATCH v5 08/13] target/riscv: Handle KVM_EXIT_RISCV_SBI exit

2022-01-12 Thread Yifei Jiang via
Use char-fe to handle console sbi call, which implement early console io while apply 'earlycon=sbi' into kernel parameters. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Anup Patel Reviewed-by: Alistair Francis --- target/riscv/kvm.c | 42 -

[PATCH v5 12/13] target/riscv: Support virtual time context synchronization

2022-01-12 Thread Yifei Jiang via
Add virtual time context description to vmstate_kvmtimer. After cpu being loaded, virtual time context is updated to KVM. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Anup Patel Reviewed-by: Alistair Francis --- target/riscv/machine.c | 30 ++

[PATCH v5 11/13] target/riscv: Implement virtual time adjusting with vm state changing

2022-01-12 Thread Yifei Jiang via
We hope that virtual time adjusts with vm state changing. When a vm is stopped, guest virtual time should stop counting and kvm_timer should be stopped. When the vm is resumed, guest virtual time should continue to count and kvm_timer should be restored. Signed-off-by: Yifei Jiang Signed-off-by:

[PATCH v5 06/13] target/riscv: Support start kernel directly by KVM

2022-01-12 Thread Yifei Jiang via
Get kernel and fdt start address in virt.c, and pass them to KVM when cpu reset. Add kvm_riscv.h to place riscv specific interface. In addition, PLIC is created without M-mode PLIC contexts when KVM is enabled. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis

[PATCH v5 05/13] target/riscv: Implement kvm_arch_put_registers

2022-01-12 Thread Yifei Jiang via
Put GPR CSR and FP registers to kvm by KVM_SET_ONE_REG ioctl Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/kvm.c | 104 - 1 file changed, 103 insertions(+), 1 deletion(-)

[PATCH v5 09/13] target/riscv: Add host cpu type

2022-01-12 Thread Yifei Jiang via
'host' type cpu is set isa to RV32 or RV64 simply, more isa info will obtain from KVM in kvm_arch_init_vcpu() Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/cpu.c | 15 +++ target/riscv/cpu.h | 1 + 2 f

[PATCH v5 03/13] target/riscv: Implement function kvm_arch_init_vcpu

2022-01-12 Thread Yifei Jiang via
Get isa info from kvm while kvm init. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/kvm.c | 34 +- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/target/riscv/kvm.c b/

[PATCH v5 00/13] Add riscv kvm accel support

2022-01-12 Thread Yifei Jiang via
This series adds both riscv32 and riscv64 kvm support, and implements migration based on riscv. Because of RISC-V KVM has been merged into the Linux master, so this series are changed from RFC to patch. Several steps to use this: 1. Build emulation $ ./configure --target-list=riscv64-softmmu $ ma

[PATCH v5 07/13] target/riscv: Support setting external interrupt by KVM

2022-01-12 Thread Yifei Jiang via
When KVM is enabled, set the S-mode external interrupt through kvm_riscv_set_irq function. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/cpu.c | 6 +- target/riscv/kvm-stub.c | 5 + target/riscv/kv

[PATCH v5 01/13] update-linux-headers: Add asm-riscv/kvm.h

2022-01-12 Thread Yifei Jiang via
Add asm-riscv/kvm.h for RISC-V KVM. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Acked-by: Alistair Francis Reviewed-by: Anup Patel --- linux-headers/asm-riscv/kvm.h | 128 ++ 1 file changed, 128 insertions(+) create mode 100644 linux-headers/asm-risc

[PATCH v5 04/13] target/riscv: Implement kvm_arch_get_registers

2022-01-12 Thread Yifei Jiang via
Get GPR CSR and FP registers from kvm by KVM_GET_ONE_REG ioctl. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/kvm.c | 112 - 1 file changed, 111 insertions(+), 1 deletion

[PATCH v5 02/13] target/riscv: Add target/riscv/kvm.c to place the public kvm interface

2022-01-12 Thread Yifei Jiang via
Add target/riscv/kvm.c to place kvm_arch_* function needed by kvm/kvm-all.c. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/kvm.c | 133 +++ target/riscv/meson.build | 1 +

[PATCH v4 05/12] target/riscv: Implement kvm_arch_put_registers

2022-01-09 Thread Yifei Jiang via
Put GPR CSR and FP registers to kvm by KVM_SET_ONE_REG ioctl Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/kvm.c | 104 - 1 file changed, 103 insertions(+), 1 deletion(-)

[PATCH v4 11/12] target/riscv: Implement virtual time adjusting with vm state changing

2022-01-09 Thread Yifei Jiang via
We hope that virtual time adjusts with vm state changing. When a vm is stopped, guest virtual time should stop counting and kvm_timer should be stopped. When the vm is resumed, guest virtual time should continue to count and kvm_timer should be restored. Signed-off-by: Yifei Jiang Signed-off-by:

[PATCH v4 06/12] target/riscv: Support start kernel directly by KVM

2022-01-09 Thread Yifei Jiang via
Get kernel and fdt start address in virt.c, and pass them to KVM when cpu reset. Add kvm_riscv.h to place riscv specific interface. In addition, PLIC is created without M-mode PLIC contexts when KVM is enabled. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis

[PATCH v4 10/12] target/riscv: Add kvm_riscv_get/put_regs_timer

2022-01-09 Thread Yifei Jiang via
Add kvm_riscv_get/put_regs_timer to synchronize virtual time context from KVM. To set register of RISCV_TIMER_REG(state) will occur a error from KVM on kvm_timer_state == 0. It's better to adapt in KVM, but it doesn't matter that adaping in QEMU. Signed-off-by: Yifei Jiang Signed-off-by: Mingwan

[PATCH v4 09/12] target/riscv: Add host cpu type

2022-01-09 Thread Yifei Jiang via
'host' type cpu is set isa to RV32 or RV64 simply, more isa info will obtain from KVM in kvm_arch_init_vcpu() Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/cpu.c | 15 +++ target/riscv/cpu.h | 1 + 2 f

[PATCH v4 12/12] target/riscv: Support virtual time context synchronization

2022-01-09 Thread Yifei Jiang via
Add virtual time context description to vmstate_kvmtimer. After cpu being loaded, virtual time context is updated to KVM. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Anup Patel Reviewed-by: Alistair Francis --- target/riscv/machine.c | 30 ++

[PATCH v4 08/12] target/riscv: Handle KVM_EXIT_RISCV_SBI exit

2022-01-09 Thread Yifei Jiang via
Use char-fe to handle console sbi call, which implement early console io while apply 'earlycon=sbi' into kernel parameters. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Anup Patel --- target/riscv/kvm.c | 42 - target/riscv/sbi_ecall_interf

[PATCH v4 07/12] target/riscv: Support setting external interrupt by KVM

2022-01-09 Thread Yifei Jiang via
When KVM is enabled, set the S-mode external interrupt through kvm_riscv_set_irq function. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/cpu.c | 6 +- target/riscv/kvm-stub.c | 5 + target/riscv/kv

[PATCH v4 02/12] target/riscv: Add target/riscv/kvm.c to place the public kvm interface

2022-01-09 Thread Yifei Jiang via
Add target/riscv/kvm.c to place kvm_arch_* function needed by kvm/kvm-all.c. Meanwhile, add kvm support in meson.build file. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- meson.build | 2 + target/riscv/kvm.c

[PATCH v4 01/12] update-linux-headers: Add asm-riscv/kvm.h

2022-01-09 Thread Yifei Jiang via
Add asm-riscv/kvm.h for RISC-V KVM. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Acked-by: Alistair Francis Reviewed-by: Anup Patel --- linux-headers/asm-riscv/kvm.h | 128 ++ 1 file changed, 128 insertions(+) create mode 100644 linux-headers/asm-risc

[PATCH v4 03/12] target/riscv: Implement function kvm_arch_init_vcpu

2022-01-09 Thread Yifei Jiang via
Get isa info from kvm while kvm init. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/kvm.c | 32 +++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/target/riscv/kvm.c b/ta

[PATCH v4 00/12] Add riscv kvm accel support

2022-01-09 Thread Yifei Jiang via
This series adds both riscv32 and riscv64 kvm support, and implements migration based on riscv. Because of RISC-V KVM has been merged into the Linux master, so this series are changed from RFC to patch. Several steps to use this: 1. Build emulation $ ./configure --target-list=riscv64-softmmu $ ma

[PATCH v4 04/12] target/riscv: Implement kvm_arch_get_registers

2022-01-09 Thread Yifei Jiang via
Get GPR CSR and FP registers from kvm by KVM_GET_ONE_REG ioctl. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/kvm.c | 112 - 1 file changed, 111 insertions(+), 1 deletion

[PATCH v3 04/12] target/riscv: Implement kvm_arch_get_registers

2021-12-20 Thread Yifei Jiang via
Get GPR CSR and FP registers from kvm by KVM_GET_ONE_REG ioctl. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/kvm.c | 112 - 1 file changed, 111 insertions(+), 1 deletion

[PATCH v3 06/12] target/riscv: Support start kernel directly by KVM

2021-12-20 Thread Yifei Jiang via
Get kernel and fdt start address in virt.c, and pass them to KVM when cpu reset. Add kvm_riscv.h to place riscv specific interface. In addition, PLIC is created without M-mode PLIC contexts when KVM is enabled. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis

[PATCH v3 03/12] target/riscv: Implement function kvm_arch_init_vcpu

2021-12-20 Thread Yifei Jiang via
Get isa info from kvm while kvm init. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/kvm.c | 32 +++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/target/riscv/kvm.c b/ta

[PATCH v3 02/12] target/riscv: Add target/riscv/kvm.c to place the public kvm interface

2021-12-20 Thread Yifei Jiang via
Add target/riscv/kvm.c to place kvm_arch_* function needed by kvm/kvm-all.c. Meanwhile, add kvm support in meson.build file. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- meson.build | 2 + target/riscv/kvm.c

[PATCH v3 11/12] target/riscv: Implement virtual time adjusting with vm state changing

2021-12-20 Thread Yifei Jiang via
We hope that virtual time adjusts with vm state changing. When a vm is stopped, guest virtual time should stop counting and kvm_timer should be stopped. When the vm is resumed, guest virtual time should continue to count and kvm_timer should be restored. Signed-off-by: Yifei Jiang Signed-off-by:

[PATCH v3 01/12] update-linux-headers: Add asm-riscv/kvm.h

2021-12-20 Thread Yifei Jiang via
Add asm-riscv/kvm.h for RISC-V KVM, and update linux/kvm.h Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Acked-by: Alistair Francis Reviewed-by: Anup Patel --- linux-headers/asm-riscv/kvm.h | 128 ++ 1 file changed, 128 insertions(+) create mode 100644

[PATCH v3 08/12] target/riscv: Handle KVM_EXIT_RISCV_SBI exit

2021-12-20 Thread Yifei Jiang via
Use char-fe to handle console sbi call, which implement early console io while apply 'earlycon=sbi' into kernel parameters. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Anup Patel --- target/riscv/kvm.c | 43 +- target/riscv/sbi_ecall_inter

[PATCH v3 07/12] target/riscv: Support setting external interrupt by KVM

2021-12-20 Thread Yifei Jiang via
When KVM is enabled, set the S-mode external interrupt through kvm_riscv_set_irq function. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 6 +- target/riscv/kvm-stub.c | 5 + target/riscv/kvm.c | 17 ++

[PATCH v3 10/12] target/riscv: Add kvm_riscv_get/put_regs_timer

2021-12-20 Thread Yifei Jiang via
Add kvm_riscv_get/put_regs_timer to synchronize virtual time context from KVM. To set register of RISCV_TIMER_REG(state) will occur a error from KVM on kvm_timer_state == 0. It's better to adapt in KVM, but it doesn't matter that adaping in QEMU. Signed-off-by: Yifei Jiang Signed-off-by: Mingwan

[PATCH v3 00/12] Add riscv kvm accel support

2021-12-20 Thread Yifei Jiang via
This series adds both riscv32 and riscv64 kvm support, and implements migration based on riscv. Because of RISC-V KVM has been merged into the Linux master, so this series are changed from RFC to patch. Several steps to use this: 1. Build emulation $ ./configure --target-list=riscv64-softmmu $ ma

[PATCH v3 05/12] target/riscv: Implement kvm_arch_put_registers

2021-12-20 Thread Yifei Jiang via
Put GPR CSR and FP registers to kvm by KVM_SET_ONE_REG ioctl Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/kvm.c | 104 - 1 file changed, 103 insertions(+), 1 deletion(-)

[PATCH v3 12/12] target/riscv: Support virtual time context synchronization

2021-12-20 Thread Yifei Jiang via
Add virtual time context description to vmstate_kvmtimer. After cpu being loaded, virtual time context is updated to KVM. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Anup Patel --- target/riscv/machine.c | 30 ++ 1 file changed, 30 insertions(

[PATCH v3 09/12] target/riscv: Add host cpu type

2021-12-20 Thread Yifei Jiang via
'host' type cpu is set isa to RV32 or RV64 simply, more isa info will obtain from KVM in kvm_arch_init_vcpu() Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/cpu.c | 15 +++ target/riscv/cpu.h | 1 + 2 f

[PATCH v2 12/12] target/riscv: Support virtual time context synchronization

2021-12-10 Thread Yifei Jiang via
Add virtual time context description to vmstate_kvmtimer. After cpu being loaded, virtual time context is updated to KVM. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li --- target/riscv/machine.c | 37 +++-- 1 file changed, 35 insertions(+), 2 deletions(-)

[PATCH v2 11/12] target/riscv: Implement virtual time adjusting with vm state changing

2021-12-10 Thread Yifei Jiang via
We hope that virtual time adjusts with vm state changing. When a vm is stopped, guest virtual time should stop counting and kvm_timer should be stopped. When the vm is resumed, guest virtual time should continue to count and kvm_timer should be restored. Signed-off-by: Yifei Jiang Signed-off-by:

[PATCH v2 10/12] target/riscv: Add kvm_riscv_get/put_regs_timer

2021-12-10 Thread Yifei Jiang via
Add kvm_riscv_get/put_regs_timer to synchronize virtual time context from KVM. To set register of RISCV_TIMER_REG(state) will occur a error from KVM on kvm_timer_state == 0. It's better to adapt in KVM, but it doesn't matter that adaping in QEMU. Signed-off-by: Yifei Jiang Signed-off-by: Mingwan

[PATCH v2 08/12] target/riscv: Handle KVM_EXIT_RISCV_SBI exit

2021-12-10 Thread Yifei Jiang via
Use char-fe to handle console sbi call, which implement early console io while apply 'earlycon=sbi' into kernel parameters. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li --- target/riscv/kvm.c | 38 +++- target/riscv/sbi_ecall_interface.h | 72 +++

[PATCH v2 06/12] target/riscv: Support start kernel directly by KVM

2021-12-10 Thread Yifei Jiang via
Get kernel and fdt start address in virt.c, and pass them to KVM when cpu reset. In addition, add kvm_riscv.h to place riscv specific interface. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis --- hw/riscv/boot.c | 11 hw/riscv/virt.c

[PATCH v2 05/12] target/riscv: Implement kvm_arch_put_registers

2021-12-10 Thread Yifei Jiang via
Put GPR CSR and FP registers to kvm by KVM_SET_ONE_REG ioctl Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis --- target/riscv/kvm.c | 104 - 1 file changed, 103 insertions(+), 1 deletion(-) diff --git a/target/ris

[PATCH v2 07/12] target/riscv: Support setting external interrupt by KVM

2021-12-10 Thread Yifei Jiang via
When KVM is enabled, set the S-mode external interrupt through kvm_riscv_set_irq function. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 6 +- target/riscv/kvm-stub.c | 5 + target/riscv/kvm.c | 17 ++

[PATCH v2 09/12] target/riscv: Add host cpu type

2021-12-10 Thread Yifei Jiang via
'host' type cpu is set isa to RV32 or RV64 simply, more isa info will obtain from KVM in kvm_arch_init_vcpu() Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- target/riscv/cpu.c | 15 +++ target/riscv/cpu.h | 1 + 2 f

[PATCH v2 02/12] target/riscv: Add target/riscv/kvm.c to place the public kvm interface

2021-12-10 Thread Yifei Jiang via
Add target/riscv/kvm.c to place kvm_arch_* function needed by kvm/kvm-all.c. Meanwhile, add kvm support in meson.build file. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis Reviewed-by: Anup Patel --- meson.build | 2 + target/riscv/kvm.c

[PATCH v2 04/12] target/riscv: Implement kvm_arch_get_registers

2021-12-10 Thread Yifei Jiang via
Get GPR CSR and FP registers from kvm by KVM_GET_ONE_REG ioctl. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis --- target/riscv/kvm.c | 112 - 1 file changed, 111 insertions(+), 1 deletion(-) diff --git a/target/

[PATCH v2 03/12] target/riscv: Implement function kvm_arch_init_vcpu

2021-12-10 Thread Yifei Jiang via
Get isa info from kvm while kvm init. Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Reviewed-by: Alistair Francis --- target/riscv/kvm.c | 32 +++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index 68

[PATCH v2 00/12] Add riscv kvm accel support

2021-12-10 Thread Yifei Jiang via
This series adds both riscv32 and riscv64 kvm support, and implements migration based on riscv. Because of RISC-V KVM has been merged into the Linux master, so this series are changed from RFC to patch. Several steps to use this: 1. Build emulation $ ./configure --target-list=riscv64-softmmu $ ma

[PATCH v2 01/12] update-linux-headers: Add asm-riscv/kvm.h

2021-12-10 Thread Yifei Jiang via
Add asm-riscv/kvm.h for RISC-V KVM, and update linux/kvm.h Signed-off-by: Yifei Jiang Signed-off-by: Mingwang Li Acked-by: Alistair Francis Reviewed-by: Anup Patel --- linux-headers/asm-riscv/kvm.h | 128 ++ linux-headers/linux/kvm.h | 8 +++ 2 files chan