Fix typo to use correct edx value for FEATURE_HYPERV_EDX when
hyperv_passthrough is enabled.
Signed-off-by: Zhenyu Wang
---
target/i386/kvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 2abc881324..101229bce4 100644
ersion
> attribute, live migration is regarded as not supported for those vGPUs.
>
> Cc: Alex Williamson
> Cc: Erik Skultety
> Cc: "Dr. David Alan Gilbert"
> Cc: Cornelia Huck
> Cc: "Tian, Kevin"
> Cc: Zhenyu Wang
> Cc: "Wang, Zhi A"
&g
On 2019.05.06 11:20:32 +0800, Zhenyu Wang wrote:
> On 2019.05.05 21:51:02 -0400, Yan Zhao wrote:
> > This feature implements the version attribute for Intel's vGPU mdev
> > devices.
> >
> > version attribute is rw.
> > It's used to check device compatibility
; 1. removed 32 common part of version string
> (Alex Williamson)
> 2. do not register version attribute for GVT not supporting live
> migration.(Cornelia Huck)
> 3. for platforms out of gen8, gen9, return -EINVAL --> -ENODEV for
> incompatible. (Cornelia Huck)
>
> Cc: Alex Wil
y Intel vGPU well for live
> migration purpose.
>
> Cc: Alex Williamson
> Cc: Erik Skultety
> Cc: "Dr. David Alan Gilbert"
> Cc: Cornelia Huck
> Cc: "Tian, Kevin"
> Cc: Zhenyu Wang
> Cc: "Wang, Zhi A"
> c: Neo Jia
> Cc: Kirti Wa
On 2018.02.22 09:59:17 -0700, Alex Williamson wrote:
> On Thu, 22 Feb 2018 15:46:17 +
> Peter Maydell wrote:
>
> > On 22 February 2018 at 15:37, Gerd Hoffmann wrote:
> > > On Mon, Feb 19, 2018 at 12:14:55PM +0100, Gerd Hoffmann wrote:
> > >>
On 2018.02.22 10:30:55 +0100, Gerd Hoffmann wrote:
> Hi,
>
> > Nice! Seems to be the last missing gap for local spice with cursor
> > dmabuf support, we'll do more testing on that for sure. Btw, another
> > method might be to add direct cursor dmabuf passing for spice as gl
> > output, is that
On 2018.02.20 18:04:17 +0100, Gerd Hoffmann wrote:
> Hi,
>
> > Sneak preview at https://www.kraxel.org/cgit/qemu/log/?h=work/intel-vgpu
> > Note: branch is a moving target ;)
> >
> > State:
> > spice: Partly working (no mouse ptr yet).
>
> Working now, in case anyone wants play.
>
> Must
On 2016.11.17 16:51:45 -0700, Alex Williamson wrote:
> On Thu, 17 Nov 2016 23:29:38 +
> "Tian, Kevin" wrote:
>
> > > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > > Sent: Friday, November 18, 2016 5:25 AM
> > >
> > > On Thu, 17 Nov 2016 02:16:12 +0530
>
...@intel.com
This was added historically when supporting graphics device passthrough.
Looks qemu upstream can't accept multiple ISA bridge and our PCH is always
on device 31: func0 as far as I know. Looks good to me.
Reviewed-by: Zhenyu Wang zhen...@linux.intel.com
--
Open Source Technology Center, Intel
10 matches
Mail list logo