[Qemu-devel] [PATCH 1/4] hw/net: create common collection of MII definitions

2015-06-25 Thread gerg
From: Greg Ungerer Create a common set of definitions of address and register values for ethernet MII phys. A few of the current ethernet drivers have at least a partial set of these definitions. Others just use hard coded raw constant numbers. This initial set is copied directly from the allwin

[Qemu-devel] [PATCH 4/4] hw/net: fix mcf_fec driver receiver

2015-06-25 Thread gerg
From: Greg Ungerer The network mcf_fec driver emulated receive side method is returning a result of 0 causing the network layer to disable receive for this emulated device. This results in the guest only ever receiving one packet. Fix the recieve side processing to return the number of bytes tha

[Qemu-devel] [PATCH 2/4] hw/net: add ANLPAR bit definitions to generic mii

2015-06-25 Thread gerg
From: Greg Ungerer Add a base set of bit definitions for the standard MII phy "Auto-Negotiation Link Partner Ability Register" (ANLPAR). The original definitions moved into mii.h from the allwinner_emac driver did not define these. Signed-off-by: Greg Ungerer --- include/hw/net/mii.h | 7

[Qemu-devel] [PATCH 3/4] hw/net: add simple phy support to mcf_fec driver

2015-06-25 Thread gerg
From: Greg Ungerer The Linux fec driver needs at least basic phy support to probe and work. The current qemu mcf_fec emulation has no support for the reading or writing of the MDIO lines to access an attached phy. This code adds a very simple set of register results for a fixed phy setup - very

[Qemu-devel] [PATCH 0/4] hw/net: fix m68/ColdFire ethernet fec support

2015-06-25 Thread gerg
The following set of patches fixes the emulated ColdFire ethernet fec driver. There is primarily two problems that need to be fixed. 1. The emulated driver needs to support probing of an attached phy. It is strait forward to emulate an attached phy, but to avoid using magic numbers I have f

[Qemu-devel] [PATCH v2 1/3] m68k: implement more ColdFire 5208 interrupt controller functionality

2015-06-19 Thread gerg
From: Greg Ungerer Implement the SIMR and CIMR registers of the 5208 interrupt controller. These are used by modern versions of Linux running on ColdFire (not sure of the exact version they were introduced, but they have been in for quite a while now). Without this change when attempting to run

[Qemu-devel] [PATCH v2 3/3] m68k: fix usp processing on interrupt entry and exception exit

2015-06-19 Thread gerg
From: Greg Ungerer The action to potentially switch sp register is not occurring at the correct point in the interrupt entry or exception exit sequences. For the interrupt entry case the sp on entry is used to create the stack exception frame - but this may well be the user stack pointer, since

[Qemu-devel] [PATCH v2 2/3] m68k: implement move to/from usp register instruction

2015-06-19 Thread gerg
From: Greg Ungerer Fill out the code support for the move to/from usp instructions. They are being decoded, but there is no code to support there actions. So add it. Current versions of Linux running on the ColdFire 5208 use these instructions. Signed-off-by: Greg Ungerer Reviewed-by: Richard

[Qemu-devel] [PATCH v2 0/3] m68k: fix ColdFire support

2015-06-19 Thread gerg
Some small issues are causing problems with running modern versions of Linux on the m68k/ColdFire 5208 target. These 3 patches fix those problems. They are all due to use of more advanced architecture features not used in older Linux kernels. Regards Greg v2: * rebased to current master head *

[Qemu-devel] [PATCH 0/3] m68k: fix coldfire linux problems

2014-08-19 Thread gerg
Some small issues are causing problems with running modern versions of Linux on the m68k-system ColdFire targets. These 3 patches fix those problems. This is a repost of these patches rebased onto the current git tree: http://lists.nongnu.org/archive/html/qemu-devel/2012-09/msg01954.html htt

[Qemu-devel] [PATCH 3/3] m68k: fix usp processing on interrupt entry and exception exit

2014-08-19 Thread gerg
From: Greg Ungerer The action to potentially switch sp register is not occurring at the correct point in the interrupt entry or exception exit sequences. For the interrupt entry case the sp on entry is used to create the stack exception frame - but this may well be the user stack pointer, since

[Qemu-devel] [PATCH 1/3] m68k: implmenent more ColdFire 5208 interrupt controller functionality

2014-08-19 Thread gerg
From: Greg Ungerer Implement the SIMR and CIMR registers of the 5208 interrupt controller. These are used by modern versions of Linux running on ColdFire (not sure of the exact version they were introduced, but they have been in for quite a while now). Without this change when attempting to run

[Qemu-devel] [PATCH 2/3] m68k: implement move to/from usp register instruction

2014-08-19 Thread gerg
From: Greg Ungerer Fill out the code support for the move to/from usp instructions. They are being decoded, but there is no code to support there actions. So add it. Current versions of Linux running on the ColdFire 5208 use these instructions. Signed-off-by: Greg Ungerer Reviewed-by: Richard

[Qemu-devel] [PATCH v2] m68k: implement move to/from usp register instruction

2012-09-13 Thread gerg
From: Greg Ungerer Fill out the code support for the move to/from usp instructions. They are being decoded, but there is no code to support their actions. So add it. Current versions of Linux running on the ColdFire 5208 use these instructions. Signed-off-by: Greg Ungerer --- target-m68k/tran

[Qemu-devel] [PATCH] m68k: implmenent more ColdFire 5208 interrupt controller functionality

2012-09-13 Thread gerg
From: Greg Ungerer Implement the SIMR and CIMR registers of the 5208 interrupt controller. These are used by modern versions of Linux running on ColdFire (not sure of the exact version they were introduced, but they have been in for quite a while now). Without this change when attempting to run

[Qemu-devel] [PATCH] m68k: fix usp processing on interrupt entry and exception exit

2012-09-13 Thread gerg
From: Greg Ungerer The action to potentially switch sp register is not occurring at the correct point in the interrupt entry or exception exit sequences. For the interrupt entry case the sp on entry is used to create the stack exception frame - but this may well be the user stack pointer, since

[Qemu-devel] [PATCH] m68k: implement move to/from usp register instruction

2012-09-13 Thread gerg
From: Greg Ungerer Fill out the code support for the move to/from usp instructions. They are being decoded, but there is no code to support there actions. So add it. Current versions of Linux running on the ColdFire 5208 use these instructions. Signed-off-by: Greg Ungerer --- target-m68k/help