On Mon, Jul 4, 2016 at 10:57 AM, mar.krzeminski
wrote:
>
>
> W dniu 04.07.2016 o 14:18, Cédric Le Goater pisze:
>>
>> Some SPI controllers, such as the Aspeed AST2400, have a mode in which
>> accesses to the flash content are no different than doing MMIOs. The
>> controller generates all the neces
On Tue, Apr 26, 2016 at 5:45 AM, Peter Maydell wrote:
> Hi; I have what seems like a fairly straightforward requirement for
> a QOM device but no idea how to implement it, so I'm looking for
> advice on the right "modern" way to do it...
>
> Specifically, this is the GICv3 device. It would like to
On Fri, Apr 22, 2016 at 4:44 AM, Andrew Baumann
wrote:
> Hi all,
>
>> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
>> Sent: Friday, 22 April 2016 09:18
>>
>> On Thu, Apr 21, 2016 at 9:06 AM, Stephen Warren
>> wrote:
>> > On
On Fri, Apr 22, 2016 at 12:46 AM, Gerd Hoffmann wrote:
> Hi,
>
>> > Ideally as was mentioned earlier this would be done by simply executing the
>> > existing bootloader under emulation, rather than building all that code
>> > into
>> > qemu. However, in the Pi case, the bootloader runs on the V
On Thu, Apr 21, 2016 at 9:06 AM, Stephen Warren wrote:
> On 04/21/2016 08:07 AM, Sylvain Garrigues wrote:
>>
>> Le 21 avr. 2016 à 15:42, Peter Maydell a écrit
>> :
>>>
>>>
>>> There may be something we can do here to make FreeBSD's life
>>> easier, but we definitely can't do it on the eve of a re
On Tue, Feb 16, 2016 at 9:15 AM, mar.krzeminski
wrote:
>
>
> W dniu 15.02.2016 o 23:43, Jean-Christophe DUBOIS pisze:
>
>> Le 15/02/2016 17:46, mar.krzeminski a écrit :
>>>
>>>
>>>
>>> W dniu 15.02.2016 o 11:18, Jean-Christophe DUBOIS pisze:
Le 14/02/2016 20:17, mar.krzeminski a écrit :
>four_bytes_address_mode) {
> +s->data[0] |= 0x1;
> +}
> +s->pos = 0;
> +s->len = 1;
> +s->state = STATE_READING_DATA;
> + break;
> +
To be consistent with recommendation on CFG register macros it should
be d
case DPP:
> case QPP:
> case PP:
> +case PP4:
> s->needed_bytes = get_addr_length(s);
> s->pos = 0;
> s->len = 0;
> @@ -563,11 +600,14 @@ static void decode_new_cmd(Flash *s, uint32_t value)
> break;
>
>
le_cfg,
> +4, 4, extract32(s->nonvolatile_cfg, 12, 4));
> +s->enh_volatile_cfg = 0;
> +/* Output driver strength */
> +s->enh_volatile_cfg |= 0x7;
> +/* Vpp accelerator */
> +s->enh_volatile_cfg |= (1 <&l
EDEC_NUMONYX:
> +s->needed_bytes = get_addr_length(s);
> + break;
This change ...
> default:
> s->needed_bytes = 5;
Should be here, with a +2 (I think?).
> }
> @@ -517,6 +537,8 @@ static void decode_new_cmd(Flash *s, uint32_t value
reset_memory(s);
> +
This shouldn't be here, you need to add a Device::reset function. Your
use case of persisting data through a warn system reset (that we
discussed previously) is difficult to support with QEMUs current reset
semantics and your board is out-of-tree. So I thi
_addr_length(Flash *s)
> {
> + /* check if eeprom is in use */
> +if (s->pi->flags == WR_1) {
> + return 2;
> +}
> +
Neat!
But I think this indicates the flag is incorrectly named. Should be
renamed to EEPROM or something like.
Otherwise:
Reviewed-by: Peter Crosthwaite
> switch (s->cmd_in_progress) {
> case PP4:
> case READ4:
> --
> 2.5.0
>
UMONYX:
> s->needed_bytes = get_addr_length(s);
> +/* Dummy cycles modeled with bytes writes instead of bits */
> +s->needed_bytes += extract32(s->volatile_cfg, 4, 4);
> break;
> default:
> s->ne
On Sat, Jan 30, 2016 at 8:43 AM, Dmitry Osipenko wrote:
> It might be necessary by some emulated HW to perform the tick after one
> period if delta = 0. Given that it is much less churny to implement immediate
> tick by the ptimer user itself, let's make ptimer do the delayed tick.
>
Isn't this r
features that got the whole discussion started.
Reviewed-by: Peter Crosthwaite
> ---
> hw/timer/arm_mptimer.c | 133
> +
> include/hw/timer/arm_mptimer.h | 5 +-
> 2 files changed, 70 insertions(+), 68 deletions(-)
>
> diff --g
On Tue, Feb 2, 2016 at 7:19 AM, Dmitry Osipenko wrote:
> 30.01.2016 19:43, Dmitry Osipenko пишет:
>>
>> Due to rounding down performed by ptimer_get_count, it returns counter - 1
>> for
>> the active timer. That's incorrect because counter should decrement only
>> after
>> period been expired, not
On Sun, Mar 6, 2016 at 11:05 PM, xiaoqiang zhao wrote:
> Drop the use of old SysBus init function and use instance_init
>
> Signed-off-by: xiaoqiang zhao
Reviewed-by: Peter Crosthwaite
(just this one as I have done some highbank work recently - I cant do
the whole series).
Regar
Document the usage of load_elf() for clarity on current features.
Signed-off-by: Peter Crosthwaite
---
include/hw/loader.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/include/hw/loader.h b/include/hw/loader.h
index a626c9b..264ef89 100644
--- a/include/hw
PU in this
endianness scheme, which means the data in the elf is reversed at
compile time.
As QEMU loads via the system memory directly, rather than the CPU, we
need a mechanism to reverse elf data endianness to implement this
possibility.
Reviewed-by: Peter Maydell
Signed-off-by: Peter Crosth
the TARGET
endianness so the ifdeffery on TARGET_WORDS_BIGENDIAN goes away.
Signed-off-by: Peter Crosthwaite
---
Changed since v1:
Factor out elf manipulation logic into static helper (PMM review)
hw/arm/boot.c| 93 ++--
include/hw/arm
Add an API to load an elf header header from a file. Populates a
buffer with the header contents, as well as a boolean for whether the
elf is 64b or not. Both arguments are optional.
Signed-off-by: Peter Crosthwaite
---
Changed since v1 (PMM review):
Add filname to error messages
Remove unneeded
arget-arm: introduce tbflag for CPSR.E"
* Wrote commit message from scratch
]
Reviewed-by: Peter Maydell
Signed-off-by: Peter Crosthwaite
---
Changed since v1:
rename mo_endianness to be_data
target-arm/translate-a64.c | 1 +
target-arm/translate.
ere USER mode is BE and system is not.
Signed-off-by: Peter Crosthwaite
---
Changed since v1:
Rewrote commit subject and message formerly:
arm: linux-user: don't set CPSR.E in BE32 mode
target-arm/cpu.h | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/ta
ss that to arm_ld*_code.
The next patches will make data fetches honor both SCTLR.B and
CPSR.E appropriately.
Signed-off-by: Paolo Bonzini
[PC changes:
* rebased on master (Jan 2016)
* s/TARGET_USER_ONLY/CONFIG_USER_ONLY
* Use bswap_code() for disas_set_info() instead of raw sctlr_b
]
Signed-off
From: Paolo Bonzini
Since this is not a high-performance path, just use a helper to
flip the E bit and force a lookup in the hash table since the
flags have changed.
Signed-off-by: Paolo Bonzini
Signed-off-by: Peter Crosthwaite
---
target-arm/helper.h| 1 +
target-arm/op_helper.c | 5
From: Peter Crosthwaite
Introduce a tbflags for endianness, set based upon the CPUs current
endianness. This in turn propagates through to the disas endianness
flag.
Signed-off-by: Peter Crosthwaite
---
changed since v1:
s/MOE/BE_DATA (PMM review)
target-arm/cpu.h | 7
[ PC changes:
* Fix long lines
]
Reviewed-by: Peter Maydell
Signed-off-by: Peter Crosthwaite
---
target-arm/translate.c | 270 ++---
1 file changed, 142 insertions(+), 128 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index ee
From: Peter Crosthwaite
Implement SCTLR.EE bit which controls data endianess for exceptions
and page table translations. SCTLR.EE is mirrored to the CPSR.E bit
on exception entry.
Signed-off-by: Peter Crosthwaite
---
target-arm/helper.c | 23 +--
1 file changed, 21
From: Peter Crosthwaite
There is a CPU data endianness test that is used to drive the
virtio_big_endian test.
Move this up to the header so it can be more generally used for endian
tests. The KVM specific cpu_syncronize_state call is left behind in the
virtio specific function.
Rename it
From: Peter Crosthwaite
Set the dc->mo_endianness flag for AA64 and use it in all ldst ops.
Reviewed-by: Peter Maydell
Signed-off-by: Peter Crosthwaite
---
target-arm/translate-a64.c | 49 --
1 file changed, 30 insertions(+), 19 deletions(-)
d
:
* Moved SCTLR/CPSR logic to arm_cpu_data_is_big_endian
]
Signed-off-by: Peter Crosthwaite
---
Changed since v1:
Removed SCTLR logic from bwap_data()
linux-user/main.c | 50 +++---
target-arm/cpu.h | 11 +++
2 files changed, 54 insertions(+), 7
From: Paolo Bonzini
This matches the idiom used by get_user_data_* later in the series,
and will help when bswap_code will be replaced by SCTLR.B.
Reviewed-by: Peter Maydell
Signed-off-by: Paolo Bonzini
Signed-off-by: Peter Crosthwaite
---
TEST result: 0 (log@ logs/qemu-armeb-BE32-)
TEST
From: Peter Crosthwaite
If doing big-endian linux-user mode, set both the CPSR.E and SCTLR.E0E
bits. This sets big-endian mode for data accesses.
Signed-off-by: Peter Crosthwaite
---
TEST result: 0 (log@ logs/qemu-armeb-BE32-)
TEST result: 0 (log@ logs/qemu-armeb-BE8-)
TEST result: 0 (log
flag for endianness
target-arm: implement setend
target-arm: implement BE32 mode in system emulation
Peter Crosthwaite (10):
target-arm: cpu: Move cpu_is_big_endian to header
arm: cpu: handle BE32 user-mode as BE
linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode
target-arm: impl
From: Paolo Bonzini
Reviewed-by: Peter Maydell
Signed-off-by: Paolo Bonzini
Signed-off-by: Peter Crosthwaite
---
TEST result: 0 (log@ logs/qemu-armeb-BE32-)
TEST result: 0 (log@ logs/qemu-armeb-BE8-)
TEST result: 0 (log@ logs/qemu-arm-LE-)
TEST result: 0 (log@ logs/qemu-system-arm-LE
On Tue, Mar 1, 2016 at 1:34 PM, Andrew Baumann
wrote:
>> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
>> Sent: Tuesday, 1 March 2016 10:44 AM
>>
>> On Mon, Feb 29, 2016 at 9:27 PM, Stefan Weil wrote:
>> > Am 18.01.2016 um 08:12 schrie
On Mon, Feb 29, 2016 at 9:27 PM, Stefan Weil wrote:
> Am 18.01.2016 um 08:12 schrieb Peter Crosthwaite:
>> Hi All,
>>
>> This patch series adds system-mode big-endian support for ARM. It also
>> implements the setend instruction, and loading of BE binaries e
On Mon, Feb 29, 2016 at 9:27 PM, Stefan Weil wrote:
> Am 18.01.2016 um 08:12 schrieb Peter Crosthwaite:
>> Hi All,
>>
>> This patch series adds system-mode big-endian support for ARM. It also
>> implements the setend instruction, and loading of BE binaries e
On Sun, Feb 28, 2016 at 7:28 AM, Peter Maydell wrote:
> On 27 February 2016 at 23:14, Peter Crosthwaite
> wrote:
>> On Tue, Jan 19, 2016 at 9:53 AM, Peter Maydell
>> wrote:
>>> Can we have a doc comment so we have something that defines what
>>> values data
On Tue, Jan 19, 2016 at 10:06 AM, Peter Maydell
wrote:
> On 18 January 2016 at 07:12, Peter Crosthwaite
> wrote:
>> Support ARM big-endian ELF files in system-mode emulation. When loading
>> an elf, determine the endianness mode expected by the elf, and set the
>> releva
On Tue, Jan 19, 2016 at 9:53 AM, Peter Maydell wrote:
> On 18 January 2016 at 07:12, Peter Crosthwaite
> wrote:
>> Some CPUs are of an opposite data-endianness to other components in the
>> system. Sometimes elfs have the data sections layed out with this CPU
>> data-
On Tue, Jan 19, 2016 at 9:50 AM, Peter Maydell wrote:
> On 18 January 2016 at 07:12, Peter Crosthwaite
> wrote:
>> Add an API to load an elf header header from a file. Populates a
>> buffer with the header contents, as well as a boolean for whether the
>> elf is 64b or
On Tue, Jan 19, 2016 at 9:35 AM, Peter Maydell wrote:
> On 19 January 2016 at 17:26, Peter Maydell wrote:
>> On 18 January 2016 at 07:12, Peter Crosthwaite
>> wrote:
>>> Don't set CPSR.E for BE32 linux-user mode. As linux-user mode models
>>> BE32, using n
On Tue, Jan 19, 2016 at 8:29 AM, Peter Maydell wrote:
> On 18 January 2016 at 07:12, Peter Crosthwaite
> wrote:
>> From: Paolo Bonzini
>>
>> Since this is not a high-performance path, just use a helper to
>> flip the E bit and force a lookup in the hash table s
On Tue, Jan 19, 2016 at 8:11 AM, Peter Maydell wrote:
> On 18 January 2016 at 07:12, Peter Crosthwaite
> wrote:
>> From: Peter Crosthwaite
>>
>> There is a CPU data endianness test that is used to drive the
>> virtio_big_endian test.
>>
>> Move this up
On Tue, Jan 19, 2016 at 7:58 AM, Peter Maydell wrote:
> On 18 January 2016 at 07:12, Peter Crosthwaite
> wrote:
>> From: Peter Crosthwaite
>>
>> Implement SCTLR.EE bit which controls data endianess for exceptions
>> and page table translations. SCTLR.EE is mi
On Sat, Feb 20, 2016 at 10:03 AM, Jean-Christophe DUBOIS
wrote:
> Le 20/02/2016 16:30, Peter Crosthwaite a écrit :
>>
>> On Sat, Feb 20, 2016 at 2:55 AM, Jean-Christophe DUBOIS
>> wrote:
>>>
>>> Just to compare I tried to run Linux on QEMU emulating highban
On Sat, Feb 20, 2016 at 2:55 AM, Jean-Christophe DUBOIS
wrote:
> Just to compare I tried to run Linux on QEMU emulating highbank.
>
> For now I am unable to start in SMP mode. Only one core is activated.
>
This is probably due to the fact that the PSCI command encodings for
Highbank expected by t
On Thu, Feb 18, 2016 at 1:47 PM, Paolo Bonzini wrote:
>
>
> On 18/02/2016 10:56, Markus Armbruster wrote:
>> Alistair Francis writes:
>>
>>> If the device being added when running qdev_device_add() has
>>> a reset function, register it so that it can be called.
>>>
>>> Signed-off-by: Alistair Fra
t;> Pre and post action callbacks can be added to read and write ops
>>> Verbose debugging info can be enabled/disabled
>>>
>>> Useful for defining device register spaces in a data driven way. Cuts
>>> down on a lot of the verbosity and repetition in the switch
On Mon, Feb 1, 2016 at 3:25 AM, Ruslan Bilovol wrote:
> On Wed, Jan 27, 2016 at 7:39 PM, Peter Crosthwaite
> wrote:
>> On Tue, Jan 26, 2016 at 4:05 AM, Ruslan Bilovol
>> wrote:
>>> On Mon, Jan 25, 2016 at 6:07 PM, Peter Maydell
>>> wrote:
>>>
On Mon, Dec 21, 2015 at 5:39 AM, Krzeminski, Marcin (Nokia -
PL/Wroclaw) wrote:
>
>
> W dniu 21.12.2015 o 12:04, Peter Crosthwaite pisze:
>> On Wed, Dec 16, 2015 at 4:57 AM, wrote:
>>> From: Marcin Krzeminski
>>>
>>> Signed-off-by: Marcin Krzem
On Fri, Jan 29, 2016 at 2:28 PM, Andrew Baumann
wrote:
>> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
>> Sent: Friday, 29 January 2016 14:23
>>
>> On Fri, Jan 29, 2016 at 1:50 PM, Andrew Baumann
>> wrote:
>> > Hi Peter,
>> >
>>
On Fri, Jan 29, 2016 at 1:50 PM, Andrew Baumann
wrote:
> Hi Peter,
>
> Thanks for all the reviews. I should have a respun version on the list
> shortly. There's one minor change to this last patch:
>
>> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
>
E_BCM2836);
> +object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc),
> + &error_abort);
> +
> +/* Allocate and map RAM */
> +memory_region_allocate_system_memory(&s->ram, OBJECT(machine), "ram",
> +
[9.286935] uart-pl011 fff36000.serial: no DMA platform data
Poky (Yocto Project Reference Distro) 2.0 qemuarm /dev/ttyAMA0
qemuarm login: root
root@qemuarm:~# uname -a
Linux qemuarm 4.2.1 #1 SMP Wed Jan 13 19:43:13 PST 2016 armv7l GNU/Linux
root@qemuarm:~#
Tested-by: Peter Crosthwaite
>
te),
> +.instance_init = bcm2836_init,
> +.class_init = bcm2836_class_init,
> +};
> +
> +static void bcm2836_register_types(void)
> +{
> +type_register_static(&bcm2836_type_info);
> +}
> +
> +type_init(bcm2836_register_types)
> diff --git a/include/hw/ar
ruct BCM2836ControlState {
> +/*< private >*/
> +SysBusDevice busdev;
> +/*< public >*/
> +MemoryRegion iomem;
> +
> +/* interrupt status registers (not directly visible to user) */
> +bool gpu_irq, gpu_fiq;
> +uint8_t timerirq
ome patches
>> on the list[*] to add this support, so I expect a future QEMU version
>> will do this.
>>
>> [*] https://lists.gnu.org/archive/html/qemu-devel/2016-01/msg03025.html
>
> Thank you four quick answer.
> I tried to apply this patch series to latest qem
On Mon, Jan 25, 2016 at 10:23 PM, Andrew Baumann
wrote:
>> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
>> Sent: Monday, 25 January 2016 22:14
>>
>> On Fri, Jan 15, 2016 at 3:58 PM, Andrew Baumann
>> wrote:
> [...]
>> > +static
_mr, obj, NULL, s, "bcm2835-peripherals",
> + 0x100);
Should this just be normal memory_region_init?
> +object_property_add_child(obj, "peripheral-io", OBJECT(&s->peri_mr),
> NULL);
This seems like a weird parenting, to have the S
"bcm2835_property: %x get board serial NYI\n",
> tag);
> +resplen = 8;
> +break;
> +case 0x00010005: /* Get ARM memory */
> +/* base */
> +stl_phys(&s->dma_as, value + 12, 0);
> +
{
> +.name = TYPE_BCM2835_MBOX,
> +.parent= TYPE_SYS_BUS_DEVICE,
> +.instance_size = sizeof(BCM2835MboxState),
> +.class_init= bcm2835_mbox_class_init,
> +.instance_init = bcm2835_mbox_init,
> +};
> +
> +static void bcm2835_mbox_re
keep
> it distributed. In order to achieve more accurate emulation behaviour of
> certain hardware, don't perform wrap around when in icount mode and return
> counter = 0 in that case (that doesn't affect polled counter distribution).
>
> Signed-off-by: Dmitry Osipenko
Reviewed-b
On Thu, Jan 21, 2016 at 11:03 AM, Dmitry Osipenko wrote:
> Current ARM MPTimer implementation uses QEMUTimer for the actual timer,
> this implementation isn't complete and mostly tries to duplicate of what
> generic ptimer is already doing fine.
>
> Conversion to ptimer brings the following benefi
mer when delta = 0 and remove duplicated
> code from ptimer_tick(), since ptimer_reload would invoke trigger and stop
> the timer.
>
> Signed-off-by: Dmitry Osipenko
Reviewed-by: Peter Crosthwaite
> ---
> hw/core/ptimer.c | 27 ---
> 1 file changed, 12 inser
On Mon, Jan 18, 2016 at 12:12 AM, Jason Wang wrote:
>
>
> On 01/18/2016 03:04 PM, Peter Crosthwaite wrote:
>> On Sun, Jan 17, 2016 at 10:50 PM, Jason Wang wrote:
>>>
>>> On 01/14/2016 05:43 PM, Michael S. Tsirkin wrote:
>>>> gem_receive copies a pa
This bounds check was off-by-one. Fix.
Reported-by: Paolo Bonzini
Signed-off-by: Peter Crosthwaite
---
hw/misc/zynq-xadc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/zynq-xadc.c b/hw/misc/zynq-xadc.c
index 1a32595..d160ff2 100644
--- a/hw/misc/zynq-xadc.c
+++ b
code() for disas_set_info() instead of raw sctlr_b
]
Signed-off-by: Peter Crosthwaite
---
linux-user/main.c | 13 -
target-arm/arm_ldst.h | 8
target-arm/cpu.c | 2 +-
target-arm/cpu.h | 47 ++
target-ar
Don't set CPSR.E for BE32 linux-user mode. As linux-user mode models
BE32, using normal BE (and system mode will not), a special case is
needed for user-mode where if sctlr.b is set, the CPU identifies as BE.
Signed-off-by: Peter Crosthwaite
---
linux-user/main.c | 2 --
target-arm/
this
endianness scheme, which means the data in the elf is reversed at
compile time.
As QEMU loads via the system memory directly, rather than the CPU, we
need a mechanism to reverse elf data endianness to implement this
possibility.
Signed-off-by: Peter Crosthwaite
---
hw/alpha/dp
From: Peter Crosthwaite
There is a CPU data endianness test that is used to drive the
virtio_big_endian test.
Move this up to the header so it can be more generally used for endian
tests. The KVM specific cpu_syncronize_state call is left behind in the
virtio specific function.
Signed-off-by
From: Peter Crosthwaite
Introduce a tbflags for endianness, set based upon the CPUs current
endianness. This in turn propagates through to the disas endianness
flag.
Signed-off-by: Peter Crosthwaite
---
target-arm/cpu.h | 7 +++
target-arm/translate-a64.c | 2 +-
target-arm
Add an API to load an elf header header from a file. Populates a
buffer with the header contents, as well as a boolean for whether the
elf is 64b or not. Both arguments are optional.
Signed-off-by: Peter Crosthwaite
---
hw/core/loader.c| 48
From: Paolo Bonzini
This matches the idiom used by get_user_data_* later in the series,
and will help when bswap_code will be replaced by SCTLR.B.
Reviewed-by: Peter Maydell
Signed-off-by: Paolo Bonzini
Signed-off-by: Peter Crosthwaite
---
linux-user/main.c | 20 +---
1
the TARGET
endianness so the ifdeffery on TARGET_WORDS_BIGENDIAN goes away.
Signed-off-by: Peter Crosthwaite
---
hw/arm/boot.c| 96 ++--
include/hw/arm/arm.h | 9 +
2 files changed, 88 insertions(+), 17 deletions(-)
diff --git a/hw
(Jan 2016)
]
Signed-off-by: Peter Crosthwaite
---
target-arm/cpu.h | 5 ++-
target-arm/translate.c | 86 +-
2 files changed, 73 insertions(+), 18 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 96b1e99..5814019 100644
[ PC changes:
* Fix long lines
]
Signed-off-by: Peter Crosthwaite
---
target-arm/translate.c | 270 ++---
1 file changed, 142 insertions(+), 128 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index d485e7d..55ecca5 100644
: Paolo Bonzini
[ PC changes:
* Remove BE32 support
]
Signed-off-by: Peter Crosthwaite
---
linux-user/main.c | 50 +++---
target-arm/cpu.h | 21 +
2 files changed, 64 insertions(+), 7 deletions(-)
diff --git a/linux-user/main.c b
arget-arm: introduce tbflag for CPSR.E"
* Wrote commit message from scratch
]
Signed-off-by: Peter Crosthwaite
---
target-arm/translate-a64.c | 1 +
target-arm/translate.c | 39 ---
target-arm/translate.h | 1 +
3 files changed, 26 inserti
From: Paolo Bonzini
Since this is not a high-performance path, just use a helper to
flip the E bit and force a lookup in the hash table since the
flags have changed.
Signed-off-by: Paolo Bonzini
Signed-off-by: Peter Crosthwaite
---
target-arm/helper.h| 1 +
target-arm/op_helper.c | 5
From: Peter Crosthwaite
Set the dc->mo_endianness flag for AA64 and use it in all ldst ops.
Signed-off-by: Peter Crosthwaite
---
target-arm/translate-a64.c | 49 --
1 file changed, 30 insertions(+), 19 deletions(-)
diff --git a/target-
From: Peter Crosthwaite
Implement SCTLR.EE bit which controls data endianess for exceptions
and page table translations. SCTLR.EE is mirrored to the CPSR.E bit
on exception entry.
Signed-off-by: Peter Crosthwaite
---
target-arm/helper.c | 42 --
1 file
From: Paolo Bonzini
Reviewed-by: Peter Maydell
Signed-off-by: Paolo Bonzini
Signed-off-by: Peter Crosthwaite
---
linux-user/signal.c | 110 ++--
1 file changed, 56 insertions(+), 54 deletions(-)
diff --git a/linux-user/signal.c b/linux-user
From: Peter Crosthwaite
If doing big-endian linux-user mode, set both the CPSR.E and SCTLR.E0E
bits. This sets big-endian mode for data accesses in AA32 and AA64
resp.
Signed-off-by: Peter Crosthwaite
---
linux-user/main.c | 4
1 file changed, 4 insertions(+)
diff --git a/linux-user
ation
Peter Crosthwaite (9):
linux-user: arm: set CPSR.E/SCTLR.E0E correctly for BE mode
target-arm: implement SCTLR.EE
target-arm: a64: Add endianness support
target-arm: cpu: Move cpu_is_big_endian to header
target-arm: introduce tbflag for endianness
arm: linux-user: don't set CPSR
On Sun, Jan 17, 2016 at 10:50 PM, Jason Wang wrote:
>
>
> On 01/14/2016 05:43 PM, Michael S. Tsirkin wrote:
>> gem_receive copies a packet received from network into an rxbuf[2048]
>> array on stack, with size limited by descriptor length set by guest. If
>> guest is malicious and specifies a des
On Fri, Jan 15, 2016 at 2:38 PM, Alistair Francis
wrote:
> From: Peter Crosthwaite
>
> qbus_realize() adds busses as a QOM child of the device in addition to
> adding it to the qdev bus list. Change get_child_bus() to use the QOM
> child if it is available. This takes priority ov
On Thu, Jan 14, 2016 at 2:03 AM, Peter Maydell wrote:
> On 14 January 2016 at 09:43, Michael S. Tsirkin wrote:
>> gem_receive copies a packet received from network into an rxbuf[2048]
>> array on stack, with size limited by descriptor length set by guest. If
>> guest is malicious and specifies a
On Thu, Jan 14, 2016 at 4:43 PM, Andrew Baumann
wrote:
>> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
>> Sent: Thursday, 14 January 2016 15:35
>>
>> On Thu, Jan 14, 2016 at 3:04 PM, Andrew Baumann
>> wrote:
>> > Hi Peter,
>> >
>
CC Andrew,
This may be the missing feature for your system_memory for CPU RAM
access problem.
Regards,
Peter
On Thu, Jan 14, 2016 at 5:52 AM, Peter Maydell wrote:
> From: Peter Crosthwaite
>
> Add a MemoryRegion property, which if set is used to construct
> the CPU's
On Thu, Jan 14, 2016 at 3:04 PM, Andrew Baumann
wrote:
> Hi Peter,
>
>> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
>> Sent: Tuesday, 12 January 2016 16:44
>> On Tue, Jan 12, 2016 at 3:53 PM, Andrew Baumann
>> wrote:
>> >> Fro
On Thu, Jan 14, 2016 at 1:57 AM, KONRAD Frederic
wrote:
>
>
> Le 13/01/2016 22:02, Peter Crosthwaite a écrit :
>>
>> On Mon, Jan 4, 2016 at 10:25 AM, wrote:
>>>
>>> From: KONRAD Frederic
>>>
>>> This introduces a new bus: aux-bus.
>&g
On Mon, Jan 4, 2016 at 10:25 AM, wrote:
> From: KONRAD Frederic
>
> This introduces a new bus: aux-bus.
>
> It contains an address space for aux slaves devices and a bridge to an I2C bus
> for I2C through AUX transactions.
>
> Signed-off-by: KONRAD Frederic
> Tested-By: Hyun Kwon
> ---
> defa
On Wed, Jan 13, 2016 at 8:07 AM, Tim Sander wrote:
> Hi
> Am Donnerstag, 7. Januar 2016, 02:14:23 schrieb Peter Crosthwaite:
>> Patch subject prefix should contain the version number. Use the
>> --subject-prefix or -v options to git format-patch.
> Ok, i will try to re
On Tue, Jan 12, 2016 at 3:53 PM, Andrew Baumann
wrote:
>> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
>> Sent: Monday, 11 January 2016 19:58
> [...]
>> > +static void write_board_setup(ARMCPU *cpu, const struct arm_boot_info
>> *info)
>>
>
On Tue, Jan 12, 2016 at 2:56 PM, Andrew Baumann
wrote:
> Hi Peter,
>
> Thanks again for the reviews.
>
>> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
>> Sent: Monday, 11 January 2016 19:57
>> On Thu, Dec 31, 2015 at 04:31:33PM -0800, Andrew Ba
On Tue, Jan 12, 2016 at 2:07 PM, Alistair Francis
wrote:
> On Tue, Jan 12, 2016 at 2:00 PM, Peter Crosthwaite
> wrote:
>> On Tue, Jan 12, 2016 at 1:59 PM, Alistair Francis
>> wrote:
>>> On Tue, Jan 12, 2016 at 1:01 AM, Peter Maydell
>>> wrote:
>&g
On Tue, Jan 12, 2016 at 1:59 PM, Alistair Francis
wrote:
> On Tue, Jan 12, 2016 at 1:01 AM, Peter Maydell
> wrote:
>> On 12 January 2016 at 00:24, Alistair Francis
>> wrote:
>>> On Mon, Jan 11, 2016 at 8:04 AM, Peter Maydell
>>> wrote:
There are a couple of problems you're running into:
On Sat, Jan 09, 2016 at 08:39:53PM +0300, Dmitry Osipenko wrote:
> Currently ptimer would print error message and clear enable flag for an
> arming timer that has delta = load = 0. That actually could be a valid case
> for some hardware, like instant IRQ trigger for oneshot timer or continuous
> in
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