Hi,
At Mon, 25 Jul 2011 19:22:38 +0200,
Artyom Tarasenko wrote:
clear interrupt request if the interrupt priority CPU pil
clear hardware interrupt request if interrupts are disabled
Not directly related to the fix, but I'd like to note a problem
of hw/sun4u.c interrupt code:
The interrupt
At Thu, 28 Jul 2011 13:51:08 +0200,
Artyom Tarasenko wrote:
On Thu, Jul 28, 2011 at 12:31 PM, tsnsa...@gmail.com wrote:
Hi,
At Mon, 25 Jul 2011 19:22:38 +0200,
Artyom Tarasenko wrote:
clear interrupt request if the interrupt priority CPU pil
clear hardware interrupt request if
At Thu, 28 Jul 2011 14:50:57 +0200,
Artyom Tarasenko wrote:
On Thu, Jul 28, 2011 at 2:03 PM, tsnsa...@gmail.com wrote:
At Thu, 28 Jul 2011 13:51:08 +0200,
Artyom Tarasenko wrote:
On Thu, Jul 28, 2011 at 12:31 PM, tsnsa...@gmail.com wrote:
Hi,
At Mon, 25 Jul 2011 19:22:38 +0200,
At Thu, 28 Jul 2011 16:44:23 +0200,
Artyom Tarasenko wrote:
On Thu, Jul 28, 2011 at 3:40 PM, tsnsa...@gmail.com wrote:
At Thu, 28 Jul 2011 14:50:57 +0200,
Artyom Tarasenko wrote:
On Thu, Jul 28, 2011 at 2:03 PM, tsnsa...@gmail.com wrote:
At Thu, 28 Jul 2011 13:51:08 +0200,
Artyom
At Fri, 22 Jul 2011 07:44:27 +0200,
Stefan Weil wrote:
This change is needed because commit 06e12b65
now uses an unsigned long long value
(uint64_t unsigned long long = unsigned long long).
Cc: Tsuneo Saito tsnsa...@gmail.com
Cc: Blue Swirl blauwir...@gmail.com
Signed-off-by: Stefan Weil
At Thu, 14 Jul 2011 09:38:18 +0200,
Artyom Tarasenko wrote:
On Thu, Jul 14, 2011 at 5:13 AM, tsnsa...@gmail.com wrote:
At Wed, 13 Jul 2011 19:34:10 +0300,
Blue Swirl wrote:
On Wed, Jul 13, 2011 at 3:48 PM, tsnsa...@gmail.com wrote:
At Wed, 13 Jul 2011 13:09:28 +0100,
Mark
At Thu, 14 Jul 2011 22:46:30 +0200,
Artyom Tarasenko wrote:
On Thu, Jul 14, 2011 at 11:41 AM, Tsuneo Saito tsnsa...@gmail.com wrote:
Support UA2007 block store ASIs for stfa instructions.
Signed-off-by: Tsuneo Saito tsnsa...@gmail.com
---
target-sparc/op_helper.c | 6 +-
1
At Thu, 14 Jul 2011 18:31:52 +0300,
Blue Swirl wrote:
On Thu, Jul 14, 2011 at 12:13 PM, tsnsa...@gmail.com wrote:
The softmmu version of current implementation is incorrect.
Nonfaulting loads should generate exceptions in the same way as
normal loads. The CPU hardware should not return
Hi,
At Wed, 13 Jul 2011 10:57:19 +0200,
Artyom Tarasenko wrote:
On Wed, Jul 13, 2011 at 5:30 AM, Tsuneo Saito tsnsa...@gmail.com wrote:
Hi,
This patch series implements sparcv9 stfa/ldfa instructions with
non block-transfer ASIs that implementations seem to be left unfinished.
This
Hi,
At Wed, 13 Jul 2011 13:09:28 +0100,
Mark Cave-Ayland wrote:
Nice series!
May I ask what have you used as a test case to discover the problem?
I found the problem when I was trying to run the linux/sparc64 kernel.
It seemed that copy_to_user() did not work as expected.
That's good
Hi,
At Wed, 13 Jul 2011 21:19:16 +0300,
Blue Swirl wrote:
On Wed, Jul 13, 2011 at 9:02 PM, Artyom Tarasenko atar4q...@gmail.com wrote:
On Wed, Jul 13, 2011 at 6:27 PM, Blue Swirl blauwir...@gmail.com wrote:
On Wed, Jul 13, 2011 at 6:30 AM, Tsuneo Saito tsnsa...@gmail.com wrote:
So you
Hi,
At Wed, 13 Jul 2011 19:34:10 +0300,
Blue Swirl wrote:
On Wed, Jul 13, 2011 at 3:48 PM, tsnsa...@gmail.com wrote:
At Wed, 13 Jul 2011 13:09:28 +0100,
Mark Cave-Ayland wrote:
Nice series!
May I ask what have you used as a test case to discover the problem?
I found the problem
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