Oh yes I see. Sorry for the false report.
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https://bugs.launchpad.net/bugs/1889288
Title:
aarch64 BICS instruciton doesn't set flags
Status in QEMU:
Invalid
Bug description:
When
The code is correct (though it is admittedly not entirely obvious at
first glance). The switch statement at line 4753 is on "(opc | (invert
<< 2))" (where opc is a 2 bit field and invert a 1 bit field). Both ANDS
and BICS have opc==3 and so will cause a call to gen_logic_CC(). The
difference betwee