Re: [PATCH] Hexagon: lldb read/write predicate registers p0/p1/p2/p3

2024-07-30 Thread Brian Cain
On 6/12/2024 11:42 AM, Taylor Simpson wrote: hexagon-core.xml only exposes register p3_0 which is an alias that aggregates the predicate registers. It is more convenient for users to interact directly with the predicate registers. Tested with lldb downloaded from this location https://github.

RE: [PATCH] Hexagon: lldb read/write predicate registers p0/p1/p2/p3

2024-06-13 Thread ltaylorsimpson
der...@linaro.org; > phi...@linaro.org; a...@rev.ng; a...@rev.ng > Subject: RE: [PATCH] Hexagon: lldb read/write predicate registers > p0/p1/p2/p3 > > > > > -Original Message- > > From: ltaylorsimp...@gmail.com > > Sent: Wednesday, June 12, 2024 9

RE: [PATCH] Hexagon: lldb read/write predicate registers p0/p1/p2/p3

2024-06-13 Thread Ted Woodward
ender...@linaro.org; phi...@linaro.org; a...@rev.ng; a...@rev.ng > Subject: RE: [PATCH] Hexagon: lldb read/write predicate registers > p0/p1/p2/p3 > > > -Original Message- > > From: Matheus Tavares Bernardino > > Sent: Wednesday, June 12, 2024 12:30 PM > > T

RE: [PATCH] Hexagon: lldb read/write predicate registers p0/p1/p2/p3

2024-06-12 Thread ltaylorsimpson
uicinc.com; quic_mlie...@quicinc.com; > richard.hender...@linaro.org; phi...@linaro.org; a...@rev.ng; a...@rev.ng > Subject: Re: [PATCH] Hexagon: lldb read/write predicate registers > p0/p1/p2/p3 > > On Wed, 12 Jun 2024 10:42:39 -0600 Taylor Simpson > wrote: > > > > dif

Re: [PATCH] Hexagon: lldb read/write predicate registers p0/p1/p2/p3

2024-06-12 Thread Matheus Tavares Bernardino
On Wed, 12 Jun 2024 10:42:39 -0600 Taylor Simpson wrote: > > diff --git a/target/hexagon/gdbstub.c b/target/hexagon/gdbstub.c > index 502c6987f0..e67e627fc9 100644 > --- a/target/hexagon/gdbstub.c > +++ b/target/hexagon/gdbstub.c > @@ -56,6 +64,15 @@ int hexagon_gdb_write_register(CPUState *cs, u

[PATCH] Hexagon: lldb read/write predicate registers p0/p1/p2/p3

2024-06-12 Thread Taylor Simpson
hexagon-core.xml only exposes register p3_0 which is an alias that aggregates the predicate registers. It is more convenient for users to interact directly with the predicate registers. Tested with lldb downloaded from this location https://github.com/llvm/llvm-project/releases/download/llvmorg-1