Re: [PATCH] acpi/gpex: Inform os to keep firmware resource map

2021-07-21 Thread Guenter Roeck
Hi, On Thu, Dec 17, 2020 at 09:29:26PM +0800, Jiahui Cen wrote: > There may be some differences in pci resource assignment between guest os > and firmware. > > Eg. A Bridge with Bus [d2] > -+-[:d2]---01.0-[d3]01.0 > > where [d2:01.00] is a pcie-pci-bridge with BAR0 (mem, 64-bit,

Re: [PATCH] acpi/gpex: Inform os to keep firmware resource map

2020-12-20 Thread Jiahui Cen
Hi Michael, On 2020/12/20 3:06, Michael S. Tsirkin wrote: > On Fri, Dec 18, 2020 at 01:56:29PM +0800, Jiahui Cen wrote: >> Hi Michael, >> >> On 2020/12/18 4:04, Michael S. Tsirkin wrote: >>> On Thu, Dec 17, 2020 at 09:29:26PM +0800, Jiahui Cen wrote: There may be some differences in pci resou

Re: [PATCH] acpi/gpex: Inform os to keep firmware resource map

2020-12-19 Thread Michael S. Tsirkin
On Fri, Dec 18, 2020 at 01:56:29PM +0800, Jiahui Cen wrote: > Hi Michael, > > On 2020/12/18 4:04, Michael S. Tsirkin wrote: > > On Thu, Dec 17, 2020 at 09:29:26PM +0800, Jiahui Cen wrote: > >> There may be some differences in pci resource assignment between guest os > >> and firmware. > >> > >> Eg

Re: [PATCH] acpi/gpex: Inform os to keep firmware resource map

2020-12-17 Thread Jiahui Cen
Hi Michael, On 2020/12/18 2:29, Michael S. Tsirkin wrote: > On Thu, Dec 17, 2020 at 09:29:26PM +0800, Jiahui Cen wrote: >> There may be some differences in pci resource assignment between guest os >> and firmware. >> >> Eg. A Bridge with Bus [d2] >> -+-[:d2]---01.0-[d3]01.0 >> >> w

Re: [PATCH] acpi/gpex: Inform os to keep firmware resource map

2020-12-17 Thread Jiahui Cen
Hi Michael, On 2020/12/18 4:04, Michael S. Tsirkin wrote: > On Thu, Dec 17, 2020 at 09:29:26PM +0800, Jiahui Cen wrote: >> There may be some differences in pci resource assignment between guest os >> and firmware. >> >> Eg. A Bridge with Bus [d2] >> -+-[:d2]---01.0-[d3]01.0 >> >> w

Re: [PATCH] acpi/gpex: Inform os to keep firmware resource map

2020-12-17 Thread Michael S. Tsirkin
On Thu, Dec 17, 2020 at 09:29:26PM +0800, Jiahui Cen wrote: > There may be some differences in pci resource assignment between guest os > and firmware. > > Eg. A Bridge with Bus [d2] > -+-[:d2]---01.0-[d3]01.0 > > where [d2:01.00] is a pcie-pci-bridge with BAR0 (mem, 64-bit, non-p

Re: [PATCH] acpi/gpex: Inform os to keep firmware resource map

2020-12-17 Thread Ard Biesheuvel
On 12/17/20 6:23 PM, Laszlo Ersek wrote: > On 12/17/20 14:52, Jiahui Cen wrote: >> +Laszlo >> >> On 2020/12/17 21:29, Jiahui Cen wrote: >>> There may be some differences in pci resource assignment between guest os >>> and firmware. >>> >>> Eg. A Bridge with Bus [d2] >>> -+-[:d2]---01.0-[d3]

Re: [PATCH] acpi/gpex: Inform os to keep firmware resource map

2020-12-17 Thread Michael S. Tsirkin
On Thu, Dec 17, 2020 at 09:29:26PM +0800, Jiahui Cen wrote: > There may be some differences in pci resource assignment between guest os > and firmware. > > Eg. A Bridge with Bus [d2] > -+-[:d2]---01.0-[d3]01.0 > > where [d2:01.00] is a pcie-pci-bridge with BAR0 (mem, 64-bit, non-p

Re: [PATCH] acpi/gpex: Inform os to keep firmware resource map

2020-12-17 Thread Laszlo Ersek
On 12/17/20 14:52, Jiahui Cen wrote: > +Laszlo > > On 2020/12/17 21:29, Jiahui Cen wrote: >> There may be some differences in pci resource assignment between guest os >> and firmware. >> >> Eg. A Bridge with Bus [d2] >> -+-[:d2]---01.0-[d3]01.0 >> >> where [d2:01.00] is a pcie-pci-

Re: [PATCH] acpi/gpex: Inform os to keep firmware resource map

2020-12-17 Thread Jiahui Cen
+Laszlo On 2020/12/17 21:29, Jiahui Cen wrote: > There may be some differences in pci resource assignment between guest os > and firmware. > > Eg. A Bridge with Bus [d2] > -+-[:d2]---01.0-[d3]01.0 > > where [d2:01.00] is a pcie-pci-bridge with BAR0 (mem, 64-bit, non-pref) > [siz

[PATCH] acpi/gpex: Inform os to keep firmware resource map

2020-12-17 Thread Jiahui Cen
There may be some differences in pci resource assignment between guest os and firmware. Eg. A Bridge with Bus [d2] -+-[:d2]---01.0-[d3]01.0 where [d2:01.00] is a pcie-pci-bridge with BAR0 (mem, 64-bit, non-pref) [size=256] [d3:01.00] is a PCI Device with BAR0 (mem, 64-b