On 9/12/23 14:06, Ani Sinha wrote:
PAE mode in x86 supports 36 bit address space. Check the PAE CPUID on the
guest processor and set phys_bits to 36 if PAE feature is set. This is in
addition to checking the presence of PSE36 CPUID feature for setting 36 bit
phys_bits.
Signed-off-by: Ani Sinha
On Thu, 19 Oct, 2023, 7:36 am Ani Sinha, wrote:
>
>
> On Wed, 18 Oct, 2023, 11:14 pm Michael S. Tsirkin, wrote:
>
>> On Wed, Oct 18, 2023 at 11:08:11PM +0530, Ani Sinha wrote:
>> >
>> >
>> > On Wed, 18 Oct, 2023, 5:35 pm Michael S. Tsirkin,
>> wrote:
>> >
>> > On Tue, Sep 12, 2023 at 05:36:
On Wed, 18 Oct, 2023, 11:14 pm Michael S. Tsirkin, wrote:
> On Wed, Oct 18, 2023 at 11:08:11PM +0530, Ani Sinha wrote:
> >
> >
> > On Wed, 18 Oct, 2023, 5:35 pm Michael S. Tsirkin,
> wrote:
> >
> > On Tue, Sep 12, 2023 at 05:36:50PM +0530, Ani Sinha wrote:
> > > PAE mode in x86 supports
On Wed, Oct 18, 2023 at 11:08:11PM +0530, Ani Sinha wrote:
>
>
> On Wed, 18 Oct, 2023, 5:35 pm Michael S. Tsirkin, wrote:
>
> On Tue, Sep 12, 2023 at 05:36:50PM +0530, Ani Sinha wrote:
> > PAE mode in x86 supports 36 bit address space. Check the PAE CPUID on
> the
> > guest process
On Wed, 18 Oct, 2023, 5:35 pm Michael S. Tsirkin, wrote:
> On Tue, Sep 12, 2023 at 05:36:50PM +0530, Ani Sinha wrote:
> > PAE mode in x86 supports 36 bit address space. Check the PAE CPUID on the
> > guest processor and set phys_bits to 36 if PAE feature is set. This is in
> > addition to checkin
On Tue, Sep 12, 2023 at 05:36:50PM +0530, Ani Sinha wrote:
> PAE mode in x86 supports 36 bit address space. Check the PAE CPUID on the
> guest processor and set phys_bits to 36 if PAE feature is set. This is in
> addition to checking the presence of PSE36 CPUID feature for setting 36 bit
> phys_bit
On 12.09.23 14:06, Ani Sinha wrote:
PAE mode in x86 supports 36 bit address space. Check the PAE CPUID on the
guest processor and set phys_bits to 36 if PAE feature is set. This is in
addition to checking the presence of PSE36 CPUID feature for setting 36 bit
phys_bits.
Signed-off-by: Ani Sinha
PAE mode in x86 supports 36 bit address space. Check the PAE CPUID on the
guest processor and set phys_bits to 36 if PAE feature is set. This is in
addition to checking the presence of PSE36 CPUID feature for setting 36 bit
phys_bits.
Signed-off-by: Ani Sinha
---
target/i386/cpu.c | 2 +-
1 file