On Mon, Mar 11, 2024 at 11:56:42AM -0700, Richard Bagley wrote:
> I have realized that *the patch is indeed a fix*, not a workaround.
>
> In fact, the argument to LUI and AUIPC in assembly *must* be a number
> between [0x0, 0xf].
> RISC-V Assembly Programmer's Manual : Load Upper Immediate's
LUI and AUIPC would naturally be used to build an address.
If you want to supply a signed decimal number to build an immediate, there
is always the pseudo-instruction LI.
On Mon, Mar 11, 2024 at 11:56 AM Richard Bagley
wrote:
> I have realized that *the patch is indeed a fix*, not a workaround.
I have realized that *the patch is indeed a fix*, not a workaround.
In fact, the argument to LUI and AUIPC in assembly *must* be a number
between [0x0, 0xf].
RISC-V Assembly Programmer's Manual : Load Upper Immediate's Immediate
On Fri, Mar 08, 2024 at 08:22:01PM -0800, Richard Bagley wrote:
> post-nack, one further comment:
>
> One could argue that this change also aligns QEMU with supporting tools (as
> Andrew observed), and it makes sense to merge this change into QEMU until
> those tools update to supporting signed
post-nack, one further comment:
One could argue that this change also aligns QEMU with supporting tools (as
Andrew observed), and it makes sense to merge this change into QEMU until
those tools update to supporting signed decimal numbers with immediates.
As it is, both GNU assembler and the LLVM
NACK
We have established that the change is a workaround for a bug in
the assembler.
I withdraw the merge request.
Thank you for this careful review.
On Fri, Aug 11, 2023 at 4:55 AM Andrew Jones
wrote:
> On Fri, Aug 11, 2023 at 10:25:52AM +0200, Andrew Jones wrote:
> > On Thu, Aug 10, 2023 at
On Fri, Aug 11, 2023 at 10:25:52AM +0200, Andrew Jones wrote:
> On Thu, Aug 10, 2023 at 06:27:50PM +0200, Andrew Jones wrote:
> > On Thu, Aug 10, 2023 at 09:12:42AM -0700, Palmer Dabbelt wrote:
> > > On Thu, 10 Aug 2023 08:31:46 PDT (-0700), ajo...@ventanamicro.com wrote:
> > > > On Mon, Jul 31,
On Thu, Aug 10, 2023 at 06:27:50PM +0200, Andrew Jones wrote:
> On Thu, Aug 10, 2023 at 09:12:42AM -0700, Palmer Dabbelt wrote:
> > On Thu, 10 Aug 2023 08:31:46 PDT (-0700), ajo...@ventanamicro.com wrote:
> > > On Mon, Jul 31, 2023 at 11:33:20AM -0700, Richard Bagley wrote:
> > > > The recent
On Thu, Aug 10, 2023 at 09:12:42AM -0700, Palmer Dabbelt wrote:
> On Thu, 10 Aug 2023 08:31:46 PDT (-0700), ajo...@ventanamicro.com wrote:
> > On Mon, Jul 31, 2023 at 11:33:20AM -0700, Richard Bagley wrote:
> > > The recent commit 36df75a0a9 corrected one aspect of LUI disassembly
> > > by
On Thu, 10 Aug 2023 08:31:46 PDT (-0700), ajo...@ventanamicro.com wrote:
On Mon, Jul 31, 2023 at 11:33:20AM -0700, Richard Bagley wrote:
The recent commit 36df75a0a9 corrected one aspect of LUI disassembly
by recovering the immediate argument from the result of LUI with a
shift right by 12.
On Mon, Jul 31, 2023 at 11:33:20AM -0700, Richard Bagley wrote:
> The recent commit 36df75a0a9 corrected one aspect of LUI disassembly
> by recovering the immediate argument from the result of LUI with a
> shift right by 12. However, the shift right will left-fill with the
> sign. By applying a
On 8/7/23 15:01, Richard Bagley wrote:
I do apologize, but I do not understand your remark at all. Could I trouble you to spell
this out.
In:
+ snprintf(tmp, sizeof(tmp), "%d", dec->imm >> 12 & 0xf);
0xf is a mask which recovers the 20 bit field used to represent the
I do apologize, but I do not understand your remark at all. Could I trouble
you to spell this out.
In:
+snprintf(tmp, sizeof(tmp), "%d", dec->imm >> 12 & 0xf);
0xf is a mask which recovers the 20 bit field used to represent the
immediate in the instruction encoding.
You
On 7/31/23 11:33, Richard Bagley wrote:
The recent commit 36df75a0a9 corrected one aspect of LUI disassembly
by recovering the immediate argument from the result of LUI with a
shift right by 12. However, the shift right will left-fill with the
sign. By applying a mask we recover an unsigned
The recent commit 36df75a0a9 corrected one aspect of LUI disassembly
by recovering the immediate argument from the result of LUI with a
shift right by 12. However, the shift right will left-fill with the
sign. By applying a mask we recover an unsigned representation of the
20-bit field (which
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