Re: [PATCH] riscv: Separate FPU register size from core register size in gdbstub [v2]

2020-02-10 Thread Palmer Dabbelt
On Thu, 30 Jan 2020 14:13:16 PST (-0800), kei...@keithp.com wrote: Palmer Dabbelt writes: This isn't working for me. When I apply it on top of my for-master (which is very close to master), I get warning: while parsing target description (at line 1): Could not load XML document "risc

Re: [PATCH] riscv: Separate FPU register size from core register size in gdbstub [v2]

2020-01-30 Thread Keith Packard
Palmer Dabbelt writes: > This isn't working for me. When I apply it on top of my for-master (which is > very close to master), I get > warning: while parsing target description (at line 1): Could not load XML > document "riscv-64bit-fpu.xml" If you're building from an existing directory,

Re: [PATCH] riscv: Separate FPU register size from core register size in gdbstub [v2]

2020-01-30 Thread Palmer Dabbelt
On Tue, 28 Jan 2020 23:32:16 GMT (+), kei...@keithp.com wrote: The size of the FPU registers is dictated by the 'f' and 'd' features, not the core processor register size. Processors with the 'd' feature have 64-bit FPU registers. Processors without the 'd' feature but with the 'f' feature ha

Re: [PATCH] riscv: Separate FPU register size from core register size in gdbstub

2020-01-28 Thread no-reply
size from core register size in gdbstub === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT

Re: [PATCH] riscv: Separate FPU register size from core register size in gdbstub [v2]

2020-01-28 Thread Alistair Francis
On Tue, Jan 28, 2020 at 3:33 PM Keith Packard via wrote: > > The size of the FPU registers is dictated by the 'f' and 'd' features, > not the core processor register size. Processors with the 'd' feature > have 64-bit FPU registers. Processors without the 'd' feature but with > the 'f' feature hav

Re: [PATCH] riscv: Separate FPU register size from core register size in gdbstub

2020-01-28 Thread Keith Packard
Alistair Francis writes: > You need brackets around all if statements, besides that: Sorry for the noise; I caught that and sent another version of this patch. > Reviewed-by: Alistair Francis Thanks for your review! -- -keith signature.asc Description: PGP signature

[PATCH] riscv: Separate FPU register size from core register size in gdbstub [v2]

2020-01-28 Thread Keith Packard via
The size of the FPU registers is dictated by the 'f' and 'd' features, not the core processor register size. Processors with the 'd' feature have 64-bit FPU registers. Processors without the 'd' feature but with the 'f' feature have 32-bit FPU registers. Signed-off-by: Keith Packard --- v2:

Re: [PATCH] riscv: Separate FPU register size from core register size in gdbstub

2020-01-28 Thread Alistair Francis
On Tue, Jan 28, 2020 at 2:40 PM Keith Packard via wrote: > > The size of the FPU registers is dictated by the 'f' and 'd' features, > not the core processor register size. Processors with the 'd' feature > have 64-bit FPU registers. Processors without the 'd' feature but with > the 'f' feature hav

Re: [PATCH] riscv: Separate FPU register size from core register size in gdbstub

2020-01-28 Thread no-reply
size from core register size in gdbstub === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT

[PATCH] riscv: Separate FPU register size from core register size in gdbstub

2020-01-28 Thread Keith Packard via
The size of the FPU registers is dictated by the 'f' and 'd' features, not the core processor register size. Processors with the 'd' feature have 64-bit FPU registers. Processors without the 'd' feature but with the 'f' feature have 32-bit FPU registers. Signed-off-by: Keith Packard --- configur