On Thu, 28 Apr 2022 at 14:28, Alex Zuepke wrote:
>
> The ARMv8 manual defines that PMUSERENR_EL0.ER enables read-access
> to both PMXEVCNTR_EL0 and PMEVCNTR_EL0 registers, however,
> we only use it for PMXEVCNTR_EL0. Extend to PMEVCNTR_EL0 as well.
>
> Signed-off-by: Alex Zuepke
> ---
> target/a
On 4/28/22 06:27, Alex Zuepke wrote:
The ARMv8 manual defines that PMUSERENR_EL0.ER enables read-access
to both PMXEVCNTR_EL0 and PMEVCNTR_EL0 registers, however,
we only use it for PMXEVCNTR_EL0. Extend to PMEVCNTR_EL0 as well.
Signed-off-by: Alex Zuepke
---
target/arm/helper.c | 4 ++--
1 f
On Wed, 4 May 2022 at 09:20, Alex Zuepke wrote:
>
> Hi,
>
> wanted to ping again on this issue before it gets lost.
Thanks for the ping; this is on my to-review queue and I'll probably
get to it later this week.
-- PMM
Hi,
wanted to ping again on this issue before it gets lost.
Am 28.04.22 um 15:27 schrieb Alex Zuepke:
The ARMv8 manual defines that PMUSERENR_EL0.ER enables read-access
to both PMXEVCNTR_EL0 and PMEVCNTR_EL0 registers, however,
we only use it for PMXEVCNTR_EL0. Extend to PMEVCNTR_EL0 as well.
The ARMv8 manual defines that PMUSERENR_EL0.ER enables read-access
to both PMXEVCNTR_EL0 and PMEVCNTR_EL0 registers, however,
we only use it for PMXEVCNTR_EL0. Extend to PMEVCNTR_EL0 as well.
Signed-off-by: Alex Zuepke
---
target/arm/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletion