Re: [PATCH] target/hppa: Fix fid instruction emulation

2022-10-27 Thread Helge Deller
On 10/27/22 11:48, Richard Henderson wrote: On 10/27/22 16:31, Helge Deller wrote: The fid instruction (Floating-Point Identify) puts the FPU model and revision into the Status Register. Since those values shouldn't be 0, store values there which a PCX-L2 (for 32-bit) or a PCX-W2 (for 64-bit) wo

Re: [PATCH] target/hppa: Fix fid instruction emulation

2022-10-27 Thread Richard Henderson
On 10/27/22 16:31, Helge Deller wrote: The fid instruction (Floating-Point Identify) puts the FPU model and revision into the Status Register. Since those values shouldn't be 0, store values there which a PCX-L2 (for 32-bit) or a PCX-W2 (for 64-bit) would return. Signed-off-by: Helge Deller di

[PATCH] target/hppa: Fix fid instruction emulation

2022-10-26 Thread Helge Deller
The fid instruction (Floating-Point Identify) puts the FPU model and revision into the Status Register. Since those values shouldn't be 0, store values there which a PCX-L2 (for 32-bit) or a PCX-W2 (for 64-bit) would return. Signed-off-by: Helge Deller diff --git a/target/hppa/insns.decode b/tar