On Fri, Jun 28, 2024 at 7:46 PM Zhiwei Jiang wrote:
>
> In the original extract32(val, 0, lmul) logic, when lmul is 2 and val is v10
> or v12,
> there is an issue with this check condition. I think a simple mod operation
> is sufficient.
Overall looks ok. Do you mind updating the commit message
In the original extract32(val, 0, lmul) logic, when lmul is 2 and val is v10 or
v12,
there is an issue with this check condition. I think a simple mod operation is
sufficient.
Signed-off-by: Zhiwei Jiang
---
target/riscv/insn_trans/trans_rvv.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 dele
