Re: [PATCH] target/riscv: Remove condition guarding register zero for auipc and lui

2022-06-12 Thread Alistair Francis
On Sat, Jun 11, 2022 at 2:59 AM Víctor Colombo wrote: > > Commit 57c108b8646 introduced gen_set_gpri(), which already contains > a check for if the destination register is 'zero'. The check in auipc > and lui are then redundant. This patch removes those checks. > > Signed-off-by: Víctor Colombo

Re: [PATCH] target/riscv: Remove condition guarding register zero for auipc and lui

2022-06-12 Thread Alistair Francis
On Sat, Jun 11, 2022 at 2:59 AM Víctor Colombo wrote: > > Commit 57c108b8646 introduced gen_set_gpri(), which already contains > a check for if the destination register is 'zero'. The check in auipc > and lui are then redundant. This patch removes those checks. > > Signed-off-by: Víctor Colombo

Re: [PATCH] target/riscv: Remove condition guarding register zero for auipc and lui

2022-06-10 Thread Richard Henderson
On 6/10/22 09:55, Víctor Colombo wrote: Commit 57c108b8646 introduced gen_set_gpri(), which already contains a check for if the destination register is 'zero'. The check in auipc and lui are then redundant. This patch removes those checks. Signed-off-by: Víctor Colombo ---

[PATCH] target/riscv: Remove condition guarding register zero for auipc and lui

2022-06-10 Thread Víctor Colombo
Commit 57c108b8646 introduced gen_set_gpri(), which already contains a check for if the destination register is 'zero'. The check in auipc and lui are then redundant. This patch removes those checks. Signed-off-by: Víctor Colombo --- target/riscv/insn_trans/trans_rvi.c.inc | 8 ++-- 1 file