Hi, Commit 33a24910ae ("target/riscv: Use GDBFeature for dynamic XML") changed 'reg_width' for vector regs, a change that I believe to be unintended, and we're unable to print vector regs in GDB ATM.
The following is a gdb output of a simple program running with qemu-riscv64 when trying to print the value of 'v1' after a 'vle' insns: (gdb) p $v1 $1 = {q = 0x0, l = 0x0, w = 0x0, s = {57920}, b = {64, 226}} (gdb) After this patch: (gdb) p $v1 $1 = {q = {9781192033638379298842687819604544}, l = {530239482618432, 530239482618432}, w = {123456, 123456, 123456, 123456}, s = {57920, 1, 57920, 1, 57920, 1, 57920, 1}, b = {64, 226, 1, 0, 64, 226, 1, 0, 64, 226, 1, 0, 64, 226, 1, 0}} (gdb) Michael, this is a good pick for qemu-stable. Daniel Henrique Barboza (1): riscv, gdbstub.c: fix reg_width in ricsv_gen_dynamic_vector_feature() target/riscv/gdbstub.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.44.0