This is a change to raise #GP on unaligned m128 loads/stores when
required by the spec. Some notes on this change:
1. I considered making use of the existing support for enforcing memory
alignment (setting MO_ALIGN_16 in the load/store's MemOp), but
rejected this approach. There are at least two scenarios where we
might want to do alignment checks in x86:
a. Loads/stores when the AC flag is enabled (which should raise #AC
on misalignment)
b. SSE/AVX instructions which require memory alignment (which raise
#GP on misalignment)
The MemOp alignment checking mechanism can only handle one of these
scenarios, since they require different exceptions to be raised. I
think it make more sense to use the existing memory alignment support
for implementing (a), since helper_unaligned_{ld,st} is already
triggers SIGBUS in qemu-user. This is why I ended up implementing (b)
with a helper.
2. It is often the case that legacy SSE instructions require 16 byte
alignment of 128-bit memory operands, but AVX versions of the
instructions do not (e.g. movsldup requires alignment and vmovsldup
does not). From what I can tell, QEMU currently doesn't appear to
report AVX support in cpuid, but it still seems to emulate some of
these instructions if you tell it to execute them. This change
attempts to distinguish between legacy SSE instructions and AVX
instructions by by conditioning on !(s->prefix & PREFIX_VEX). Not
sure this is very future-proof though - for example, it may need to
be updated if support for EVEX prefixes is added. LMK if there's a
nicer way to do this.
3. I tested this by running a Linux VM in qemu-system-x86_64 and
verifying that movaps on an misaligned address triggers a segfault.
Ricky Zhou (1):
target/i386: Raise #GP on unaligned m128 accesses when required.
target/i386/helper.h | 1 +
target/i386/tcg/mem_helper.c | 8 ++++++++
target/i386/tcg/translate.c | 38 +++++++++++++++++++++++++++++++++---
3 files changed, 44 insertions(+), 3 deletions(-)
--
2.37.2
