Re: [PATCH 0/4] Add RISC-V semihosting support

2020-10-28 Thread no-reply
Patchew URL: https://patchew.org/QEMU/20201028185722.2783532-1-kei...@keithp.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20201028185722.2783532-1-kei...@keithp.com Subject: [PATCH 0/4] Add RISC-V semihosting

[PATCH 0/4] Add RISC-V semihosting support

2020-10-28 Thread Keith Packard via
This series adapts the existing ARM semihosting code to be target-independent, and then uses that to provide semihosting support for RISC-V targets.