On Thu Jun 22, 2023 at 5:30 PM AEST, Cédric Le Goater wrote:
> On 6/4/23 01:36, Nicholas Piggin wrote:
> > This adds support for chiptod and core timebase state machine models in
> > the powernv POWER9 and POWER10 models.
> >
> > This does not actually change the time or the value in TB registers
On 6/4/23 01:36, Nicholas Piggin wrote:
This adds support for chiptod and core timebase state machine models in
the powernv POWER9 and POWER10 models.
This does not actually change the time or the value in TB registers
(because they are alrady synced in QEMU), but it does go through the
[ ... ]
Yes it worked with 2 chips.
I will give the next series a try.
[ ... ]
It's difficult to review PATCH 4 without some good knowledge of HW. I know
you do but you can not review your own patches ! That said, the impact is
limited to PowerNV machines, I guess we are fine.
Yeah. I
On Wed Jun 14, 2023 at 6:54 PM AEST, Cédric Le Goater wrote:
> On 6/14/23 07:14, Nicholas Piggin wrote:
> > On Tue Jun 6, 2023 at 11:59 PM AEST, Cédric Le Goater wrote:
> >> On 6/4/23 01:36, Nicholas Piggin wrote:
> >>> This adds support for chiptod and core timebase state machine models in
> >>>
On 6/14/23 07:14, Nicholas Piggin wrote:
On Tue Jun 6, 2023 at 11:59 PM AEST, Cédric Le Goater wrote:
On 6/4/23 01:36, Nicholas Piggin wrote:
This adds support for chiptod and core timebase state machine models in
the powernv POWER9 and POWER10 models.
This does not actually change the time
On Tue Jun 6, 2023 at 11:59 PM AEST, Cédric Le Goater wrote:
> On 6/4/23 01:36, Nicholas Piggin wrote:
> > This adds support for chiptod and core timebase state machine models in
> > the powernv POWER9 and POWER10 models.
> >
> > This does not actually change the time or the value in TB registers
On 6/4/23 01:36, Nicholas Piggin wrote:
This adds support for chiptod and core timebase state machine models in
the powernv POWER9 and POWER10 models.
This does not actually change the time or the value in TB registers
(because they are alrady synced in QEMU), but it does go through the
This adds support for chiptod and core timebase state machine models in
the powernv POWER9 and POWER10 models.
This does not actually change the time or the value in TB registers
(because they are alrady synced in QEMU), but it does go through the
motions. It is enough to be able to run skiboot's